path: root/target-mips/translate.c
AgeCommit message (Expand)Author
2016-03-30target-mips: add MAAR, MAARI registerYongbok Kim
2016-03-30target-mips: use CP0_CHECK for gen_m{f|t}hc0Yongbok Kim
2016-03-30target-mips: make ITC Configuration Tags accessible to the CPULeon Alrae
2016-03-30target-mips: check CP0 enabled for CACHE instruction also in R6Leon Alrae
2016-03-30hw/mips_malta: add CPS to Malta boardLeon Alrae
2016-03-30target-mips: add CMGCRBase registerYongbok Kim
2016-03-23target-mips: indicate presence of IEEE 754-2008 FPU in R6/R5+MSA CPUsLeon Alrae
2016-03-01tcg: Add type for vCPU pointersLluĂ­s Vilanova
2016-02-26target-mips: implement R6 multi-threadingYongbok Kim
2016-02-09tcg: Change tcg_global_mem_new_* to take a TCGv_ptrRichard Henderson
2016-02-03log: do not unnecessarily include qom/cpu.hPaolo Bonzini
2016-01-23mips: Clean up includesPeter Maydell
2016-01-23target-mips: Fix ALIGN instruction when bp=0Miodrag Dinic
2015-10-30target-mips: add SIGRIE instructionYongbok Kim
2015-10-30target-mips: add PC, XNP reg numbers to RDHWRYongbok Kim
2015-10-29target-mips: Add enum for BREAK32Yongbok Kim
2015-10-28target-*: Advance pc after recognizing a breakpointRichard Henderson
2015-10-07tcg: Remove gen_intermediate_code_pcRichard Henderson
2015-10-07tcg: Pass data argument to restore_state_to_opcRichard Henderson
2015-10-07tcg: Add TCG_MAX_INSNSRichard Henderson
2015-10-07target-mips: Add delayed branch state to insn_startRichard Henderson
2015-10-07target-*: Introduce and use cpu_breakpoint_testRichard Henderson
2015-10-07target-*: Increment num_insns immediately after tcg_gen_insn_startRichard Henderson
2015-10-07target-*: Unconditionally emit tcg_gen_insn_startRichard Henderson
2015-10-07tcg: Rename debug_insn_start to insn_startRichard Henderson
2015-09-18target-mips: improve exception handlingPavel Dovgaluk
2015-09-18target-mips: correct MTC0 instruction on MIPS64Leon Alrae
2015-09-18target-mips: add missing restriction in DAUI instructionLeon Alrae
2015-09-18target-mips: get rid of MIPS_DEBUG_SIGN_EXTENSIONSAurelien Jarno
2015-09-18target-mips: get rid of MIPS_DEBUGAurelien Jarno
2015-09-18target-mips: remove wrong checks for recip.fmt and rsqrt.fmtPetar Jovanovic
2015-09-18target-mips: Use tcg_gen_extrh_i64_i32Richard Henderson
2015-08-24tcg: Remove tcg_gen_trunc_i64_i32Richard Henderson
2015-08-13target-mips: simplify LWL/LDL mask generationAurelien Jarno
2015-08-04target-mips: Copy restrictions from ext/ins to dext/dinsRichard Henderson
2015-08-04target-mips: fix semihosting for microMIPS R6Leon Alrae
2015-07-15target-mips: fix page fault address for LWL/LWR/LDL/LDRAurelien Jarno
2015-07-15target-mips: fix logically dead code reported by CoverityLeon Alrae
2015-06-26target-mips: microMIPS32 R6 POOL16{A, C} instructionsYongbok Kim
2015-06-26target-mips: microMIPS32 R6 Major instructionsYongbok Kim
2015-06-26target-mips: microMIPS32 R6 POOL32{I, C} instructionsYongbok Kim
2015-06-26target-mips: microMIPS32 R6 POOL32F instructionsYongbok Kim
2015-06-26target-mips: microMIPS32 R6 POOL32A{XF} instructionsYongbok Kim
2015-06-26target-mips: microMIPS32 R6 branches and jumpsYongbok Kim
2015-06-26target-mips: add microMIPS32 R6 opcode enumYongbok Kim
2015-06-26target-mips: signal RI for removed instructions in microMIPS R6Yongbok Kim
2015-06-26target-mips: raise RI exceptions when FIR.PS = 0Yongbok Kim
2015-06-26target-mips: rearrange gen_compute_compact_branchYongbok Kim
2015-06-26target-mips: refactor {D}LSA, {D}ALIGN, {D}BITSWAPYongbok Kim
2015-06-26target-mips: remove an unused argumentYongbok Kim