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authorYongbok Kim <yongbok.kim@imgtec.com>2015-10-02 17:50:50 +0100
committerLeon Alrae <leon.alrae@imgtec.com>2015-10-29 16:16:44 +0000
commitdbd8af9824d0ddc4400f859c2af77543461cba0d (patch)
tree3a428bf4356b35d04978222f30431fe6788b1b81 /target-mips/translate.c
parent2dcf7908d9e0274c08911400beb7ed14276bb170 (diff)
downloadqemu-arm-dbd8af9824d0ddc4400f859c2af77543461cba0d.tar.gz
target-mips: Add enum for BREAK32
Add enum for BREAK32 Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Diffstat (limited to 'target-mips/translate.c')
-rw-r--r--target-mips/translate.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c
index a10bfa3a79..3105c7f175 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -12009,6 +12009,7 @@ enum {
MODU = 0x7,
/* The following can be distinguished by their lower 6 bits. */
+ BREAK32 = 0x07,
INS = 0x0c,
LSA = 0x0f,
ALIGN = 0x1f,
@@ -13629,7 +13630,7 @@ static void decode_micromips32_opc(CPUMIPSState *env, DisasContext *ctx)
case POOL32AXF:
gen_pool32axf(env, ctx, rt, rs);
break;
- case 0x07:
+ case BREAK32:
generate_exception_end(ctx, EXCP_BREAK);
break;
default: