path: root/target-mips/translate.c
diff options
authorRichard Henderson <rth@twiddle.net>2015-10-13 22:07:49 +0000
committerRichard Henderson <rth@twiddle.net>2015-10-28 10:57:16 -0700
commit522a0d4e3c0d397ffb45ec400d8cbd426dad9d17 (patch)
tree47bf23d369e201fe8e982097a5fdd5437f88bdfa /target-mips/translate.c
parent496fedddce9a575111df4f912fb9e361037531ed (diff)
target-*: Advance pc after recognizing a breakpoint
Some targets already had this within their logic, but make sure it's present for all targets. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-mips/translate.c')
1 files changed, 4 insertions, 2 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 897839ced9..a10bfa3a79 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -19594,8 +19594,10 @@ void gen_intermediate_code(CPUMIPSState *env, struct TranslationBlock *tb)
save_cpu_state(&ctx, 1);
ctx.bstate = BS_BRANCH;
- /* Include the breakpoint location or the tb won't
- * be flushed when it must be. */
+ /* The address covered by the breakpoint must be included in
+ [tb->pc, tb->pc + tb->size) in order to for it to be
+ properly cleared -- thus we increment the PC here so that
+ the logic setting tb->size below does the right thing. */
ctx.pc += 4;
goto done_generating;