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authorRichard Henderson <rth@twiddle.net>2015-07-24 11:49:53 -0700
committerRichard Henderson <rth@twiddle.net>2015-08-24 11:10:54 -0700
commitecc7b3aa71f5fdcf9ee87e74ca811d988282641d (patch)
treee7d4d1a8a7ad7d751b462e747a254a49c6816c77 /target-mips/translate.c
parent609ad70562793937257c89d07bf7c1370b9fc9aa (diff)
downloadqemu-arm-ecc7b3aa71f5fdcf9ee87e74ca811d988282641d.tar.gz
tcg: Remove tcg_gen_trunc_i64_i32
Replacing it with tcg_gen_extrl_i64_i32. Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-mips/translate.c')
-rw-r--r--target-mips/translate.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 98cf72de74..93cb4f2731 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -1629,7 +1629,7 @@ static void gen_load_fpr32(DisasContext *ctx, TCGv_i32 t, int reg)
if (ctx->hflags & MIPS_HFLAG_FRE) {
generate_exception(ctx, EXCP_RI);
}
- tcg_gen_trunc_i64_i32(t, fpu_f64[reg]);
+ tcg_gen_extrl_i64_i32(t, fpu_f64[reg]);
}
static void gen_store_fpr32(DisasContext *ctx, TCGv_i32 t, int reg)
@@ -1649,7 +1649,7 @@ static void gen_load_fpr32h(DisasContext *ctx, TCGv_i32 t, int reg)
if (ctx->hflags & MIPS_HFLAG_F64) {
TCGv_i64 t64 = tcg_temp_new_i64();
tcg_gen_shri_i64(t64, fpu_f64[reg], 32);
- tcg_gen_trunc_i64_i32(t, t64);
+ tcg_gen_extrl_i64_i32(t, t64);
tcg_temp_free_i64(t64);
} else {
gen_load_fpr32(ctx, t, reg | 1);