blob: 21f4251b4fa5266f1900edc5a8297ececa4fec04 [file] [log] [blame]
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001/*
2 * Optimizations for Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2010 Samsung Electronics.
5 * Contributed by Kirill Batuzov <batuzovk@ispras.ru>
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25
Peter Maydell757e7252016-01-26 18:17:08 +000026#include "qemu/osdep.h"
Philippe Mathieu-Daudédcb32f12020-01-01 12:23:00 +010027#include "tcg/tcg-op.h"
Richard Henderson90163902021-03-18 10:21:45 -060028#include "tcg-internal.h"
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040029
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040030#define CASE_OP_32_64(x) \
31 glue(glue(case INDEX_op_, x), _i32): \
32 glue(glue(case INDEX_op_, x), _i64)
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040033
Richard Henderson170ba882017-11-22 09:07:11 +010034#define CASE_OP_32_64_VEC(x) \
35 glue(glue(case INDEX_op_, x), _i32): \
36 glue(glue(case INDEX_op_, x), _i64): \
37 glue(glue(case INDEX_op_, x), _vec)
38
Richard Henderson6fcb98e2020-03-30 17:44:30 -070039typedef struct TempOptInfo {
Aurelien Jarnob41059d2015-07-27 12:41:44 +020040 bool is_const;
Richard Henderson63490392017-06-20 13:43:15 -070041 TCGTemp *prev_copy;
42 TCGTemp *next_copy;
Richard Henderson54795542020-09-06 16:21:32 -070043 uint64_t val;
Richard Hendersonb1fde412021-08-23 13:07:49 -070044 uint64_t z_mask; /* mask bit is 0 if and only if value bit is 0 */
Richard Henderson6fcb98e2020-03-30 17:44:30 -070045} TempOptInfo;
Kirill Batuzov22613af2011-07-07 16:37:13 +040046
Richard Henderson3b3f8472021-08-23 22:06:31 -070047typedef struct OptContext {
Richard Hendersondc849882021-08-24 07:13:45 -070048 TCGContext *tcg;
Richard Hendersond0ed5152021-08-24 07:38:39 -070049 TCGOp *prev_mb;
Richard Henderson3b3f8472021-08-23 22:06:31 -070050 TCGTempSet temps_used;
Richard Henderson137f1f42021-08-24 08:49:25 -070051
52 /* In flight values from optimization. */
53 uint64_t z_mask;
Richard Henderson67f84c92021-08-25 08:00:20 -070054 TCGType type;
Richard Henderson3b3f8472021-08-23 22:06:31 -070055} OptContext;
56
Richard Henderson6fcb98e2020-03-30 17:44:30 -070057static inline TempOptInfo *ts_info(TCGTemp *ts)
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020058{
Richard Henderson63490392017-06-20 13:43:15 -070059 return ts->state_ptr;
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020060}
61
Richard Henderson6fcb98e2020-03-30 17:44:30 -070062static inline TempOptInfo *arg_info(TCGArg arg)
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020063{
Richard Henderson63490392017-06-20 13:43:15 -070064 return ts_info(arg_temp(arg));
65}
66
67static inline bool ts_is_const(TCGTemp *ts)
68{
69 return ts_info(ts)->is_const;
70}
71
72static inline bool arg_is_const(TCGArg arg)
73{
74 return ts_is_const(arg_temp(arg));
75}
76
77static inline bool ts_is_copy(TCGTemp *ts)
78{
79 return ts_info(ts)->next_copy != ts;
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020080}
81
Aurelien Jarnob41059d2015-07-27 12:41:44 +020082/* Reset TEMP's state, possibly removing the temp for the list of copies. */
Richard Henderson63490392017-06-20 13:43:15 -070083static void reset_ts(TCGTemp *ts)
Kirill Batuzov22613af2011-07-07 16:37:13 +040084{
Richard Henderson6fcb98e2020-03-30 17:44:30 -070085 TempOptInfo *ti = ts_info(ts);
86 TempOptInfo *pi = ts_info(ti->prev_copy);
87 TempOptInfo *ni = ts_info(ti->next_copy);
Richard Henderson63490392017-06-20 13:43:15 -070088
89 ni->prev_copy = ti->prev_copy;
90 pi->next_copy = ti->next_copy;
91 ti->next_copy = ts;
92 ti->prev_copy = ts;
93 ti->is_const = false;
Richard Hendersonb1fde412021-08-23 13:07:49 -070094 ti->z_mask = -1;
Richard Henderson63490392017-06-20 13:43:15 -070095}
96
97static void reset_temp(TCGArg arg)
98{
99 reset_ts(arg_temp(arg));
Kirill Batuzov22613af2011-07-07 16:37:13 +0400100}
101
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200102/* Initialize and activate a temporary. */
Richard Henderson3b3f8472021-08-23 22:06:31 -0700103static void init_ts_info(OptContext *ctx, TCGTemp *ts)
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200104{
Richard Henderson63490392017-06-20 13:43:15 -0700105 size_t idx = temp_idx(ts);
Richard Henderson8f17a972020-03-30 19:52:02 -0700106 TempOptInfo *ti;
Richard Henderson63490392017-06-20 13:43:15 -0700107
Richard Henderson3b3f8472021-08-23 22:06:31 -0700108 if (test_bit(idx, ctx->temps_used.l)) {
Richard Henderson8f17a972020-03-30 19:52:02 -0700109 return;
110 }
Richard Henderson3b3f8472021-08-23 22:06:31 -0700111 set_bit(idx, ctx->temps_used.l);
Richard Henderson8f17a972020-03-30 19:52:02 -0700112
113 ti = ts->state_ptr;
114 if (ti == NULL) {
115 ti = tcg_malloc(sizeof(TempOptInfo));
Richard Henderson63490392017-06-20 13:43:15 -0700116 ts->state_ptr = ti;
Richard Henderson8f17a972020-03-30 19:52:02 -0700117 }
118
119 ti->next_copy = ts;
120 ti->prev_copy = ts;
121 if (ts->kind == TEMP_CONST) {
122 ti->is_const = true;
123 ti->val = ts->val;
Richard Hendersonb1fde412021-08-23 13:07:49 -0700124 ti->z_mask = ts->val;
Richard Henderson8f17a972020-03-30 19:52:02 -0700125 if (TCG_TARGET_REG_BITS > 32 && ts->type == TCG_TYPE_I32) {
126 /* High bits of a 32-bit quantity are garbage. */
Richard Hendersonb1fde412021-08-23 13:07:49 -0700127 ti->z_mask |= ~0xffffffffull;
Richard Hendersonc0522132020-03-29 18:55:52 -0700128 }
Richard Henderson8f17a972020-03-30 19:52:02 -0700129 } else {
130 ti->is_const = false;
Richard Hendersonb1fde412021-08-23 13:07:49 -0700131 ti->z_mask = -1;
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200132 }
133}
134
Richard Henderson63490392017-06-20 13:43:15 -0700135static TCGTemp *find_better_copy(TCGContext *s, TCGTemp *ts)
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200136{
Richard Henderson4c868ce2020-04-23 09:02:23 -0700137 TCGTemp *i, *g, *l;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200138
Richard Henderson4c868ce2020-04-23 09:02:23 -0700139 /* If this is already readonly, we can't do better. */
140 if (temp_readonly(ts)) {
Richard Henderson63490392017-06-20 13:43:15 -0700141 return ts;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200142 }
143
Richard Henderson4c868ce2020-04-23 09:02:23 -0700144 g = l = NULL;
Richard Henderson63490392017-06-20 13:43:15 -0700145 for (i = ts_info(ts)->next_copy; i != ts; i = ts_info(i)->next_copy) {
Richard Henderson4c868ce2020-04-23 09:02:23 -0700146 if (temp_readonly(i)) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200147 return i;
Richard Henderson4c868ce2020-04-23 09:02:23 -0700148 } else if (i->kind > ts->kind) {
149 if (i->kind == TEMP_GLOBAL) {
150 g = i;
151 } else if (i->kind == TEMP_LOCAL) {
152 l = i;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200153 }
154 }
155 }
156
Richard Henderson4c868ce2020-04-23 09:02:23 -0700157 /* If we didn't find a better representation, return the same temp. */
158 return g ? g : l ? l : ts;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200159}
160
Richard Henderson63490392017-06-20 13:43:15 -0700161static bool ts_are_copies(TCGTemp *ts1, TCGTemp *ts2)
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200162{
Richard Henderson63490392017-06-20 13:43:15 -0700163 TCGTemp *i;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200164
Richard Henderson63490392017-06-20 13:43:15 -0700165 if (ts1 == ts2) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200166 return true;
167 }
168
Richard Henderson63490392017-06-20 13:43:15 -0700169 if (!ts_is_copy(ts1) || !ts_is_copy(ts2)) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200170 return false;
171 }
172
Richard Henderson63490392017-06-20 13:43:15 -0700173 for (i = ts_info(ts1)->next_copy; i != ts1; i = ts_info(i)->next_copy) {
174 if (i == ts2) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200175 return true;
176 }
177 }
178
179 return false;
180}
181
Richard Henderson63490392017-06-20 13:43:15 -0700182static bool args_are_copies(TCGArg arg1, TCGArg arg2)
183{
184 return ts_are_copies(arg_temp(arg1), arg_temp(arg2));
185}
186
Richard Henderson6b99d5b2021-08-24 10:57:56 -0700187static bool tcg_opt_gen_mov(OptContext *ctx, TCGOp *op, TCGArg dst, TCGArg src)
Kirill Batuzov22613af2011-07-07 16:37:13 +0400188{
Richard Henderson63490392017-06-20 13:43:15 -0700189 TCGTemp *dst_ts = arg_temp(dst);
190 TCGTemp *src_ts = arg_temp(src);
Richard Henderson6fcb98e2020-03-30 17:44:30 -0700191 TempOptInfo *di;
192 TempOptInfo *si;
Richard Hendersonb1fde412021-08-23 13:07:49 -0700193 uint64_t z_mask;
Richard Henderson63490392017-06-20 13:43:15 -0700194 TCGOpcode new_op;
195
196 if (ts_are_copies(dst_ts, src_ts)) {
Richard Hendersondc849882021-08-24 07:13:45 -0700197 tcg_op_remove(ctx->tcg, op);
Richard Henderson6b99d5b2021-08-24 10:57:56 -0700198 return true;
Aurelien Jarno53657182015-06-04 21:53:25 +0200199 }
200
Richard Henderson63490392017-06-20 13:43:15 -0700201 reset_ts(dst_ts);
202 di = ts_info(dst_ts);
203 si = ts_info(src_ts);
Richard Henderson67f84c92021-08-25 08:00:20 -0700204
205 switch (ctx->type) {
206 case TCG_TYPE_I32:
Richard Henderson170ba882017-11-22 09:07:11 +0100207 new_op = INDEX_op_mov_i32;
Richard Henderson67f84c92021-08-25 08:00:20 -0700208 break;
209 case TCG_TYPE_I64:
210 new_op = INDEX_op_mov_i64;
211 break;
212 case TCG_TYPE_V64:
213 case TCG_TYPE_V128:
214 case TCG_TYPE_V256:
215 /* TCGOP_VECL and TCGOP_VECE remain unchanged. */
216 new_op = INDEX_op_mov_vec;
217 break;
218 default:
219 g_assert_not_reached();
Richard Henderson170ba882017-11-22 09:07:11 +0100220 }
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700221 op->opc = new_op;
Richard Henderson63490392017-06-20 13:43:15 -0700222 op->args[0] = dst;
223 op->args[1] = src;
Richard Hendersona62f6f52014-05-22 10:59:12 -0700224
Richard Hendersonb1fde412021-08-23 13:07:49 -0700225 z_mask = si->z_mask;
Richard Henderson24666ba2014-05-22 11:14:10 -0700226 if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_mov_i32) {
227 /* High bits of the destination are now garbage. */
Richard Hendersonb1fde412021-08-23 13:07:49 -0700228 z_mask |= ~0xffffffffull;
Richard Henderson24666ba2014-05-22 11:14:10 -0700229 }
Richard Hendersonb1fde412021-08-23 13:07:49 -0700230 di->z_mask = z_mask;
Richard Henderson24666ba2014-05-22 11:14:10 -0700231
Richard Henderson63490392017-06-20 13:43:15 -0700232 if (src_ts->type == dst_ts->type) {
Richard Henderson6fcb98e2020-03-30 17:44:30 -0700233 TempOptInfo *ni = ts_info(si->next_copy);
Richard Henderson63490392017-06-20 13:43:15 -0700234
235 di->next_copy = si->next_copy;
236 di->prev_copy = src_ts;
237 ni->prev_copy = dst_ts;
238 si->next_copy = dst_ts;
239 di->is_const = si->is_const;
240 di->val = si->val;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800241 }
Richard Henderson6b99d5b2021-08-24 10:57:56 -0700242 return true;
Kirill Batuzov22613af2011-07-07 16:37:13 +0400243}
244
Richard Henderson6b99d5b2021-08-24 10:57:56 -0700245static bool tcg_opt_gen_movi(OptContext *ctx, TCGOp *op,
Richard Hendersondc849882021-08-24 07:13:45 -0700246 TCGArg dst, uint64_t val)
Richard Henderson8fe35e02020-03-30 20:42:43 -0700247{
Richard Henderson8fe35e02020-03-30 20:42:43 -0700248 /* Convert movi to mov with constant temp. */
Richard Henderson67f84c92021-08-25 08:00:20 -0700249 TCGTemp *tv = tcg_constant_internal(ctx->type, val);
250
Richard Henderson3b3f8472021-08-23 22:06:31 -0700251 init_ts_info(ctx, tv);
Richard Henderson6b99d5b2021-08-24 10:57:56 -0700252 return tcg_opt_gen_mov(ctx, op, dst, temp_arg(tv));
Richard Henderson8fe35e02020-03-30 20:42:43 -0700253}
254
Richard Henderson54795542020-09-06 16:21:32 -0700255static uint64_t do_constant_folding_2(TCGOpcode op, uint64_t x, uint64_t y)
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400256{
Richard Henderson03271522013-08-14 14:35:56 -0700257 uint64_t l64, h64;
258
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400259 switch (op) {
260 CASE_OP_32_64(add):
261 return x + y;
262
263 CASE_OP_32_64(sub):
264 return x - y;
265
266 CASE_OP_32_64(mul):
267 return x * y;
268
Kirill Batuzov9a810902011-07-07 16:37:15 +0400269 CASE_OP_32_64(and):
270 return x & y;
271
272 CASE_OP_32_64(or):
273 return x | y;
274
275 CASE_OP_32_64(xor):
276 return x ^ y;
277
Kirill Batuzov55c09752011-07-07 16:37:16 +0400278 case INDEX_op_shl_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700279 return (uint32_t)x << (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400280
Kirill Batuzov55c09752011-07-07 16:37:16 +0400281 case INDEX_op_shl_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700282 return (uint64_t)x << (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400283
284 case INDEX_op_shr_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700285 return (uint32_t)x >> (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400286
Kirill Batuzov55c09752011-07-07 16:37:16 +0400287 case INDEX_op_shr_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700288 return (uint64_t)x >> (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400289
290 case INDEX_op_sar_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700291 return (int32_t)x >> (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400292
Kirill Batuzov55c09752011-07-07 16:37:16 +0400293 case INDEX_op_sar_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700294 return (int64_t)x >> (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400295
296 case INDEX_op_rotr_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700297 return ror32(x, y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400298
Kirill Batuzov55c09752011-07-07 16:37:16 +0400299 case INDEX_op_rotr_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700300 return ror64(x, y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400301
302 case INDEX_op_rotl_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700303 return rol32(x, y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400304
Kirill Batuzov55c09752011-07-07 16:37:16 +0400305 case INDEX_op_rotl_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700306 return rol64(x, y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400307
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700308 CASE_OP_32_64(not):
Kirill Batuzova640f032011-07-07 16:37:17 +0400309 return ~x;
310
Richard Hendersoncb25c802011-08-17 14:11:47 -0700311 CASE_OP_32_64(neg):
312 return -x;
313
314 CASE_OP_32_64(andc):
315 return x & ~y;
316
317 CASE_OP_32_64(orc):
318 return x | ~y;
319
320 CASE_OP_32_64(eqv):
321 return ~(x ^ y);
322
323 CASE_OP_32_64(nand):
324 return ~(x & y);
325
326 CASE_OP_32_64(nor):
327 return ~(x | y);
328
Richard Henderson0e28d002016-11-16 09:23:28 +0100329 case INDEX_op_clz_i32:
330 return (uint32_t)x ? clz32(x) : y;
331
332 case INDEX_op_clz_i64:
333 return x ? clz64(x) : y;
334
335 case INDEX_op_ctz_i32:
336 return (uint32_t)x ? ctz32(x) : y;
337
338 case INDEX_op_ctz_i64:
339 return x ? ctz64(x) : y;
340
Richard Hendersona768e4e2016-11-21 11:13:39 +0100341 case INDEX_op_ctpop_i32:
342 return ctpop32(x);
343
344 case INDEX_op_ctpop_i64:
345 return ctpop64(x);
346
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700347 CASE_OP_32_64(ext8s):
Kirill Batuzova640f032011-07-07 16:37:17 +0400348 return (int8_t)x;
349
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700350 CASE_OP_32_64(ext16s):
Kirill Batuzova640f032011-07-07 16:37:17 +0400351 return (int16_t)x;
352
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700353 CASE_OP_32_64(ext8u):
Kirill Batuzova640f032011-07-07 16:37:17 +0400354 return (uint8_t)x;
355
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700356 CASE_OP_32_64(ext16u):
Kirill Batuzova640f032011-07-07 16:37:17 +0400357 return (uint16_t)x;
358
Richard Henderson64985942018-11-20 08:53:34 +0100359 CASE_OP_32_64(bswap16):
Richard Henderson0b76ff82021-06-13 13:04:00 -0700360 x = bswap16(x);
361 return y & TCG_BSWAP_OS ? (int16_t)x : x;
Richard Henderson64985942018-11-20 08:53:34 +0100362
363 CASE_OP_32_64(bswap32):
Richard Henderson0b76ff82021-06-13 13:04:00 -0700364 x = bswap32(x);
365 return y & TCG_BSWAP_OS ? (int32_t)x : x;
Richard Henderson64985942018-11-20 08:53:34 +0100366
367 case INDEX_op_bswap64_i64:
368 return bswap64(x);
369
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200370 case INDEX_op_ext_i32_i64:
Kirill Batuzova640f032011-07-07 16:37:17 +0400371 case INDEX_op_ext32s_i64:
372 return (int32_t)x;
373
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200374 case INDEX_op_extu_i32_i64:
Richard Henderson609ad702015-07-24 07:16:00 -0700375 case INDEX_op_extrl_i64_i32:
Kirill Batuzova640f032011-07-07 16:37:17 +0400376 case INDEX_op_ext32u_i64:
377 return (uint32_t)x;
Kirill Batuzova640f032011-07-07 16:37:17 +0400378
Richard Henderson609ad702015-07-24 07:16:00 -0700379 case INDEX_op_extrh_i64_i32:
380 return (uint64_t)x >> 32;
381
Richard Henderson03271522013-08-14 14:35:56 -0700382 case INDEX_op_muluh_i32:
383 return ((uint64_t)(uint32_t)x * (uint32_t)y) >> 32;
384 case INDEX_op_mulsh_i32:
385 return ((int64_t)(int32_t)x * (int32_t)y) >> 32;
386
387 case INDEX_op_muluh_i64:
388 mulu64(&l64, &h64, x, y);
389 return h64;
390 case INDEX_op_mulsh_i64:
391 muls64(&l64, &h64, x, y);
392 return h64;
393
Richard Henderson01547f72013-08-14 15:22:46 -0700394 case INDEX_op_div_i32:
395 /* Avoid crashing on divide by zero, otherwise undefined. */
396 return (int32_t)x / ((int32_t)y ? : 1);
397 case INDEX_op_divu_i32:
398 return (uint32_t)x / ((uint32_t)y ? : 1);
399 case INDEX_op_div_i64:
400 return (int64_t)x / ((int64_t)y ? : 1);
401 case INDEX_op_divu_i64:
402 return (uint64_t)x / ((uint64_t)y ? : 1);
403
404 case INDEX_op_rem_i32:
405 return (int32_t)x % ((int32_t)y ? : 1);
406 case INDEX_op_remu_i32:
407 return (uint32_t)x % ((uint32_t)y ? : 1);
408 case INDEX_op_rem_i64:
409 return (int64_t)x % ((int64_t)y ? : 1);
410 case INDEX_op_remu_i64:
411 return (uint64_t)x % ((uint64_t)y ? : 1);
412
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400413 default:
414 fprintf(stderr,
415 "Unrecognized operation %d in do_constant_folding.\n", op);
416 tcg_abort();
417 }
418}
419
Richard Henderson67f84c92021-08-25 08:00:20 -0700420static uint64_t do_constant_folding(TCGOpcode op, TCGType type,
421 uint64_t x, uint64_t y)
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400422{
Richard Henderson54795542020-09-06 16:21:32 -0700423 uint64_t res = do_constant_folding_2(op, x, y);
Richard Henderson67f84c92021-08-25 08:00:20 -0700424 if (type == TCG_TYPE_I32) {
Aurelien Jarno29f3ff82015-07-10 18:03:31 +0200425 res = (int32_t)res;
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400426 }
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400427 return res;
428}
429
Richard Henderson9519da72012-10-02 11:32:26 -0700430static bool do_constant_folding_cond_32(uint32_t x, uint32_t y, TCGCond c)
431{
432 switch (c) {
433 case TCG_COND_EQ:
434 return x == y;
435 case TCG_COND_NE:
436 return x != y;
437 case TCG_COND_LT:
438 return (int32_t)x < (int32_t)y;
439 case TCG_COND_GE:
440 return (int32_t)x >= (int32_t)y;
441 case TCG_COND_LE:
442 return (int32_t)x <= (int32_t)y;
443 case TCG_COND_GT:
444 return (int32_t)x > (int32_t)y;
445 case TCG_COND_LTU:
446 return x < y;
447 case TCG_COND_GEU:
448 return x >= y;
449 case TCG_COND_LEU:
450 return x <= y;
451 case TCG_COND_GTU:
452 return x > y;
453 default:
454 tcg_abort();
455 }
456}
457
458static bool do_constant_folding_cond_64(uint64_t x, uint64_t y, TCGCond c)
459{
460 switch (c) {
461 case TCG_COND_EQ:
462 return x == y;
463 case TCG_COND_NE:
464 return x != y;
465 case TCG_COND_LT:
466 return (int64_t)x < (int64_t)y;
467 case TCG_COND_GE:
468 return (int64_t)x >= (int64_t)y;
469 case TCG_COND_LE:
470 return (int64_t)x <= (int64_t)y;
471 case TCG_COND_GT:
472 return (int64_t)x > (int64_t)y;
473 case TCG_COND_LTU:
474 return x < y;
475 case TCG_COND_GEU:
476 return x >= y;
477 case TCG_COND_LEU:
478 return x <= y;
479 case TCG_COND_GTU:
480 return x > y;
481 default:
482 tcg_abort();
483 }
484}
485
486static bool do_constant_folding_cond_eq(TCGCond c)
487{
488 switch (c) {
489 case TCG_COND_GT:
490 case TCG_COND_LTU:
491 case TCG_COND_LT:
492 case TCG_COND_GTU:
493 case TCG_COND_NE:
494 return 0;
495 case TCG_COND_GE:
496 case TCG_COND_GEU:
497 case TCG_COND_LE:
498 case TCG_COND_LEU:
499 case TCG_COND_EQ:
500 return 1;
501 default:
502 tcg_abort();
503 }
504}
505
Richard Henderson8d57bf12021-08-24 08:34:27 -0700506/*
507 * Return -1 if the condition can't be simplified,
508 * and the result of the condition (0 or 1) if it can.
509 */
Richard Henderson67f84c92021-08-25 08:00:20 -0700510static int do_constant_folding_cond(TCGType type, TCGArg x,
Richard Henderson8d57bf12021-08-24 08:34:27 -0700511 TCGArg y, TCGCond c)
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200512{
Richard Henderson54795542020-09-06 16:21:32 -0700513 uint64_t xv = arg_info(x)->val;
514 uint64_t yv = arg_info(y)->val;
515
Richard Henderson63490392017-06-20 13:43:15 -0700516 if (arg_is_const(x) && arg_is_const(y)) {
Richard Henderson67f84c92021-08-25 08:00:20 -0700517 switch (type) {
518 case TCG_TYPE_I32:
Richard Henderson170ba882017-11-22 09:07:11 +0100519 return do_constant_folding_cond_32(xv, yv, c);
Richard Henderson67f84c92021-08-25 08:00:20 -0700520 case TCG_TYPE_I64:
521 return do_constant_folding_cond_64(xv, yv, c);
522 default:
523 /* Only scalar comparisons are optimizable */
524 return -1;
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200525 }
Richard Henderson63490392017-06-20 13:43:15 -0700526 } else if (args_are_copies(x, y)) {
Richard Henderson9519da72012-10-02 11:32:26 -0700527 return do_constant_folding_cond_eq(c);
Richard Henderson63490392017-06-20 13:43:15 -0700528 } else if (arg_is_const(y) && yv == 0) {
Aurelien Jarnob336ceb2012-09-18 19:37:00 +0200529 switch (c) {
530 case TCG_COND_LTU:
531 return 0;
532 case TCG_COND_GEU:
533 return 1;
534 default:
Richard Henderson8d57bf12021-08-24 08:34:27 -0700535 return -1;
Aurelien Jarnob336ceb2012-09-18 19:37:00 +0200536 }
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200537 }
Richard Henderson8d57bf12021-08-24 08:34:27 -0700538 return -1;
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200539}
540
Richard Henderson8d57bf12021-08-24 08:34:27 -0700541/*
542 * Return -1 if the condition can't be simplified,
543 * and the result of the condition (0 or 1) if it can.
544 */
545static int do_constant_folding_cond2(TCGArg *p1, TCGArg *p2, TCGCond c)
Richard Henderson6c4382f2012-10-02 11:32:27 -0700546{
547 TCGArg al = p1[0], ah = p1[1];
548 TCGArg bl = p2[0], bh = p2[1];
549
Richard Henderson63490392017-06-20 13:43:15 -0700550 if (arg_is_const(bl) && arg_is_const(bh)) {
551 tcg_target_ulong blv = arg_info(bl)->val;
552 tcg_target_ulong bhv = arg_info(bh)->val;
553 uint64_t b = deposit64(blv, 32, 32, bhv);
Richard Henderson6c4382f2012-10-02 11:32:27 -0700554
Richard Henderson63490392017-06-20 13:43:15 -0700555 if (arg_is_const(al) && arg_is_const(ah)) {
556 tcg_target_ulong alv = arg_info(al)->val;
557 tcg_target_ulong ahv = arg_info(ah)->val;
558 uint64_t a = deposit64(alv, 32, 32, ahv);
Richard Henderson6c4382f2012-10-02 11:32:27 -0700559 return do_constant_folding_cond_64(a, b, c);
560 }
561 if (b == 0) {
562 switch (c) {
563 case TCG_COND_LTU:
564 return 0;
565 case TCG_COND_GEU:
566 return 1;
567 default:
568 break;
569 }
570 }
571 }
Richard Henderson63490392017-06-20 13:43:15 -0700572 if (args_are_copies(al, bl) && args_are_copies(ah, bh)) {
Richard Henderson6c4382f2012-10-02 11:32:27 -0700573 return do_constant_folding_cond_eq(c);
574 }
Richard Henderson8d57bf12021-08-24 08:34:27 -0700575 return -1;
Richard Henderson6c4382f2012-10-02 11:32:27 -0700576}
577
Richard Henderson24c9ae42012-10-02 11:32:21 -0700578static bool swap_commutative(TCGArg dest, TCGArg *p1, TCGArg *p2)
579{
580 TCGArg a1 = *p1, a2 = *p2;
581 int sum = 0;
Richard Henderson63490392017-06-20 13:43:15 -0700582 sum += arg_is_const(a1);
583 sum -= arg_is_const(a2);
Richard Henderson24c9ae42012-10-02 11:32:21 -0700584
585 /* Prefer the constant in second argument, and then the form
586 op a, a, b, which is better handled on non-RISC hosts. */
587 if (sum > 0 || (sum == 0 && dest == a2)) {
588 *p1 = a2;
589 *p2 = a1;
590 return true;
591 }
592 return false;
593}
594
Richard Henderson0bfcb862012-10-02 11:32:23 -0700595static bool swap_commutative2(TCGArg *p1, TCGArg *p2)
596{
597 int sum = 0;
Richard Henderson63490392017-06-20 13:43:15 -0700598 sum += arg_is_const(p1[0]);
599 sum += arg_is_const(p1[1]);
600 sum -= arg_is_const(p2[0]);
601 sum -= arg_is_const(p2[1]);
Richard Henderson0bfcb862012-10-02 11:32:23 -0700602 if (sum > 0) {
603 TCGArg t;
604 t = p1[0], p1[0] = p2[0], p2[0] = t;
605 t = p1[1], p1[1] = p2[1], p2[1] = t;
606 return true;
607 }
608 return false;
609}
610
Richard Hendersone2577ea2021-08-24 08:00:48 -0700611static void init_arguments(OptContext *ctx, TCGOp *op, int nb_args)
612{
613 for (int i = 0; i < nb_args; i++) {
614 TCGTemp *ts = arg_temp(op->args[i]);
615 if (ts) {
616 init_ts_info(ctx, ts);
617 }
618 }
619}
620
Richard Henderson8774dde2021-08-24 08:04:47 -0700621static void copy_propagate(OptContext *ctx, TCGOp *op,
622 int nb_oargs, int nb_iargs)
623{
624 TCGContext *s = ctx->tcg;
625
626 for (int i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
627 TCGTemp *ts = arg_temp(op->args[i]);
628 if (ts && ts_is_copy(ts)) {
629 op->args[i] = temp_arg(find_better_copy(s, ts));
630 }
631 }
632}
633
Richard Henderson137f1f42021-08-24 08:49:25 -0700634static void finish_folding(OptContext *ctx, TCGOp *op)
635{
636 const TCGOpDef *def = &tcg_op_defs[op->opc];
637 int i, nb_oargs;
638
639 /*
640 * For an opcode that ends a BB, reset all temp data.
641 * We do no cross-BB optimization.
642 */
643 if (def->flags & TCG_OPF_BB_END) {
644 memset(&ctx->temps_used, 0, sizeof(ctx->temps_used));
645 ctx->prev_mb = NULL;
646 return;
647 }
648
649 nb_oargs = def->nb_oargs;
650 for (i = 0; i < nb_oargs; i++) {
651 reset_temp(op->args[i]);
652 /*
653 * Save the corresponding known-zero bits mask for the
654 * first output argument (only one supported so far).
655 */
656 if (i == 0) {
657 arg_info(op->args[i])->z_mask = ctx->z_mask;
658 }
659 }
660}
661
Richard Henderson2f9f08b2021-08-25 12:03:48 -0700662/*
663 * The fold_* functions return true when processing is complete,
664 * usually by folding the operation to a constant or to a copy,
665 * and calling tcg_opt_gen_{mov,movi}. They may do other things,
666 * like collect information about the value produced, for use in
667 * optimizing a subsequent operation.
668 *
669 * These first fold_* functions are all helpers, used by other
670 * folders for more specific operations.
671 */
672
673static bool fold_const1(OptContext *ctx, TCGOp *op)
674{
675 if (arg_is_const(op->args[1])) {
676 uint64_t t;
677
678 t = arg_info(op->args[1])->val;
Richard Henderson67f84c92021-08-25 08:00:20 -0700679 t = do_constant_folding(op->opc, ctx->type, t, 0);
Richard Henderson2f9f08b2021-08-25 12:03:48 -0700680 return tcg_opt_gen_movi(ctx, op, op->args[0], t);
681 }
682 return false;
683}
684
685static bool fold_const2(OptContext *ctx, TCGOp *op)
686{
687 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
688 uint64_t t1 = arg_info(op->args[1])->val;
689 uint64_t t2 = arg_info(op->args[2])->val;
690
Richard Henderson67f84c92021-08-25 08:00:20 -0700691 t1 = do_constant_folding(op->opc, ctx->type, t1, t2);
Richard Henderson2f9f08b2021-08-25 12:03:48 -0700692 return tcg_opt_gen_movi(ctx, op, op->args[0], t1);
693 }
694 return false;
695}
696
Richard Henderson0e0a32b2021-08-24 13:18:01 -0700697/*
698 * Convert @op to NOT, if NOT is supported by the host.
699 * Return true f the conversion is successful, which will still
700 * indicate that the processing is complete.
701 */
702static bool fold_not(OptContext *ctx, TCGOp *op);
703static bool fold_to_not(OptContext *ctx, TCGOp *op, int idx)
704{
705 TCGOpcode not_op;
706 bool have_not;
707
708 switch (ctx->type) {
709 case TCG_TYPE_I32:
710 not_op = INDEX_op_not_i32;
711 have_not = TCG_TARGET_HAS_not_i32;
712 break;
713 case TCG_TYPE_I64:
714 not_op = INDEX_op_not_i64;
715 have_not = TCG_TARGET_HAS_not_i64;
716 break;
717 case TCG_TYPE_V64:
718 case TCG_TYPE_V128:
719 case TCG_TYPE_V256:
720 not_op = INDEX_op_not_vec;
721 have_not = TCG_TARGET_HAS_not_vec;
722 break;
723 default:
724 g_assert_not_reached();
725 }
726 if (have_not) {
727 op->opc = not_op;
728 op->args[1] = op->args[idx];
729 return fold_not(ctx, op);
730 }
731 return false;
732}
733
734/* If the binary operation has first argument @i, fold to NOT. */
735static bool fold_ix_to_not(OptContext *ctx, TCGOp *op, uint64_t i)
736{
737 if (arg_is_const(op->args[1]) && arg_info(op->args[1])->val == i) {
738 return fold_to_not(ctx, op, 2);
739 }
740 return false;
741}
742
Richard Hendersone8679952021-08-25 13:19:52 -0700743/* If the binary operation has second argument @i, fold to @i. */
744static bool fold_xi_to_i(OptContext *ctx, TCGOp *op, uint64_t i)
745{
746 if (arg_is_const(op->args[2]) && arg_info(op->args[2])->val == i) {
747 return tcg_opt_gen_movi(ctx, op, op->args[0], i);
748 }
749 return false;
750}
751
Richard Henderson0e0a32b2021-08-24 13:18:01 -0700752/* If the binary operation has second argument @i, fold to NOT. */
753static bool fold_xi_to_not(OptContext *ctx, TCGOp *op, uint64_t i)
754{
755 if (arg_is_const(op->args[2]) && arg_info(op->args[2])->val == i) {
756 return fold_to_not(ctx, op, 1);
757 }
758 return false;
759}
760
Richard Hendersoncbe42fb2021-08-25 13:02:00 -0700761/* If the binary operation has both arguments equal, fold to @i. */
762static bool fold_xx_to_i(OptContext *ctx, TCGOp *op, uint64_t i)
763{
764 if (args_are_copies(op->args[1], op->args[2])) {
765 return tcg_opt_gen_movi(ctx, op, op->args[0], i);
766 }
767 return false;
768}
769
Richard Hendersonca7bb042021-08-25 13:14:21 -0700770/* If the binary operation has both arguments equal, fold to identity. */
771static bool fold_xx_to_x(OptContext *ctx, TCGOp *op)
772{
773 if (args_are_copies(op->args[1], op->args[2])) {
774 return tcg_opt_gen_mov(ctx, op, op->args[0], op->args[1]);
775 }
776 return false;
777}
778
Richard Henderson2f9f08b2021-08-25 12:03:48 -0700779/*
780 * These outermost fold_<op> functions are sorted alphabetically.
Richard Hendersonca7bb042021-08-25 13:14:21 -0700781 *
782 * The ordering of the transformations should be:
783 * 1) those that produce a constant
784 * 2) those that produce a copy
785 * 3) those that produce information about the result value.
Richard Henderson2f9f08b2021-08-25 12:03:48 -0700786 */
787
788static bool fold_add(OptContext *ctx, TCGOp *op)
789{
790 return fold_const2(ctx, op);
791}
792
Richard Hendersone3f7dc22021-08-24 10:30:38 -0700793static bool fold_addsub2_i32(OptContext *ctx, TCGOp *op, bool add)
794{
795 if (arg_is_const(op->args[2]) && arg_is_const(op->args[3]) &&
796 arg_is_const(op->args[4]) && arg_is_const(op->args[5])) {
797 uint32_t al = arg_info(op->args[2])->val;
798 uint32_t ah = arg_info(op->args[3])->val;
799 uint32_t bl = arg_info(op->args[4])->val;
800 uint32_t bh = arg_info(op->args[5])->val;
801 uint64_t a = ((uint64_t)ah << 32) | al;
802 uint64_t b = ((uint64_t)bh << 32) | bl;
803 TCGArg rl, rh;
804 TCGOp *op2 = tcg_op_insert_before(ctx->tcg, op, INDEX_op_mov_i32);
805
806 if (add) {
807 a += b;
808 } else {
809 a -= b;
810 }
811
812 rl = op->args[0];
813 rh = op->args[1];
814 tcg_opt_gen_movi(ctx, op, rl, (int32_t)a);
815 tcg_opt_gen_movi(ctx, op2, rh, (int32_t)(a >> 32));
816 return true;
817 }
818 return false;
819}
820
821static bool fold_add2_i32(OptContext *ctx, TCGOp *op)
822{
823 return fold_addsub2_i32(ctx, op, true);
824}
825
Richard Henderson2f9f08b2021-08-25 12:03:48 -0700826static bool fold_and(OptContext *ctx, TCGOp *op)
827{
Richard Hendersonca7bb042021-08-25 13:14:21 -0700828 if (fold_const2(ctx, op) ||
Richard Hendersone8679952021-08-25 13:19:52 -0700829 fold_xi_to_i(ctx, op, 0) ||
Richard Hendersonca7bb042021-08-25 13:14:21 -0700830 fold_xx_to_x(ctx, op)) {
831 return true;
832 }
833 return false;
Richard Henderson2f9f08b2021-08-25 12:03:48 -0700834}
835
836static bool fold_andc(OptContext *ctx, TCGOp *op)
837{
Richard Hendersoncbe42fb2021-08-25 13:02:00 -0700838 if (fold_const2(ctx, op) ||
Richard Henderson0e0a32b2021-08-24 13:18:01 -0700839 fold_xx_to_i(ctx, op, 0) ||
840 fold_ix_to_not(ctx, op, -1)) {
Richard Hendersoncbe42fb2021-08-25 13:02:00 -0700841 return true;
842 }
843 return false;
Richard Henderson2f9f08b2021-08-25 12:03:48 -0700844}
845
Richard Henderson079b0802021-08-24 09:30:59 -0700846static bool fold_brcond(OptContext *ctx, TCGOp *op)
847{
848 TCGCond cond = op->args[2];
Richard Henderson67f84c92021-08-25 08:00:20 -0700849 int i = do_constant_folding_cond(ctx->type, op->args[0], op->args[1], cond);
Richard Henderson079b0802021-08-24 09:30:59 -0700850
851 if (i == 0) {
852 tcg_op_remove(ctx->tcg, op);
853 return true;
854 }
855 if (i > 0) {
856 op->opc = INDEX_op_br;
857 op->args[0] = op->args[3];
858 }
859 return false;
860}
861
Richard Henderson764d2ab2021-08-24 09:22:11 -0700862static bool fold_brcond2(OptContext *ctx, TCGOp *op)
863{
864 TCGCond cond = op->args[4];
865 int i = do_constant_folding_cond2(&op->args[0], &op->args[2], cond);
866 TCGArg label = op->args[5];
867 int inv = 0;
868
869 if (i >= 0) {
870 goto do_brcond_const;
871 }
872
873 switch (cond) {
874 case TCG_COND_LT:
875 case TCG_COND_GE:
876 /*
877 * Simplify LT/GE comparisons vs zero to a single compare
878 * vs the high word of the input.
879 */
880 if (arg_is_const(op->args[2]) && arg_info(op->args[2])->val == 0 &&
881 arg_is_const(op->args[3]) && arg_info(op->args[3])->val == 0) {
882 goto do_brcond_high;
883 }
884 break;
885
886 case TCG_COND_NE:
887 inv = 1;
888 QEMU_FALLTHROUGH;
889 case TCG_COND_EQ:
890 /*
891 * Simplify EQ/NE comparisons where one of the pairs
892 * can be simplified.
893 */
Richard Henderson67f84c92021-08-25 08:00:20 -0700894 i = do_constant_folding_cond(TCG_TYPE_I32, op->args[0],
Richard Henderson764d2ab2021-08-24 09:22:11 -0700895 op->args[2], cond);
896 switch (i ^ inv) {
897 case 0:
898 goto do_brcond_const;
899 case 1:
900 goto do_brcond_high;
901 }
902
Richard Henderson67f84c92021-08-25 08:00:20 -0700903 i = do_constant_folding_cond(TCG_TYPE_I32, op->args[1],
Richard Henderson764d2ab2021-08-24 09:22:11 -0700904 op->args[3], cond);
905 switch (i ^ inv) {
906 case 0:
907 goto do_brcond_const;
908 case 1:
909 op->opc = INDEX_op_brcond_i32;
910 op->args[1] = op->args[2];
911 op->args[2] = cond;
912 op->args[3] = label;
913 break;
914 }
915 break;
916
917 default:
918 break;
919
920 do_brcond_high:
921 op->opc = INDEX_op_brcond_i32;
922 op->args[0] = op->args[1];
923 op->args[1] = op->args[3];
924 op->args[2] = cond;
925 op->args[3] = label;
926 break;
927
928 do_brcond_const:
929 if (i == 0) {
930 tcg_op_remove(ctx->tcg, op);
931 return true;
932 }
933 op->opc = INDEX_op_br;
934 op->args[0] = label;
935 break;
936 }
937 return false;
938}
939
Richard Henderson09bacdc2021-08-24 11:58:12 -0700940static bool fold_bswap(OptContext *ctx, TCGOp *op)
941{
942 if (arg_is_const(op->args[1])) {
943 uint64_t t = arg_info(op->args[1])->val;
944
Richard Henderson67f84c92021-08-25 08:00:20 -0700945 t = do_constant_folding(op->opc, ctx->type, t, op->args[2]);
Richard Henderson09bacdc2021-08-24 11:58:12 -0700946 return tcg_opt_gen_movi(ctx, op, op->args[0], t);
947 }
948 return false;
949}
950
Richard Henderson5cf32be2021-08-24 08:17:08 -0700951static bool fold_call(OptContext *ctx, TCGOp *op)
952{
953 TCGContext *s = ctx->tcg;
954 int nb_oargs = TCGOP_CALLO(op);
955 int nb_iargs = TCGOP_CALLI(op);
956 int flags, i;
957
958 init_arguments(ctx, op, nb_oargs + nb_iargs);
959 copy_propagate(ctx, op, nb_oargs, nb_iargs);
960
961 /* If the function reads or writes globals, reset temp data. */
962 flags = tcg_call_flags(op);
963 if (!(flags & (TCG_CALL_NO_READ_GLOBALS | TCG_CALL_NO_WRITE_GLOBALS))) {
964 int nb_globals = s->nb_globals;
965
966 for (i = 0; i < nb_globals; i++) {
967 if (test_bit(i, ctx->temps_used.l)) {
968 reset_ts(&ctx->tcg->temps[i]);
969 }
970 }
971 }
972
973 /* Reset temp data for outputs. */
974 for (i = 0; i < nb_oargs; i++) {
975 reset_temp(op->args[i]);
976 }
977
978 /* Stop optimizing MB across calls. */
979 ctx->prev_mb = NULL;
980 return true;
981}
982
Richard Henderson30dd0bf2021-08-24 10:51:34 -0700983static bool fold_count_zeros(OptContext *ctx, TCGOp *op)
984{
985 if (arg_is_const(op->args[1])) {
986 uint64_t t = arg_info(op->args[1])->val;
987
988 if (t != 0) {
Richard Henderson67f84c92021-08-25 08:00:20 -0700989 t = do_constant_folding(op->opc, ctx->type, t, 0);
Richard Henderson30dd0bf2021-08-24 10:51:34 -0700990 return tcg_opt_gen_movi(ctx, op, op->args[0], t);
991 }
992 return tcg_opt_gen_mov(ctx, op, op->args[0], op->args[2]);
993 }
994 return false;
995}
996
Richard Henderson2f9f08b2021-08-25 12:03:48 -0700997static bool fold_ctpop(OptContext *ctx, TCGOp *op)
998{
999 return fold_const1(ctx, op);
1000}
1001
Richard Henderson1b1907b2021-08-24 10:47:04 -07001002static bool fold_deposit(OptContext *ctx, TCGOp *op)
1003{
1004 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
1005 uint64_t t1 = arg_info(op->args[1])->val;
1006 uint64_t t2 = arg_info(op->args[2])->val;
1007
1008 t1 = deposit64(t1, op->args[3], op->args[4], t2);
1009 return tcg_opt_gen_movi(ctx, op, op->args[0], t1);
1010 }
1011 return false;
1012}
1013
Richard Henderson2f9f08b2021-08-25 12:03:48 -07001014static bool fold_divide(OptContext *ctx, TCGOp *op)
1015{
1016 return fold_const2(ctx, op);
1017}
1018
Richard Henderson8cdb3fc2021-08-24 12:06:33 -07001019static bool fold_dup(OptContext *ctx, TCGOp *op)
1020{
1021 if (arg_is_const(op->args[1])) {
1022 uint64_t t = arg_info(op->args[1])->val;
1023 t = dup_const(TCGOP_VECE(op), t);
1024 return tcg_opt_gen_movi(ctx, op, op->args[0], t);
1025 }
1026 return false;
1027}
1028
1029static bool fold_dup2(OptContext *ctx, TCGOp *op)
1030{
1031 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
1032 uint64_t t = deposit64(arg_info(op->args[1])->val, 32, 32,
1033 arg_info(op->args[2])->val);
1034 return tcg_opt_gen_movi(ctx, op, op->args[0], t);
1035 }
1036
1037 if (args_are_copies(op->args[1], op->args[2])) {
1038 op->opc = INDEX_op_dup_vec;
1039 TCGOP_VECE(op) = MO_32;
1040 }
1041 return false;
1042}
1043
Richard Henderson2f9f08b2021-08-25 12:03:48 -07001044static bool fold_eqv(OptContext *ctx, TCGOp *op)
1045{
Richard Henderson0e0a32b2021-08-24 13:18:01 -07001046 if (fold_const2(ctx, op) ||
1047 fold_xi_to_not(ctx, op, 0)) {
1048 return true;
1049 }
1050 return false;
Richard Henderson2f9f08b2021-08-25 12:03:48 -07001051}
1052
Richard Hendersonb6617c82021-08-24 10:44:53 -07001053static bool fold_extract(OptContext *ctx, TCGOp *op)
1054{
1055 if (arg_is_const(op->args[1])) {
1056 uint64_t t;
1057
1058 t = arg_info(op->args[1])->val;
1059 t = extract64(t, op->args[2], op->args[3]);
1060 return tcg_opt_gen_movi(ctx, op, op->args[0], t);
1061 }
1062 return false;
1063}
1064
Richard Hendersondcd08992021-08-24 10:41:39 -07001065static bool fold_extract2(OptContext *ctx, TCGOp *op)
1066{
1067 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
1068 uint64_t v1 = arg_info(op->args[1])->val;
1069 uint64_t v2 = arg_info(op->args[2])->val;
1070 int shr = op->args[3];
1071
1072 if (op->opc == INDEX_op_extract2_i64) {
1073 v1 >>= shr;
1074 v2 <<= 64 - shr;
1075 } else {
1076 v1 = (uint32_t)v1 >> shr;
1077 v2 = (int32_t)v2 << (32 - shr);
1078 }
1079 return tcg_opt_gen_movi(ctx, op, op->args[0], v1 | v2);
1080 }
1081 return false;
1082}
1083
Richard Henderson2f9f08b2021-08-25 12:03:48 -07001084static bool fold_exts(OptContext *ctx, TCGOp *op)
1085{
1086 return fold_const1(ctx, op);
1087}
1088
1089static bool fold_extu(OptContext *ctx, TCGOp *op)
1090{
1091 return fold_const1(ctx, op);
1092}
1093
Richard Henderson3eefdf22021-08-25 11:06:43 -07001094static bool fold_mb(OptContext *ctx, TCGOp *op)
1095{
1096 /* Eliminate duplicate and redundant fence instructions. */
1097 if (ctx->prev_mb) {
1098 /*
1099 * Merge two barriers of the same type into one,
1100 * or a weaker barrier into a stronger one,
1101 * or two weaker barriers into a stronger one.
1102 * mb X; mb Y => mb X|Y
1103 * mb; strl => mb; st
1104 * ldaq; mb => ld; mb
1105 * ldaq; strl => ld; mb; st
1106 * Other combinations are also merged into a strong
1107 * barrier. This is stricter than specified but for
1108 * the purposes of TCG is better than not optimizing.
1109 */
1110 ctx->prev_mb->args[0] |= op->args[0];
1111 tcg_op_remove(ctx->tcg, op);
1112 } else {
1113 ctx->prev_mb = op;
1114 }
1115 return true;
1116}
1117
Richard Henderson2cfac7f2021-08-25 13:05:43 -07001118static bool fold_mov(OptContext *ctx, TCGOp *op)
1119{
1120 return tcg_opt_gen_mov(ctx, op, op->args[0], op->args[1]);
1121}
1122
Richard Henderson0c310a32021-08-24 10:37:24 -07001123static bool fold_movcond(OptContext *ctx, TCGOp *op)
1124{
Richard Henderson0c310a32021-08-24 10:37:24 -07001125 TCGCond cond = op->args[5];
Richard Henderson67f84c92021-08-25 08:00:20 -07001126 int i = do_constant_folding_cond(ctx->type, op->args[1], op->args[2], cond);
Richard Henderson0c310a32021-08-24 10:37:24 -07001127
1128 if (i >= 0) {
1129 return tcg_opt_gen_mov(ctx, op, op->args[0], op->args[4 - i]);
1130 }
1131
1132 if (arg_is_const(op->args[3]) && arg_is_const(op->args[4])) {
1133 uint64_t tv = arg_info(op->args[3])->val;
1134 uint64_t fv = arg_info(op->args[4])->val;
Richard Henderson67f84c92021-08-25 08:00:20 -07001135 TCGOpcode opc;
Richard Henderson0c310a32021-08-24 10:37:24 -07001136
Richard Henderson67f84c92021-08-25 08:00:20 -07001137 switch (ctx->type) {
1138 case TCG_TYPE_I32:
1139 opc = INDEX_op_setcond_i32;
1140 break;
1141 case TCG_TYPE_I64:
1142 opc = INDEX_op_setcond_i64;
1143 break;
1144 default:
1145 g_assert_not_reached();
1146 }
Richard Henderson0c310a32021-08-24 10:37:24 -07001147
1148 if (tv == 1 && fv == 0) {
1149 op->opc = opc;
1150 op->args[3] = cond;
1151 } else if (fv == 1 && tv == 0) {
1152 op->opc = opc;
1153 op->args[3] = tcg_invert_cond(cond);
1154 }
1155 }
1156 return false;
1157}
1158
Richard Henderson2f9f08b2021-08-25 12:03:48 -07001159static bool fold_mul(OptContext *ctx, TCGOp *op)
1160{
Richard Hendersone8679952021-08-25 13:19:52 -07001161 if (fold_const2(ctx, op) ||
1162 fold_xi_to_i(ctx, op, 0)) {
1163 return true;
1164 }
1165 return false;
Richard Henderson2f9f08b2021-08-25 12:03:48 -07001166}
1167
1168static bool fold_mul_highpart(OptContext *ctx, TCGOp *op)
1169{
Richard Hendersone8679952021-08-25 13:19:52 -07001170 if (fold_const2(ctx, op) ||
1171 fold_xi_to_i(ctx, op, 0)) {
1172 return true;
1173 }
1174 return false;
Richard Henderson2f9f08b2021-08-25 12:03:48 -07001175}
1176
Richard Henderson6b8ac0d2021-08-24 10:24:12 -07001177static bool fold_mulu2_i32(OptContext *ctx, TCGOp *op)
1178{
1179 if (arg_is_const(op->args[2]) && arg_is_const(op->args[3])) {
1180 uint32_t a = arg_info(op->args[2])->val;
1181 uint32_t b = arg_info(op->args[3])->val;
1182 uint64_t r = (uint64_t)a * b;
1183 TCGArg rl, rh;
1184 TCGOp *op2 = tcg_op_insert_before(ctx->tcg, op, INDEX_op_mov_i32);
1185
1186 rl = op->args[0];
1187 rh = op->args[1];
1188 tcg_opt_gen_movi(ctx, op, rl, (int32_t)r);
1189 tcg_opt_gen_movi(ctx, op2, rh, (int32_t)(r >> 32));
1190 return true;
1191 }
1192 return false;
1193}
1194
Richard Henderson2f9f08b2021-08-25 12:03:48 -07001195static bool fold_nand(OptContext *ctx, TCGOp *op)
1196{
Richard Henderson0e0a32b2021-08-24 13:18:01 -07001197 if (fold_const2(ctx, op) ||
1198 fold_xi_to_not(ctx, op, -1)) {
1199 return true;
1200 }
1201 return false;
Richard Henderson2f9f08b2021-08-25 12:03:48 -07001202}
1203
1204static bool fold_neg(OptContext *ctx, TCGOp *op)
1205{
1206 return fold_const1(ctx, op);
1207}
1208
1209static bool fold_nor(OptContext *ctx, TCGOp *op)
1210{
Richard Henderson0e0a32b2021-08-24 13:18:01 -07001211 if (fold_const2(ctx, op) ||
1212 fold_xi_to_not(ctx, op, 0)) {
1213 return true;
1214 }
1215 return false;
Richard Henderson2f9f08b2021-08-25 12:03:48 -07001216}
1217
1218static bool fold_not(OptContext *ctx, TCGOp *op)
1219{
Richard Henderson0e0a32b2021-08-24 13:18:01 -07001220 if (fold_const1(ctx, op)) {
1221 return true;
1222 }
1223
1224 /* Because of fold_to_not, we want to always return true, via finish. */
1225 finish_folding(ctx, op);
1226 return true;
Richard Henderson2f9f08b2021-08-25 12:03:48 -07001227}
1228
1229static bool fold_or(OptContext *ctx, TCGOp *op)
1230{
Richard Hendersonca7bb042021-08-25 13:14:21 -07001231 if (fold_const2(ctx, op) ||
1232 fold_xx_to_x(ctx, op)) {
1233 return true;
1234 }
1235 return false;
Richard Henderson2f9f08b2021-08-25 12:03:48 -07001236}
1237
1238static bool fold_orc(OptContext *ctx, TCGOp *op)
1239{
Richard Henderson0e0a32b2021-08-24 13:18:01 -07001240 if (fold_const2(ctx, op) ||
1241 fold_ix_to_not(ctx, op, 0)) {
1242 return true;
1243 }
1244 return false;
Richard Henderson2f9f08b2021-08-25 12:03:48 -07001245}
1246
Richard Henderson3eefdf22021-08-25 11:06:43 -07001247static bool fold_qemu_ld(OptContext *ctx, TCGOp *op)
1248{
1249 /* Opcodes that touch guest memory stop the mb optimization. */
1250 ctx->prev_mb = NULL;
1251 return false;
1252}
1253
1254static bool fold_qemu_st(OptContext *ctx, TCGOp *op)
1255{
1256 /* Opcodes that touch guest memory stop the mb optimization. */
1257 ctx->prev_mb = NULL;
1258 return false;
1259}
1260
Richard Henderson2f9f08b2021-08-25 12:03:48 -07001261static bool fold_remainder(OptContext *ctx, TCGOp *op)
1262{
1263 return fold_const2(ctx, op);
1264}
1265
Richard Hendersonc63ff552021-08-24 09:35:30 -07001266static bool fold_setcond(OptContext *ctx, TCGOp *op)
1267{
1268 TCGCond cond = op->args[3];
Richard Henderson67f84c92021-08-25 08:00:20 -07001269 int i = do_constant_folding_cond(ctx->type, op->args[1], op->args[2], cond);
Richard Hendersonc63ff552021-08-24 09:35:30 -07001270
1271 if (i >= 0) {
1272 return tcg_opt_gen_movi(ctx, op, op->args[0], i);
1273 }
1274 return false;
1275}
1276
Richard Hendersonbc47b1a2021-08-24 09:09:35 -07001277static bool fold_setcond2(OptContext *ctx, TCGOp *op)
1278{
1279 TCGCond cond = op->args[5];
1280 int i = do_constant_folding_cond2(&op->args[1], &op->args[3], cond);
1281 int inv = 0;
1282
1283 if (i >= 0) {
1284 goto do_setcond_const;
1285 }
1286
1287 switch (cond) {
1288 case TCG_COND_LT:
1289 case TCG_COND_GE:
1290 /*
1291 * Simplify LT/GE comparisons vs zero to a single compare
1292 * vs the high word of the input.
1293 */
1294 if (arg_is_const(op->args[3]) && arg_info(op->args[3])->val == 0 &&
1295 arg_is_const(op->args[4]) && arg_info(op->args[4])->val == 0) {
1296 goto do_setcond_high;
1297 }
1298 break;
1299
1300 case TCG_COND_NE:
1301 inv = 1;
1302 QEMU_FALLTHROUGH;
1303 case TCG_COND_EQ:
1304 /*
1305 * Simplify EQ/NE comparisons where one of the pairs
1306 * can be simplified.
1307 */
Richard Henderson67f84c92021-08-25 08:00:20 -07001308 i = do_constant_folding_cond(TCG_TYPE_I32, op->args[1],
Richard Hendersonbc47b1a2021-08-24 09:09:35 -07001309 op->args[3], cond);
1310 switch (i ^ inv) {
1311 case 0:
1312 goto do_setcond_const;
1313 case 1:
1314 goto do_setcond_high;
1315 }
1316
Richard Henderson67f84c92021-08-25 08:00:20 -07001317 i = do_constant_folding_cond(TCG_TYPE_I32, op->args[2],
Richard Hendersonbc47b1a2021-08-24 09:09:35 -07001318 op->args[4], cond);
1319 switch (i ^ inv) {
1320 case 0:
1321 goto do_setcond_const;
1322 case 1:
1323 op->args[2] = op->args[3];
1324 op->args[3] = cond;
1325 op->opc = INDEX_op_setcond_i32;
1326 break;
1327 }
1328 break;
1329
1330 default:
1331 break;
1332
1333 do_setcond_high:
1334 op->args[1] = op->args[2];
1335 op->args[2] = op->args[4];
1336 op->args[3] = cond;
1337 op->opc = INDEX_op_setcond_i32;
1338 break;
1339 }
1340 return false;
1341
1342 do_setcond_const:
1343 return tcg_opt_gen_movi(ctx, op, op->args[0], i);
1344}
1345
Richard Hendersonb6617c82021-08-24 10:44:53 -07001346static bool fold_sextract(OptContext *ctx, TCGOp *op)
1347{
1348 if (arg_is_const(op->args[1])) {
1349 uint64_t t;
1350
1351 t = arg_info(op->args[1])->val;
1352 t = sextract64(t, op->args[2], op->args[3]);
1353 return tcg_opt_gen_movi(ctx, op, op->args[0], t);
1354 }
1355 return false;
1356}
1357
Richard Henderson2f9f08b2021-08-25 12:03:48 -07001358static bool fold_shift(OptContext *ctx, TCGOp *op)
1359{
1360 return fold_const2(ctx, op);
1361}
1362
1363static bool fold_sub(OptContext *ctx, TCGOp *op)
1364{
Richard Hendersoncbe42fb2021-08-25 13:02:00 -07001365 if (fold_const2(ctx, op) ||
1366 fold_xx_to_i(ctx, op, 0)) {
1367 return true;
1368 }
1369 return false;
Richard Henderson2f9f08b2021-08-25 12:03:48 -07001370}
1371
Richard Hendersone3f7dc22021-08-24 10:30:38 -07001372static bool fold_sub2_i32(OptContext *ctx, TCGOp *op)
1373{
1374 return fold_addsub2_i32(ctx, op, false);
1375}
1376
Richard Henderson2f9f08b2021-08-25 12:03:48 -07001377static bool fold_xor(OptContext *ctx, TCGOp *op)
1378{
Richard Hendersoncbe42fb2021-08-25 13:02:00 -07001379 if (fold_const2(ctx, op) ||
Richard Henderson0e0a32b2021-08-24 13:18:01 -07001380 fold_xx_to_i(ctx, op, 0) ||
1381 fold_xi_to_not(ctx, op, -1)) {
Richard Hendersoncbe42fb2021-08-25 13:02:00 -07001382 return true;
1383 }
1384 return false;
Richard Henderson2f9f08b2021-08-25 12:03:48 -07001385}
1386
Kirill Batuzov22613af2011-07-07 16:37:13 +04001387/* Propagate constants and copies, fold constant expressions. */
Aurelien Jarno36e60ef2015-06-04 21:53:27 +02001388void tcg_optimize(TCGContext *s)
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001389{
Richard Henderson5cf32be2021-08-24 08:17:08 -07001390 int nb_temps, i;
Richard Hendersond0ed5152021-08-24 07:38:39 -07001391 TCGOp *op, *op_next;
Richard Hendersondc849882021-08-24 07:13:45 -07001392 OptContext ctx = { .tcg = s };
Richard Henderson5d8f5362012-09-21 10:13:38 -07001393
Kirill Batuzov22613af2011-07-07 16:37:13 +04001394 /* Array VALS has an element for each temp.
1395 If this temp holds a constant then its value is kept in VALS' element.
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +02001396 If this temp is a copy of other ones then the other copies are
1397 available through the doubly linked circular list. */
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001398
1399 nb_temps = s->nb_temps;
Richard Henderson8f17a972020-03-30 19:52:02 -07001400 for (i = 0; i < nb_temps; ++i) {
1401 s->temps[i].state_ptr = NULL;
1402 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001403
Richard Henderson15fa08f2017-11-02 15:19:14 +01001404 QTAILQ_FOREACH_SAFE(op, &s->ops, link, op_next) {
Richard Hendersonb1fde412021-08-23 13:07:49 -07001405 uint64_t z_mask, partmask, affected, tmp;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001406 TCGOpcode opc = op->opc;
Richard Henderson5cf32be2021-08-24 08:17:08 -07001407 const TCGOpDef *def;
Richard Henderson404a1482021-08-24 11:08:21 -07001408 bool done = false;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001409
Richard Henderson5cf32be2021-08-24 08:17:08 -07001410 /* Calls are special. */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001411 if (opc == INDEX_op_call) {
Richard Henderson5cf32be2021-08-24 08:17:08 -07001412 fold_call(&ctx, op);
1413 continue;
Richard Hendersoncf066672014-03-22 20:06:52 -07001414 }
Richard Henderson5cf32be2021-08-24 08:17:08 -07001415
1416 def = &tcg_op_defs[opc];
Richard Hendersonec5d4cb2021-08-24 08:20:27 -07001417 init_arguments(&ctx, op, def->nb_oargs + def->nb_iargs);
1418 copy_propagate(&ctx, op, def->nb_oargs, def->nb_iargs);
Kirill Batuzov22613af2011-07-07 16:37:13 +04001419
Richard Henderson67f84c92021-08-25 08:00:20 -07001420 /* Pre-compute the type of the operation. */
1421 if (def->flags & TCG_OPF_VECTOR) {
1422 ctx.type = TCG_TYPE_V64 + TCGOP_VECL(op);
1423 } else if (def->flags & TCG_OPF_64BIT) {
1424 ctx.type = TCG_TYPE_I64;
1425 } else {
1426 ctx.type = TCG_TYPE_I32;
1427 }
1428
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001429 /* For commutative operations make constant second argument */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001430 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001431 CASE_OP_32_64_VEC(add):
1432 CASE_OP_32_64_VEC(mul):
1433 CASE_OP_32_64_VEC(and):
1434 CASE_OP_32_64_VEC(or):
1435 CASE_OP_32_64_VEC(xor):
Richard Hendersoncb25c802011-08-17 14:11:47 -07001436 CASE_OP_32_64(eqv):
1437 CASE_OP_32_64(nand):
1438 CASE_OP_32_64(nor):
Richard Henderson03271522013-08-14 14:35:56 -07001439 CASE_OP_32_64(muluh):
1440 CASE_OP_32_64(mulsh):
Richard Hendersonacd93702016-12-08 12:28:42 -08001441 swap_commutative(op->args[0], &op->args[1], &op->args[2]);
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001442 break;
Aurelien Jarno65a7cce2012-09-06 16:47:14 +02001443 CASE_OP_32_64(brcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001444 if (swap_commutative(-1, &op->args[0], &op->args[1])) {
1445 op->args[2] = tcg_swap_cond(op->args[2]);
Aurelien Jarno65a7cce2012-09-06 16:47:14 +02001446 }
1447 break;
1448 CASE_OP_32_64(setcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001449 if (swap_commutative(op->args[0], &op->args[1], &op->args[2])) {
1450 op->args[3] = tcg_swap_cond(op->args[3]);
Aurelien Jarno65a7cce2012-09-06 16:47:14 +02001451 }
1452 break;
Richard Hendersonfa01a202012-09-21 10:13:37 -07001453 CASE_OP_32_64(movcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001454 if (swap_commutative(-1, &op->args[1], &op->args[2])) {
1455 op->args[5] = tcg_swap_cond(op->args[5]);
Richard Hendersonfa01a202012-09-21 10:13:37 -07001456 }
Richard Henderson5d8f5362012-09-21 10:13:38 -07001457 /* For movcond, we canonicalize the "false" input reg to match
1458 the destination reg so that the tcg backend can implement
1459 a "move if true" operation. */
Richard Hendersonacd93702016-12-08 12:28:42 -08001460 if (swap_commutative(op->args[0], &op->args[4], &op->args[3])) {
1461 op->args[5] = tcg_invert_cond(op->args[5]);
Richard Henderson5d8f5362012-09-21 10:13:38 -07001462 }
Richard Henderson1e484e62012-10-02 11:32:22 -07001463 break;
Richard Hendersond7156f72013-02-19 23:51:52 -08001464 CASE_OP_32_64(add2):
Richard Hendersonacd93702016-12-08 12:28:42 -08001465 swap_commutative(op->args[0], &op->args[2], &op->args[4]);
1466 swap_commutative(op->args[1], &op->args[3], &op->args[5]);
Richard Henderson1e484e62012-10-02 11:32:22 -07001467 break;
Richard Hendersond7156f72013-02-19 23:51:52 -08001468 CASE_OP_32_64(mulu2):
Richard Henderson4d3203f2013-02-19 23:51:53 -08001469 CASE_OP_32_64(muls2):
Richard Hendersonacd93702016-12-08 12:28:42 -08001470 swap_commutative(op->args[0], &op->args[2], &op->args[3]);
Richard Henderson14149682012-10-02 11:32:30 -07001471 break;
Richard Henderson0bfcb862012-10-02 11:32:23 -07001472 case INDEX_op_brcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -08001473 if (swap_commutative2(&op->args[0], &op->args[2])) {
1474 op->args[4] = tcg_swap_cond(op->args[4]);
Richard Henderson0bfcb862012-10-02 11:32:23 -07001475 }
1476 break;
1477 case INDEX_op_setcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -08001478 if (swap_commutative2(&op->args[1], &op->args[3])) {
1479 op->args[5] = tcg_swap_cond(op->args[5]);
Richard Henderson0bfcb862012-10-02 11:32:23 -07001480 }
1481 break;
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001482 default:
1483 break;
1484 }
1485
Richard Henderson2d497542013-03-21 09:13:33 -07001486 /* Simplify expressions for "shift/rot r, 0, a => movi r, 0",
1487 and "sub r, 0, a => neg r, a" case. */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001488 switch (opc) {
Aurelien Jarno01ee5282012-09-06 16:47:14 +02001489 CASE_OP_32_64(shl):
1490 CASE_OP_32_64(shr):
1491 CASE_OP_32_64(sar):
1492 CASE_OP_32_64(rotl):
1493 CASE_OP_32_64(rotr):
Richard Henderson63490392017-06-20 13:43:15 -07001494 if (arg_is_const(op->args[1])
1495 && arg_info(op->args[1])->val == 0) {
Richard Hendersondc849882021-08-24 07:13:45 -07001496 tcg_opt_gen_movi(&ctx, op, op->args[0], 0);
Aurelien Jarno01ee5282012-09-06 16:47:14 +02001497 continue;
1498 }
1499 break;
Richard Henderson170ba882017-11-22 09:07:11 +01001500 CASE_OP_32_64_VEC(sub):
Richard Henderson2d497542013-03-21 09:13:33 -07001501 {
1502 TCGOpcode neg_op;
1503 bool have_neg;
1504
Richard Henderson63490392017-06-20 13:43:15 -07001505 if (arg_is_const(op->args[2])) {
Richard Henderson2d497542013-03-21 09:13:33 -07001506 /* Proceed with possible constant folding. */
1507 break;
1508 }
Richard Henderson67f84c92021-08-25 08:00:20 -07001509 switch (ctx.type) {
1510 case TCG_TYPE_I32:
Richard Henderson2d497542013-03-21 09:13:33 -07001511 neg_op = INDEX_op_neg_i32;
1512 have_neg = TCG_TARGET_HAS_neg_i32;
Richard Henderson67f84c92021-08-25 08:00:20 -07001513 break;
1514 case TCG_TYPE_I64:
Richard Henderson2d497542013-03-21 09:13:33 -07001515 neg_op = INDEX_op_neg_i64;
1516 have_neg = TCG_TARGET_HAS_neg_i64;
Richard Hendersonac383dde2019-04-20 00:27:24 +00001517 break;
Richard Henderson67f84c92021-08-25 08:00:20 -07001518 case TCG_TYPE_V64:
1519 case TCG_TYPE_V128:
1520 case TCG_TYPE_V256:
1521 neg_op = INDEX_op_neg_vec;
1522 have_neg = tcg_can_emit_vec_op(neg_op, ctx.type,
1523 TCGOP_VECE(op)) > 0;
1524 break;
1525 default:
1526 g_assert_not_reached();
Richard Henderson2d497542013-03-21 09:13:33 -07001527 }
1528 if (!have_neg) {
1529 break;
1530 }
Richard Henderson63490392017-06-20 13:43:15 -07001531 if (arg_is_const(op->args[1])
1532 && arg_info(op->args[1])->val == 0) {
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001533 op->opc = neg_op;
Richard Hendersonacd93702016-12-08 12:28:42 -08001534 reset_temp(op->args[0]);
1535 op->args[1] = op->args[2];
Richard Henderson2d497542013-03-21 09:13:33 -07001536 continue;
1537 }
1538 }
1539 break;
Aurelien Jarno01ee5282012-09-06 16:47:14 +02001540 default:
1541 break;
1542 }
1543
Richard Henderson464a1442014-01-31 07:42:11 -06001544 /* Simplify expression for "op r, a, const => mov r, a" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001545 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001546 CASE_OP_32_64_VEC(add):
1547 CASE_OP_32_64_VEC(sub):
1548 CASE_OP_32_64_VEC(or):
1549 CASE_OP_32_64_VEC(xor):
1550 CASE_OP_32_64_VEC(andc):
Kirill Batuzov55c09752011-07-07 16:37:16 +04001551 CASE_OP_32_64(shl):
1552 CASE_OP_32_64(shr):
1553 CASE_OP_32_64(sar):
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001554 CASE_OP_32_64(rotl):
1555 CASE_OP_32_64(rotr):
Richard Henderson63490392017-06-20 13:43:15 -07001556 if (!arg_is_const(op->args[1])
1557 && arg_is_const(op->args[2])
1558 && arg_info(op->args[2])->val == 0) {
Richard Hendersondc849882021-08-24 07:13:45 -07001559 tcg_opt_gen_mov(&ctx, op, op->args[0], op->args[1]);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +02001560 continue;
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001561 }
1562 break;
Richard Henderson170ba882017-11-22 09:07:11 +01001563 CASE_OP_32_64_VEC(and):
1564 CASE_OP_32_64_VEC(orc):
Richard Henderson464a1442014-01-31 07:42:11 -06001565 CASE_OP_32_64(eqv):
Richard Henderson63490392017-06-20 13:43:15 -07001566 if (!arg_is_const(op->args[1])
1567 && arg_is_const(op->args[2])
1568 && arg_info(op->args[2])->val == -1) {
Richard Hendersondc849882021-08-24 07:13:45 -07001569 tcg_opt_gen_mov(&ctx, op, op->args[0], op->args[1]);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +02001570 continue;
Richard Henderson464a1442014-01-31 07:42:11 -06001571 }
1572 break;
Aurelien Jarno56e49432012-09-06 16:47:13 +02001573 default:
1574 break;
1575 }
1576
Aurelien Jarno30312442013-09-03 08:27:38 +02001577 /* Simplify using known-zero bits. Currently only ops with a single
1578 output argument is supported. */
Richard Hendersonb1fde412021-08-23 13:07:49 -07001579 z_mask = -1;
Paolo Bonzini633f6502013-01-11 15:42:53 -08001580 affected = -1;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001581 switch (opc) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001582 CASE_OP_32_64(ext8s):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001583 if ((arg_info(op->args[1])->z_mask & 0x80) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001584 break;
1585 }
Thomas Huthd84568b2020-12-11 16:24:24 +01001586 QEMU_FALLTHROUGH;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001587 CASE_OP_32_64(ext8u):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001588 z_mask = 0xff;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001589 goto and_const;
1590 CASE_OP_32_64(ext16s):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001591 if ((arg_info(op->args[1])->z_mask & 0x8000) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001592 break;
1593 }
Thomas Huthd84568b2020-12-11 16:24:24 +01001594 QEMU_FALLTHROUGH;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001595 CASE_OP_32_64(ext16u):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001596 z_mask = 0xffff;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001597 goto and_const;
1598 case INDEX_op_ext32s_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001599 if ((arg_info(op->args[1])->z_mask & 0x80000000) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001600 break;
1601 }
Thomas Huthd84568b2020-12-11 16:24:24 +01001602 QEMU_FALLTHROUGH;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001603 case INDEX_op_ext32u_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001604 z_mask = 0xffffffffU;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001605 goto and_const;
1606
1607 CASE_OP_32_64(and):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001608 z_mask = arg_info(op->args[2])->z_mask;
Richard Henderson63490392017-06-20 13:43:15 -07001609 if (arg_is_const(op->args[2])) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001610 and_const:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001611 affected = arg_info(op->args[1])->z_mask & ~z_mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001612 }
Richard Hendersonb1fde412021-08-23 13:07:49 -07001613 z_mask = arg_info(op->args[1])->z_mask & z_mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001614 break;
1615
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +02001616 case INDEX_op_ext_i32_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001617 if ((arg_info(op->args[1])->z_mask & 0x80000000) != 0) {
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +02001618 break;
1619 }
Thomas Huthd84568b2020-12-11 16:24:24 +01001620 QEMU_FALLTHROUGH;
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +02001621 case INDEX_op_extu_i32_i64:
1622 /* We do not compute affected as it is a size changing op. */
Richard Hendersonb1fde412021-08-23 13:07:49 -07001623 z_mask = (uint32_t)arg_info(op->args[1])->z_mask;
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +02001624 break;
1625
Richard Henderson23ec69ed2014-01-28 12:03:24 -08001626 CASE_OP_32_64(andc):
1627 /* Known-zeros does not imply known-ones. Therefore unless
Richard Hendersonacd93702016-12-08 12:28:42 -08001628 op->args[2] is constant, we can't infer anything from it. */
Richard Henderson63490392017-06-20 13:43:15 -07001629 if (arg_is_const(op->args[2])) {
Richard Hendersonb1fde412021-08-23 13:07:49 -07001630 z_mask = ~arg_info(op->args[2])->z_mask;
Richard Henderson23ec69ed2014-01-28 12:03:24 -08001631 goto and_const;
1632 }
Richard Henderson63490392017-06-20 13:43:15 -07001633 /* But we certainly know nothing outside args[1] may be set. */
Richard Hendersonb1fde412021-08-23 13:07:49 -07001634 z_mask = arg_info(op->args[1])->z_mask;
Richard Henderson23ec69ed2014-01-28 12:03:24 -08001635 break;
1636
Aurelien Jarnoe46b2252013-09-03 08:27:38 +02001637 case INDEX_op_sar_i32:
Richard Henderson63490392017-06-20 13:43:15 -07001638 if (arg_is_const(op->args[2])) {
1639 tmp = arg_info(op->args[2])->val & 31;
Richard Hendersonb1fde412021-08-23 13:07:49 -07001640 z_mask = (int32_t)arg_info(op->args[1])->z_mask >> tmp;
Aurelien Jarnoe46b2252013-09-03 08:27:38 +02001641 }
1642 break;
1643 case INDEX_op_sar_i64:
Richard Henderson63490392017-06-20 13:43:15 -07001644 if (arg_is_const(op->args[2])) {
1645 tmp = arg_info(op->args[2])->val & 63;
Richard Hendersonb1fde412021-08-23 13:07:49 -07001646 z_mask = (int64_t)arg_info(op->args[1])->z_mask >> tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001647 }
1648 break;
1649
Aurelien Jarnoe46b2252013-09-03 08:27:38 +02001650 case INDEX_op_shr_i32:
Richard Henderson63490392017-06-20 13:43:15 -07001651 if (arg_is_const(op->args[2])) {
1652 tmp = arg_info(op->args[2])->val & 31;
Richard Hendersonb1fde412021-08-23 13:07:49 -07001653 z_mask = (uint32_t)arg_info(op->args[1])->z_mask >> tmp;
Aurelien Jarnoe46b2252013-09-03 08:27:38 +02001654 }
1655 break;
1656 case INDEX_op_shr_i64:
Richard Henderson63490392017-06-20 13:43:15 -07001657 if (arg_is_const(op->args[2])) {
1658 tmp = arg_info(op->args[2])->val & 63;
Richard Hendersonb1fde412021-08-23 13:07:49 -07001659 z_mask = (uint64_t)arg_info(op->args[1])->z_mask >> tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001660 }
1661 break;
1662
Richard Henderson609ad702015-07-24 07:16:00 -07001663 case INDEX_op_extrl_i64_i32:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001664 z_mask = (uint32_t)arg_info(op->args[1])->z_mask;
Richard Henderson609ad702015-07-24 07:16:00 -07001665 break;
1666 case INDEX_op_extrh_i64_i32:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001667 z_mask = (uint64_t)arg_info(op->args[1])->z_mask >> 32;
Richard Henderson4bb7a412013-09-09 17:03:24 -07001668 break;
1669
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001670 CASE_OP_32_64(shl):
Richard Henderson63490392017-06-20 13:43:15 -07001671 if (arg_is_const(op->args[2])) {
1672 tmp = arg_info(op->args[2])->val & (TCG_TARGET_REG_BITS - 1);
Richard Hendersonb1fde412021-08-23 13:07:49 -07001673 z_mask = arg_info(op->args[1])->z_mask << tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001674 }
1675 break;
1676
1677 CASE_OP_32_64(neg):
1678 /* Set to 1 all bits to the left of the rightmost. */
Richard Hendersonb1fde412021-08-23 13:07:49 -07001679 z_mask = -(arg_info(op->args[1])->z_mask
1680 & -arg_info(op->args[1])->z_mask);
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001681 break;
1682
1683 CASE_OP_32_64(deposit):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001684 z_mask = deposit64(arg_info(op->args[1])->z_mask,
1685 op->args[3], op->args[4],
1686 arg_info(op->args[2])->z_mask);
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001687 break;
1688
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001689 CASE_OP_32_64(extract):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001690 z_mask = extract64(arg_info(op->args[1])->z_mask,
1691 op->args[2], op->args[3]);
Richard Hendersonacd93702016-12-08 12:28:42 -08001692 if (op->args[2] == 0) {
Richard Hendersonb1fde412021-08-23 13:07:49 -07001693 affected = arg_info(op->args[1])->z_mask & ~z_mask;
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001694 }
1695 break;
1696 CASE_OP_32_64(sextract):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001697 z_mask = sextract64(arg_info(op->args[1])->z_mask,
1698 op->args[2], op->args[3]);
1699 if (op->args[2] == 0 && (tcg_target_long)z_mask >= 0) {
1700 affected = arg_info(op->args[1])->z_mask & ~z_mask;
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001701 }
1702 break;
1703
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001704 CASE_OP_32_64(or):
1705 CASE_OP_32_64(xor):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001706 z_mask = arg_info(op->args[1])->z_mask
1707 | arg_info(op->args[2])->z_mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001708 break;
1709
Richard Henderson0e28d002016-11-16 09:23:28 +01001710 case INDEX_op_clz_i32:
1711 case INDEX_op_ctz_i32:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001712 z_mask = arg_info(op->args[2])->z_mask | 31;
Richard Henderson0e28d002016-11-16 09:23:28 +01001713 break;
1714
1715 case INDEX_op_clz_i64:
1716 case INDEX_op_ctz_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001717 z_mask = arg_info(op->args[2])->z_mask | 63;
Richard Henderson0e28d002016-11-16 09:23:28 +01001718 break;
1719
Richard Hendersona768e4e2016-11-21 11:13:39 +01001720 case INDEX_op_ctpop_i32:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001721 z_mask = 32 | 31;
Richard Hendersona768e4e2016-11-21 11:13:39 +01001722 break;
1723 case INDEX_op_ctpop_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001724 z_mask = 64 | 63;
Richard Hendersona768e4e2016-11-21 11:13:39 +01001725 break;
1726
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001727 CASE_OP_32_64(setcond):
Richard Hendersona7635512014-04-23 22:18:30 -07001728 case INDEX_op_setcond2_i32:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001729 z_mask = 1;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001730 break;
1731
1732 CASE_OP_32_64(movcond):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001733 z_mask = arg_info(op->args[3])->z_mask
1734 | arg_info(op->args[4])->z_mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001735 break;
1736
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001737 CASE_OP_32_64(ld8u):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001738 z_mask = 0xff;
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001739 break;
1740 CASE_OP_32_64(ld16u):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001741 z_mask = 0xffff;
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001742 break;
1743 case INDEX_op_ld32u_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001744 z_mask = 0xffffffffu;
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001745 break;
1746
1747 CASE_OP_32_64(qemu_ld):
1748 {
Richard Hendersonec5d4cb2021-08-24 08:20:27 -07001749 MemOpIdx oi = op->args[def->nb_oargs + def->nb_iargs];
Tony Nguyen14776ab2019-08-24 04:10:58 +10001750 MemOp mop = get_memop(oi);
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001751 if (!(mop & MO_SIGN)) {
Richard Hendersonb1fde412021-08-23 13:07:49 -07001752 z_mask = (2ULL << ((8 << (mop & MO_SIZE)) - 1)) - 1;
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001753 }
1754 }
1755 break;
1756
Richard Henderson0b76ff82021-06-13 13:04:00 -07001757 CASE_OP_32_64(bswap16):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001758 z_mask = arg_info(op->args[1])->z_mask;
1759 if (z_mask <= 0xffff) {
Richard Henderson0b76ff82021-06-13 13:04:00 -07001760 op->args[2] |= TCG_BSWAP_IZ;
1761 }
Richard Hendersonb1fde412021-08-23 13:07:49 -07001762 z_mask = bswap16(z_mask);
Richard Henderson0b76ff82021-06-13 13:04:00 -07001763 switch (op->args[2] & (TCG_BSWAP_OZ | TCG_BSWAP_OS)) {
1764 case TCG_BSWAP_OZ:
1765 break;
1766 case TCG_BSWAP_OS:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001767 z_mask = (int16_t)z_mask;
Richard Henderson0b76ff82021-06-13 13:04:00 -07001768 break;
1769 default: /* undefined high bits */
Richard Hendersonb1fde412021-08-23 13:07:49 -07001770 z_mask |= MAKE_64BIT_MASK(16, 48);
Richard Henderson0b76ff82021-06-13 13:04:00 -07001771 break;
1772 }
1773 break;
1774
1775 case INDEX_op_bswap32_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001776 z_mask = arg_info(op->args[1])->z_mask;
1777 if (z_mask <= 0xffffffffu) {
Richard Henderson0b76ff82021-06-13 13:04:00 -07001778 op->args[2] |= TCG_BSWAP_IZ;
1779 }
Richard Hendersonb1fde412021-08-23 13:07:49 -07001780 z_mask = bswap32(z_mask);
Richard Henderson0b76ff82021-06-13 13:04:00 -07001781 switch (op->args[2] & (TCG_BSWAP_OZ | TCG_BSWAP_OS)) {
1782 case TCG_BSWAP_OZ:
1783 break;
1784 case TCG_BSWAP_OS:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001785 z_mask = (int32_t)z_mask;
Richard Henderson0b76ff82021-06-13 13:04:00 -07001786 break;
1787 default: /* undefined high bits */
Richard Hendersonb1fde412021-08-23 13:07:49 -07001788 z_mask |= MAKE_64BIT_MASK(32, 32);
Richard Henderson0b76ff82021-06-13 13:04:00 -07001789 break;
1790 }
1791 break;
1792
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001793 default:
1794 break;
1795 }
1796
Richard Hendersonbc8d6882014-06-08 18:24:14 -07001797 /* 32-bit ops generate 32-bit results. For the result is zero test
1798 below, we can ignore high bits, but for further optimizations we
1799 need to record that the high bits contain garbage. */
Richard Hendersonb1fde412021-08-23 13:07:49 -07001800 partmask = z_mask;
Richard Henderson67f84c92021-08-25 08:00:20 -07001801 if (ctx.type == TCG_TYPE_I32) {
Richard Hendersonb1fde412021-08-23 13:07:49 -07001802 z_mask |= ~(tcg_target_ulong)0xffffffffu;
Richard Henderson24666ba2014-05-22 11:14:10 -07001803 partmask &= 0xffffffffu;
1804 affected &= 0xffffffffu;
Aurelien Jarnof096dc92013-09-03 08:27:38 +02001805 }
Richard Henderson137f1f42021-08-24 08:49:25 -07001806 ctx.z_mask = z_mask;
Aurelien Jarnof096dc92013-09-03 08:27:38 +02001807
Richard Henderson24666ba2014-05-22 11:14:10 -07001808 if (partmask == 0) {
Richard Hendersondc849882021-08-24 07:13:45 -07001809 tcg_opt_gen_movi(&ctx, op, op->args[0], 0);
Paolo Bonzini633f6502013-01-11 15:42:53 -08001810 continue;
1811 }
1812 if (affected == 0) {
Richard Hendersondc849882021-08-24 07:13:45 -07001813 tcg_opt_gen_mov(&ctx, op, op->args[0], op->args[1]);
Paolo Bonzini633f6502013-01-11 15:42:53 -08001814 continue;
1815 }
1816
Richard Henderson2cfac7f2021-08-25 13:05:43 -07001817 /*
1818 * Process each opcode.
1819 * Sorted alphabetically by opcode as much as possible.
1820 */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001821 switch (opc) {
Richard Henderson2f9f08b2021-08-25 12:03:48 -07001822 CASE_OP_32_64_VEC(add):
1823 done = fold_add(&ctx, op);
1824 break;
Richard Hendersone3f7dc22021-08-24 10:30:38 -07001825 case INDEX_op_add2_i32:
1826 done = fold_add2_i32(&ctx, op);
1827 break;
Richard Henderson2f9f08b2021-08-25 12:03:48 -07001828 CASE_OP_32_64_VEC(and):
1829 done = fold_and(&ctx, op);
1830 break;
1831 CASE_OP_32_64_VEC(andc):
1832 done = fold_andc(&ctx, op);
1833 break;
Richard Henderson079b0802021-08-24 09:30:59 -07001834 CASE_OP_32_64(brcond):
1835 done = fold_brcond(&ctx, op);
1836 break;
Richard Henderson764d2ab2021-08-24 09:22:11 -07001837 case INDEX_op_brcond2_i32:
1838 done = fold_brcond2(&ctx, op);
1839 break;
Richard Henderson09bacdc2021-08-24 11:58:12 -07001840 CASE_OP_32_64(bswap16):
1841 CASE_OP_32_64(bswap32):
1842 case INDEX_op_bswap64_i64:
1843 done = fold_bswap(&ctx, op);
1844 break;
Richard Henderson30dd0bf2021-08-24 10:51:34 -07001845 CASE_OP_32_64(clz):
1846 CASE_OP_32_64(ctz):
1847 done = fold_count_zeros(&ctx, op);
1848 break;
Richard Henderson2f9f08b2021-08-25 12:03:48 -07001849 CASE_OP_32_64(ctpop):
1850 done = fold_ctpop(&ctx, op);
1851 break;
Richard Henderson1b1907b2021-08-24 10:47:04 -07001852 CASE_OP_32_64(deposit):
1853 done = fold_deposit(&ctx, op);
1854 break;
Richard Henderson2f9f08b2021-08-25 12:03:48 -07001855 CASE_OP_32_64(div):
1856 CASE_OP_32_64(divu):
1857 done = fold_divide(&ctx, op);
1858 break;
Richard Henderson8cdb3fc2021-08-24 12:06:33 -07001859 case INDEX_op_dup_vec:
1860 done = fold_dup(&ctx, op);
1861 break;
1862 case INDEX_op_dup2_vec:
1863 done = fold_dup2(&ctx, op);
1864 break;
Richard Henderson2f9f08b2021-08-25 12:03:48 -07001865 CASE_OP_32_64(eqv):
1866 done = fold_eqv(&ctx, op);
1867 break;
Richard Hendersonb6617c82021-08-24 10:44:53 -07001868 CASE_OP_32_64(extract):
1869 done = fold_extract(&ctx, op);
1870 break;
Richard Hendersondcd08992021-08-24 10:41:39 -07001871 CASE_OP_32_64(extract2):
1872 done = fold_extract2(&ctx, op);
1873 break;
Richard Henderson2f9f08b2021-08-25 12:03:48 -07001874 CASE_OP_32_64(ext8s):
1875 CASE_OP_32_64(ext16s):
1876 case INDEX_op_ext32s_i64:
1877 case INDEX_op_ext_i32_i64:
1878 done = fold_exts(&ctx, op);
1879 break;
1880 CASE_OP_32_64(ext8u):
1881 CASE_OP_32_64(ext16u):
1882 case INDEX_op_ext32u_i64:
1883 case INDEX_op_extu_i32_i64:
1884 case INDEX_op_extrl_i64_i32:
1885 case INDEX_op_extrh_i64_i32:
1886 done = fold_extu(&ctx, op);
1887 break;
Richard Henderson3eefdf22021-08-25 11:06:43 -07001888 case INDEX_op_mb:
1889 done = fold_mb(&ctx, op);
1890 break;
Richard Henderson2cfac7f2021-08-25 13:05:43 -07001891 CASE_OP_32_64_VEC(mov):
1892 done = fold_mov(&ctx, op);
1893 break;
Richard Henderson0c310a32021-08-24 10:37:24 -07001894 CASE_OP_32_64(movcond):
1895 done = fold_movcond(&ctx, op);
1896 break;
Richard Henderson2f9f08b2021-08-25 12:03:48 -07001897 CASE_OP_32_64(mul):
1898 done = fold_mul(&ctx, op);
1899 break;
1900 CASE_OP_32_64(mulsh):
1901 CASE_OP_32_64(muluh):
1902 done = fold_mul_highpart(&ctx, op);
1903 break;
Richard Henderson6b8ac0d2021-08-24 10:24:12 -07001904 case INDEX_op_mulu2_i32:
1905 done = fold_mulu2_i32(&ctx, op);
1906 break;
Richard Henderson2f9f08b2021-08-25 12:03:48 -07001907 CASE_OP_32_64(nand):
1908 done = fold_nand(&ctx, op);
1909 break;
1910 CASE_OP_32_64(neg):
1911 done = fold_neg(&ctx, op);
1912 break;
1913 CASE_OP_32_64(nor):
1914 done = fold_nor(&ctx, op);
1915 break;
1916 CASE_OP_32_64_VEC(not):
1917 done = fold_not(&ctx, op);
1918 break;
1919 CASE_OP_32_64_VEC(or):
1920 done = fold_or(&ctx, op);
1921 break;
1922 CASE_OP_32_64_VEC(orc):
1923 done = fold_orc(&ctx, op);
1924 break;
Richard Henderson3eefdf22021-08-25 11:06:43 -07001925 case INDEX_op_qemu_ld_i32:
1926 case INDEX_op_qemu_ld_i64:
1927 done = fold_qemu_ld(&ctx, op);
1928 break;
1929 case INDEX_op_qemu_st_i32:
1930 case INDEX_op_qemu_st8_i32:
1931 case INDEX_op_qemu_st_i64:
1932 done = fold_qemu_st(&ctx, op);
1933 break;
Richard Henderson2f9f08b2021-08-25 12:03:48 -07001934 CASE_OP_32_64(rem):
1935 CASE_OP_32_64(remu):
1936 done = fold_remainder(&ctx, op);
1937 break;
1938 CASE_OP_32_64(rotl):
1939 CASE_OP_32_64(rotr):
1940 CASE_OP_32_64(sar):
1941 CASE_OP_32_64(shl):
1942 CASE_OP_32_64(shr):
1943 done = fold_shift(&ctx, op);
1944 break;
Richard Hendersonc63ff552021-08-24 09:35:30 -07001945 CASE_OP_32_64(setcond):
1946 done = fold_setcond(&ctx, op);
1947 break;
Richard Hendersonbc47b1a2021-08-24 09:09:35 -07001948 case INDEX_op_setcond2_i32:
1949 done = fold_setcond2(&ctx, op);
1950 break;
Richard Hendersonb6617c82021-08-24 10:44:53 -07001951 CASE_OP_32_64(sextract):
1952 done = fold_sextract(&ctx, op);
1953 break;
Richard Henderson2f9f08b2021-08-25 12:03:48 -07001954 CASE_OP_32_64_VEC(sub):
1955 done = fold_sub(&ctx, op);
1956 break;
Richard Hendersone3f7dc22021-08-24 10:30:38 -07001957 case INDEX_op_sub2_i32:
1958 done = fold_sub2_i32(&ctx, op);
1959 break;
Richard Henderson2f9f08b2021-08-25 12:03:48 -07001960 CASE_OP_32_64_VEC(xor):
1961 done = fold_xor(&ctx, op);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001962 break;
Richard Henderson2cfac7f2021-08-25 13:05:43 -07001963 default:
1964 break;
Richard Hendersonb10f3832021-08-23 22:30:17 -07001965 }
1966
Richard Henderson404a1482021-08-24 11:08:21 -07001967 if (!done) {
1968 finish_folding(&ctx, op);
1969 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001970 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001971}