blob: 805522f99de96c5eab453c943e09da091fa4fbb7 [file] [log] [blame]
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001/*
2 * Optimizations for Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2010 Samsung Electronics.
5 * Contributed by Kirill Batuzov <batuzovk@ispras.ru>
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25
Peter Maydell757e7252016-01-26 18:17:08 +000026#include "qemu/osdep.h"
Philippe Mathieu-Daudédcb32f12020-01-01 12:23:00 +010027#include "tcg/tcg-op.h"
Richard Henderson90163902021-03-18 10:21:45 -060028#include "tcg-internal.h"
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040029
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040030#define CASE_OP_32_64(x) \
31 glue(glue(case INDEX_op_, x), _i32): \
32 glue(glue(case INDEX_op_, x), _i64)
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040033
Richard Henderson170ba882017-11-22 09:07:11 +010034#define CASE_OP_32_64_VEC(x) \
35 glue(glue(case INDEX_op_, x), _i32): \
36 glue(glue(case INDEX_op_, x), _i64): \
37 glue(glue(case INDEX_op_, x), _vec)
38
Richard Henderson6fcb98e2020-03-30 17:44:30 -070039typedef struct TempOptInfo {
Aurelien Jarnob41059d2015-07-27 12:41:44 +020040 bool is_const;
Richard Henderson63490392017-06-20 13:43:15 -070041 TCGTemp *prev_copy;
42 TCGTemp *next_copy;
Richard Henderson54795542020-09-06 16:21:32 -070043 uint64_t val;
Richard Hendersonb1fde412021-08-23 13:07:49 -070044 uint64_t z_mask; /* mask bit is 0 if and only if value bit is 0 */
Richard Henderson6fcb98e2020-03-30 17:44:30 -070045} TempOptInfo;
Kirill Batuzov22613af2011-07-07 16:37:13 +040046
Richard Henderson3b3f8472021-08-23 22:06:31 -070047typedef struct OptContext {
Richard Hendersondc849882021-08-24 07:13:45 -070048 TCGContext *tcg;
Richard Hendersond0ed5152021-08-24 07:38:39 -070049 TCGOp *prev_mb;
Richard Henderson3b3f8472021-08-23 22:06:31 -070050 TCGTempSet temps_used;
Richard Henderson137f1f42021-08-24 08:49:25 -070051
52 /* In flight values from optimization. */
53 uint64_t z_mask;
Richard Henderson3b3f8472021-08-23 22:06:31 -070054} OptContext;
55
Richard Henderson6fcb98e2020-03-30 17:44:30 -070056static inline TempOptInfo *ts_info(TCGTemp *ts)
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020057{
Richard Henderson63490392017-06-20 13:43:15 -070058 return ts->state_ptr;
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020059}
60
Richard Henderson6fcb98e2020-03-30 17:44:30 -070061static inline TempOptInfo *arg_info(TCGArg arg)
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020062{
Richard Henderson63490392017-06-20 13:43:15 -070063 return ts_info(arg_temp(arg));
64}
65
66static inline bool ts_is_const(TCGTemp *ts)
67{
68 return ts_info(ts)->is_const;
69}
70
71static inline bool arg_is_const(TCGArg arg)
72{
73 return ts_is_const(arg_temp(arg));
74}
75
76static inline bool ts_is_copy(TCGTemp *ts)
77{
78 return ts_info(ts)->next_copy != ts;
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020079}
80
Aurelien Jarnob41059d2015-07-27 12:41:44 +020081/* Reset TEMP's state, possibly removing the temp for the list of copies. */
Richard Henderson63490392017-06-20 13:43:15 -070082static void reset_ts(TCGTemp *ts)
Kirill Batuzov22613af2011-07-07 16:37:13 +040083{
Richard Henderson6fcb98e2020-03-30 17:44:30 -070084 TempOptInfo *ti = ts_info(ts);
85 TempOptInfo *pi = ts_info(ti->prev_copy);
86 TempOptInfo *ni = ts_info(ti->next_copy);
Richard Henderson63490392017-06-20 13:43:15 -070087
88 ni->prev_copy = ti->prev_copy;
89 pi->next_copy = ti->next_copy;
90 ti->next_copy = ts;
91 ti->prev_copy = ts;
92 ti->is_const = false;
Richard Hendersonb1fde412021-08-23 13:07:49 -070093 ti->z_mask = -1;
Richard Henderson63490392017-06-20 13:43:15 -070094}
95
96static void reset_temp(TCGArg arg)
97{
98 reset_ts(arg_temp(arg));
Kirill Batuzov22613af2011-07-07 16:37:13 +040099}
100
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200101/* Initialize and activate a temporary. */
Richard Henderson3b3f8472021-08-23 22:06:31 -0700102static void init_ts_info(OptContext *ctx, TCGTemp *ts)
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200103{
Richard Henderson63490392017-06-20 13:43:15 -0700104 size_t idx = temp_idx(ts);
Richard Henderson8f17a972020-03-30 19:52:02 -0700105 TempOptInfo *ti;
Richard Henderson63490392017-06-20 13:43:15 -0700106
Richard Henderson3b3f8472021-08-23 22:06:31 -0700107 if (test_bit(idx, ctx->temps_used.l)) {
Richard Henderson8f17a972020-03-30 19:52:02 -0700108 return;
109 }
Richard Henderson3b3f8472021-08-23 22:06:31 -0700110 set_bit(idx, ctx->temps_used.l);
Richard Henderson8f17a972020-03-30 19:52:02 -0700111
112 ti = ts->state_ptr;
113 if (ti == NULL) {
114 ti = tcg_malloc(sizeof(TempOptInfo));
Richard Henderson63490392017-06-20 13:43:15 -0700115 ts->state_ptr = ti;
Richard Henderson8f17a972020-03-30 19:52:02 -0700116 }
117
118 ti->next_copy = ts;
119 ti->prev_copy = ts;
120 if (ts->kind == TEMP_CONST) {
121 ti->is_const = true;
122 ti->val = ts->val;
Richard Hendersonb1fde412021-08-23 13:07:49 -0700123 ti->z_mask = ts->val;
Richard Henderson8f17a972020-03-30 19:52:02 -0700124 if (TCG_TARGET_REG_BITS > 32 && ts->type == TCG_TYPE_I32) {
125 /* High bits of a 32-bit quantity are garbage. */
Richard Hendersonb1fde412021-08-23 13:07:49 -0700126 ti->z_mask |= ~0xffffffffull;
Richard Hendersonc0522132020-03-29 18:55:52 -0700127 }
Richard Henderson8f17a972020-03-30 19:52:02 -0700128 } else {
129 ti->is_const = false;
Richard Hendersonb1fde412021-08-23 13:07:49 -0700130 ti->z_mask = -1;
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200131 }
132}
133
Richard Henderson63490392017-06-20 13:43:15 -0700134static TCGTemp *find_better_copy(TCGContext *s, TCGTemp *ts)
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200135{
Richard Henderson4c868ce2020-04-23 09:02:23 -0700136 TCGTemp *i, *g, *l;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200137
Richard Henderson4c868ce2020-04-23 09:02:23 -0700138 /* If this is already readonly, we can't do better. */
139 if (temp_readonly(ts)) {
Richard Henderson63490392017-06-20 13:43:15 -0700140 return ts;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200141 }
142
Richard Henderson4c868ce2020-04-23 09:02:23 -0700143 g = l = NULL;
Richard Henderson63490392017-06-20 13:43:15 -0700144 for (i = ts_info(ts)->next_copy; i != ts; i = ts_info(i)->next_copy) {
Richard Henderson4c868ce2020-04-23 09:02:23 -0700145 if (temp_readonly(i)) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200146 return i;
Richard Henderson4c868ce2020-04-23 09:02:23 -0700147 } else if (i->kind > ts->kind) {
148 if (i->kind == TEMP_GLOBAL) {
149 g = i;
150 } else if (i->kind == TEMP_LOCAL) {
151 l = i;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200152 }
153 }
154 }
155
Richard Henderson4c868ce2020-04-23 09:02:23 -0700156 /* If we didn't find a better representation, return the same temp. */
157 return g ? g : l ? l : ts;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200158}
159
Richard Henderson63490392017-06-20 13:43:15 -0700160static bool ts_are_copies(TCGTemp *ts1, TCGTemp *ts2)
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200161{
Richard Henderson63490392017-06-20 13:43:15 -0700162 TCGTemp *i;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200163
Richard Henderson63490392017-06-20 13:43:15 -0700164 if (ts1 == ts2) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200165 return true;
166 }
167
Richard Henderson63490392017-06-20 13:43:15 -0700168 if (!ts_is_copy(ts1) || !ts_is_copy(ts2)) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200169 return false;
170 }
171
Richard Henderson63490392017-06-20 13:43:15 -0700172 for (i = ts_info(ts1)->next_copy; i != ts1; i = ts_info(i)->next_copy) {
173 if (i == ts2) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200174 return true;
175 }
176 }
177
178 return false;
179}
180
Richard Henderson63490392017-06-20 13:43:15 -0700181static bool args_are_copies(TCGArg arg1, TCGArg arg2)
182{
183 return ts_are_copies(arg_temp(arg1), arg_temp(arg2));
184}
185
Richard Henderson6b99d5b2021-08-24 10:57:56 -0700186static bool tcg_opt_gen_mov(OptContext *ctx, TCGOp *op, TCGArg dst, TCGArg src)
Kirill Batuzov22613af2011-07-07 16:37:13 +0400187{
Richard Henderson63490392017-06-20 13:43:15 -0700188 TCGTemp *dst_ts = arg_temp(dst);
189 TCGTemp *src_ts = arg_temp(src);
Richard Henderson170ba882017-11-22 09:07:11 +0100190 const TCGOpDef *def;
Richard Henderson6fcb98e2020-03-30 17:44:30 -0700191 TempOptInfo *di;
192 TempOptInfo *si;
Richard Hendersonb1fde412021-08-23 13:07:49 -0700193 uint64_t z_mask;
Richard Henderson63490392017-06-20 13:43:15 -0700194 TCGOpcode new_op;
195
196 if (ts_are_copies(dst_ts, src_ts)) {
Richard Hendersondc849882021-08-24 07:13:45 -0700197 tcg_op_remove(ctx->tcg, op);
Richard Henderson6b99d5b2021-08-24 10:57:56 -0700198 return true;
Aurelien Jarno53657182015-06-04 21:53:25 +0200199 }
200
Richard Henderson63490392017-06-20 13:43:15 -0700201 reset_ts(dst_ts);
202 di = ts_info(dst_ts);
203 si = ts_info(src_ts);
Richard Henderson170ba882017-11-22 09:07:11 +0100204 def = &tcg_op_defs[op->opc];
205 if (def->flags & TCG_OPF_VECTOR) {
206 new_op = INDEX_op_mov_vec;
207 } else if (def->flags & TCG_OPF_64BIT) {
208 new_op = INDEX_op_mov_i64;
209 } else {
210 new_op = INDEX_op_mov_i32;
211 }
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700212 op->opc = new_op;
Richard Henderson170ba882017-11-22 09:07:11 +0100213 /* TCGOP_VECL and TCGOP_VECE remain unchanged. */
Richard Henderson63490392017-06-20 13:43:15 -0700214 op->args[0] = dst;
215 op->args[1] = src;
Richard Hendersona62f6f52014-05-22 10:59:12 -0700216
Richard Hendersonb1fde412021-08-23 13:07:49 -0700217 z_mask = si->z_mask;
Richard Henderson24666ba2014-05-22 11:14:10 -0700218 if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_mov_i32) {
219 /* High bits of the destination are now garbage. */
Richard Hendersonb1fde412021-08-23 13:07:49 -0700220 z_mask |= ~0xffffffffull;
Richard Henderson24666ba2014-05-22 11:14:10 -0700221 }
Richard Hendersonb1fde412021-08-23 13:07:49 -0700222 di->z_mask = z_mask;
Richard Henderson24666ba2014-05-22 11:14:10 -0700223
Richard Henderson63490392017-06-20 13:43:15 -0700224 if (src_ts->type == dst_ts->type) {
Richard Henderson6fcb98e2020-03-30 17:44:30 -0700225 TempOptInfo *ni = ts_info(si->next_copy);
Richard Henderson63490392017-06-20 13:43:15 -0700226
227 di->next_copy = si->next_copy;
228 di->prev_copy = src_ts;
229 ni->prev_copy = dst_ts;
230 si->next_copy = dst_ts;
231 di->is_const = si->is_const;
232 di->val = si->val;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800233 }
Richard Henderson6b99d5b2021-08-24 10:57:56 -0700234 return true;
Kirill Batuzov22613af2011-07-07 16:37:13 +0400235}
236
Richard Henderson6b99d5b2021-08-24 10:57:56 -0700237static bool tcg_opt_gen_movi(OptContext *ctx, TCGOp *op,
Richard Hendersondc849882021-08-24 07:13:45 -0700238 TCGArg dst, uint64_t val)
Richard Henderson8fe35e02020-03-30 20:42:43 -0700239{
240 const TCGOpDef *def = &tcg_op_defs[op->opc];
241 TCGType type;
242 TCGTemp *tv;
243
244 if (def->flags & TCG_OPF_VECTOR) {
245 type = TCGOP_VECL(op) + TCG_TYPE_V64;
246 } else if (def->flags & TCG_OPF_64BIT) {
247 type = TCG_TYPE_I64;
248 } else {
249 type = TCG_TYPE_I32;
250 }
251
252 /* Convert movi to mov with constant temp. */
253 tv = tcg_constant_internal(type, val);
Richard Henderson3b3f8472021-08-23 22:06:31 -0700254 init_ts_info(ctx, tv);
Richard Henderson6b99d5b2021-08-24 10:57:56 -0700255 return tcg_opt_gen_mov(ctx, op, dst, temp_arg(tv));
Richard Henderson8fe35e02020-03-30 20:42:43 -0700256}
257
Richard Henderson54795542020-09-06 16:21:32 -0700258static uint64_t do_constant_folding_2(TCGOpcode op, uint64_t x, uint64_t y)
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400259{
Richard Henderson03271522013-08-14 14:35:56 -0700260 uint64_t l64, h64;
261
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400262 switch (op) {
263 CASE_OP_32_64(add):
264 return x + y;
265
266 CASE_OP_32_64(sub):
267 return x - y;
268
269 CASE_OP_32_64(mul):
270 return x * y;
271
Kirill Batuzov9a810902011-07-07 16:37:15 +0400272 CASE_OP_32_64(and):
273 return x & y;
274
275 CASE_OP_32_64(or):
276 return x | y;
277
278 CASE_OP_32_64(xor):
279 return x ^ y;
280
Kirill Batuzov55c09752011-07-07 16:37:16 +0400281 case INDEX_op_shl_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700282 return (uint32_t)x << (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400283
Kirill Batuzov55c09752011-07-07 16:37:16 +0400284 case INDEX_op_shl_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700285 return (uint64_t)x << (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400286
287 case INDEX_op_shr_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700288 return (uint32_t)x >> (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400289
Kirill Batuzov55c09752011-07-07 16:37:16 +0400290 case INDEX_op_shr_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700291 return (uint64_t)x >> (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400292
293 case INDEX_op_sar_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700294 return (int32_t)x >> (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400295
Kirill Batuzov55c09752011-07-07 16:37:16 +0400296 case INDEX_op_sar_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700297 return (int64_t)x >> (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400298
299 case INDEX_op_rotr_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700300 return ror32(x, y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400301
Kirill Batuzov55c09752011-07-07 16:37:16 +0400302 case INDEX_op_rotr_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700303 return ror64(x, y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400304
305 case INDEX_op_rotl_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700306 return rol32(x, y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400307
Kirill Batuzov55c09752011-07-07 16:37:16 +0400308 case INDEX_op_rotl_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700309 return rol64(x, y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400310
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700311 CASE_OP_32_64(not):
Kirill Batuzova640f032011-07-07 16:37:17 +0400312 return ~x;
313
Richard Hendersoncb25c802011-08-17 14:11:47 -0700314 CASE_OP_32_64(neg):
315 return -x;
316
317 CASE_OP_32_64(andc):
318 return x & ~y;
319
320 CASE_OP_32_64(orc):
321 return x | ~y;
322
323 CASE_OP_32_64(eqv):
324 return ~(x ^ y);
325
326 CASE_OP_32_64(nand):
327 return ~(x & y);
328
329 CASE_OP_32_64(nor):
330 return ~(x | y);
331
Richard Henderson0e28d002016-11-16 09:23:28 +0100332 case INDEX_op_clz_i32:
333 return (uint32_t)x ? clz32(x) : y;
334
335 case INDEX_op_clz_i64:
336 return x ? clz64(x) : y;
337
338 case INDEX_op_ctz_i32:
339 return (uint32_t)x ? ctz32(x) : y;
340
341 case INDEX_op_ctz_i64:
342 return x ? ctz64(x) : y;
343
Richard Hendersona768e4e2016-11-21 11:13:39 +0100344 case INDEX_op_ctpop_i32:
345 return ctpop32(x);
346
347 case INDEX_op_ctpop_i64:
348 return ctpop64(x);
349
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700350 CASE_OP_32_64(ext8s):
Kirill Batuzova640f032011-07-07 16:37:17 +0400351 return (int8_t)x;
352
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700353 CASE_OP_32_64(ext16s):
Kirill Batuzova640f032011-07-07 16:37:17 +0400354 return (int16_t)x;
355
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700356 CASE_OP_32_64(ext8u):
Kirill Batuzova640f032011-07-07 16:37:17 +0400357 return (uint8_t)x;
358
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700359 CASE_OP_32_64(ext16u):
Kirill Batuzova640f032011-07-07 16:37:17 +0400360 return (uint16_t)x;
361
Richard Henderson64985942018-11-20 08:53:34 +0100362 CASE_OP_32_64(bswap16):
Richard Henderson0b76ff82021-06-13 13:04:00 -0700363 x = bswap16(x);
364 return y & TCG_BSWAP_OS ? (int16_t)x : x;
Richard Henderson64985942018-11-20 08:53:34 +0100365
366 CASE_OP_32_64(bswap32):
Richard Henderson0b76ff82021-06-13 13:04:00 -0700367 x = bswap32(x);
368 return y & TCG_BSWAP_OS ? (int32_t)x : x;
Richard Henderson64985942018-11-20 08:53:34 +0100369
370 case INDEX_op_bswap64_i64:
371 return bswap64(x);
372
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200373 case INDEX_op_ext_i32_i64:
Kirill Batuzova640f032011-07-07 16:37:17 +0400374 case INDEX_op_ext32s_i64:
375 return (int32_t)x;
376
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200377 case INDEX_op_extu_i32_i64:
Richard Henderson609ad702015-07-24 07:16:00 -0700378 case INDEX_op_extrl_i64_i32:
Kirill Batuzova640f032011-07-07 16:37:17 +0400379 case INDEX_op_ext32u_i64:
380 return (uint32_t)x;
Kirill Batuzova640f032011-07-07 16:37:17 +0400381
Richard Henderson609ad702015-07-24 07:16:00 -0700382 case INDEX_op_extrh_i64_i32:
383 return (uint64_t)x >> 32;
384
Richard Henderson03271522013-08-14 14:35:56 -0700385 case INDEX_op_muluh_i32:
386 return ((uint64_t)(uint32_t)x * (uint32_t)y) >> 32;
387 case INDEX_op_mulsh_i32:
388 return ((int64_t)(int32_t)x * (int32_t)y) >> 32;
389
390 case INDEX_op_muluh_i64:
391 mulu64(&l64, &h64, x, y);
392 return h64;
393 case INDEX_op_mulsh_i64:
394 muls64(&l64, &h64, x, y);
395 return h64;
396
Richard Henderson01547f72013-08-14 15:22:46 -0700397 case INDEX_op_div_i32:
398 /* Avoid crashing on divide by zero, otherwise undefined. */
399 return (int32_t)x / ((int32_t)y ? : 1);
400 case INDEX_op_divu_i32:
401 return (uint32_t)x / ((uint32_t)y ? : 1);
402 case INDEX_op_div_i64:
403 return (int64_t)x / ((int64_t)y ? : 1);
404 case INDEX_op_divu_i64:
405 return (uint64_t)x / ((uint64_t)y ? : 1);
406
407 case INDEX_op_rem_i32:
408 return (int32_t)x % ((int32_t)y ? : 1);
409 case INDEX_op_remu_i32:
410 return (uint32_t)x % ((uint32_t)y ? : 1);
411 case INDEX_op_rem_i64:
412 return (int64_t)x % ((int64_t)y ? : 1);
413 case INDEX_op_remu_i64:
414 return (uint64_t)x % ((uint64_t)y ? : 1);
415
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400416 default:
417 fprintf(stderr,
418 "Unrecognized operation %d in do_constant_folding.\n", op);
419 tcg_abort();
420 }
421}
422
Richard Henderson54795542020-09-06 16:21:32 -0700423static uint64_t do_constant_folding(TCGOpcode op, uint64_t x, uint64_t y)
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400424{
Richard Henderson170ba882017-11-22 09:07:11 +0100425 const TCGOpDef *def = &tcg_op_defs[op];
Richard Henderson54795542020-09-06 16:21:32 -0700426 uint64_t res = do_constant_folding_2(op, x, y);
Richard Henderson170ba882017-11-22 09:07:11 +0100427 if (!(def->flags & TCG_OPF_64BIT)) {
Aurelien Jarno29f3ff82015-07-10 18:03:31 +0200428 res = (int32_t)res;
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400429 }
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400430 return res;
431}
432
Richard Henderson9519da72012-10-02 11:32:26 -0700433static bool do_constant_folding_cond_32(uint32_t x, uint32_t y, TCGCond c)
434{
435 switch (c) {
436 case TCG_COND_EQ:
437 return x == y;
438 case TCG_COND_NE:
439 return x != y;
440 case TCG_COND_LT:
441 return (int32_t)x < (int32_t)y;
442 case TCG_COND_GE:
443 return (int32_t)x >= (int32_t)y;
444 case TCG_COND_LE:
445 return (int32_t)x <= (int32_t)y;
446 case TCG_COND_GT:
447 return (int32_t)x > (int32_t)y;
448 case TCG_COND_LTU:
449 return x < y;
450 case TCG_COND_GEU:
451 return x >= y;
452 case TCG_COND_LEU:
453 return x <= y;
454 case TCG_COND_GTU:
455 return x > y;
456 default:
457 tcg_abort();
458 }
459}
460
461static bool do_constant_folding_cond_64(uint64_t x, uint64_t y, TCGCond c)
462{
463 switch (c) {
464 case TCG_COND_EQ:
465 return x == y;
466 case TCG_COND_NE:
467 return x != y;
468 case TCG_COND_LT:
469 return (int64_t)x < (int64_t)y;
470 case TCG_COND_GE:
471 return (int64_t)x >= (int64_t)y;
472 case TCG_COND_LE:
473 return (int64_t)x <= (int64_t)y;
474 case TCG_COND_GT:
475 return (int64_t)x > (int64_t)y;
476 case TCG_COND_LTU:
477 return x < y;
478 case TCG_COND_GEU:
479 return x >= y;
480 case TCG_COND_LEU:
481 return x <= y;
482 case TCG_COND_GTU:
483 return x > y;
484 default:
485 tcg_abort();
486 }
487}
488
489static bool do_constant_folding_cond_eq(TCGCond c)
490{
491 switch (c) {
492 case TCG_COND_GT:
493 case TCG_COND_LTU:
494 case TCG_COND_LT:
495 case TCG_COND_GTU:
496 case TCG_COND_NE:
497 return 0;
498 case TCG_COND_GE:
499 case TCG_COND_GEU:
500 case TCG_COND_LE:
501 case TCG_COND_LEU:
502 case TCG_COND_EQ:
503 return 1;
504 default:
505 tcg_abort();
506 }
507}
508
Richard Henderson8d57bf12021-08-24 08:34:27 -0700509/*
510 * Return -1 if the condition can't be simplified,
511 * and the result of the condition (0 or 1) if it can.
512 */
513static int do_constant_folding_cond(TCGOpcode op, TCGArg x,
514 TCGArg y, TCGCond c)
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200515{
Richard Henderson54795542020-09-06 16:21:32 -0700516 uint64_t xv = arg_info(x)->val;
517 uint64_t yv = arg_info(y)->val;
518
Richard Henderson63490392017-06-20 13:43:15 -0700519 if (arg_is_const(x) && arg_is_const(y)) {
Richard Henderson170ba882017-11-22 09:07:11 +0100520 const TCGOpDef *def = &tcg_op_defs[op];
521 tcg_debug_assert(!(def->flags & TCG_OPF_VECTOR));
522 if (def->flags & TCG_OPF_64BIT) {
Richard Henderson63490392017-06-20 13:43:15 -0700523 return do_constant_folding_cond_64(xv, yv, c);
Richard Henderson170ba882017-11-22 09:07:11 +0100524 } else {
525 return do_constant_folding_cond_32(xv, yv, c);
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200526 }
Richard Henderson63490392017-06-20 13:43:15 -0700527 } else if (args_are_copies(x, y)) {
Richard Henderson9519da72012-10-02 11:32:26 -0700528 return do_constant_folding_cond_eq(c);
Richard Henderson63490392017-06-20 13:43:15 -0700529 } else if (arg_is_const(y) && yv == 0) {
Aurelien Jarnob336ceb2012-09-18 19:37:00 +0200530 switch (c) {
531 case TCG_COND_LTU:
532 return 0;
533 case TCG_COND_GEU:
534 return 1;
535 default:
Richard Henderson8d57bf12021-08-24 08:34:27 -0700536 return -1;
Aurelien Jarnob336ceb2012-09-18 19:37:00 +0200537 }
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200538 }
Richard Henderson8d57bf12021-08-24 08:34:27 -0700539 return -1;
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200540}
541
Richard Henderson8d57bf12021-08-24 08:34:27 -0700542/*
543 * Return -1 if the condition can't be simplified,
544 * and the result of the condition (0 or 1) if it can.
545 */
546static int do_constant_folding_cond2(TCGArg *p1, TCGArg *p2, TCGCond c)
Richard Henderson6c4382f2012-10-02 11:32:27 -0700547{
548 TCGArg al = p1[0], ah = p1[1];
549 TCGArg bl = p2[0], bh = p2[1];
550
Richard Henderson63490392017-06-20 13:43:15 -0700551 if (arg_is_const(bl) && arg_is_const(bh)) {
552 tcg_target_ulong blv = arg_info(bl)->val;
553 tcg_target_ulong bhv = arg_info(bh)->val;
554 uint64_t b = deposit64(blv, 32, 32, bhv);
Richard Henderson6c4382f2012-10-02 11:32:27 -0700555
Richard Henderson63490392017-06-20 13:43:15 -0700556 if (arg_is_const(al) && arg_is_const(ah)) {
557 tcg_target_ulong alv = arg_info(al)->val;
558 tcg_target_ulong ahv = arg_info(ah)->val;
559 uint64_t a = deposit64(alv, 32, 32, ahv);
Richard Henderson6c4382f2012-10-02 11:32:27 -0700560 return do_constant_folding_cond_64(a, b, c);
561 }
562 if (b == 0) {
563 switch (c) {
564 case TCG_COND_LTU:
565 return 0;
566 case TCG_COND_GEU:
567 return 1;
568 default:
569 break;
570 }
571 }
572 }
Richard Henderson63490392017-06-20 13:43:15 -0700573 if (args_are_copies(al, bl) && args_are_copies(ah, bh)) {
Richard Henderson6c4382f2012-10-02 11:32:27 -0700574 return do_constant_folding_cond_eq(c);
575 }
Richard Henderson8d57bf12021-08-24 08:34:27 -0700576 return -1;
Richard Henderson6c4382f2012-10-02 11:32:27 -0700577}
578
Richard Henderson24c9ae42012-10-02 11:32:21 -0700579static bool swap_commutative(TCGArg dest, TCGArg *p1, TCGArg *p2)
580{
581 TCGArg a1 = *p1, a2 = *p2;
582 int sum = 0;
Richard Henderson63490392017-06-20 13:43:15 -0700583 sum += arg_is_const(a1);
584 sum -= arg_is_const(a2);
Richard Henderson24c9ae42012-10-02 11:32:21 -0700585
586 /* Prefer the constant in second argument, and then the form
587 op a, a, b, which is better handled on non-RISC hosts. */
588 if (sum > 0 || (sum == 0 && dest == a2)) {
589 *p1 = a2;
590 *p2 = a1;
591 return true;
592 }
593 return false;
594}
595
Richard Henderson0bfcb862012-10-02 11:32:23 -0700596static bool swap_commutative2(TCGArg *p1, TCGArg *p2)
597{
598 int sum = 0;
Richard Henderson63490392017-06-20 13:43:15 -0700599 sum += arg_is_const(p1[0]);
600 sum += arg_is_const(p1[1]);
601 sum -= arg_is_const(p2[0]);
602 sum -= arg_is_const(p2[1]);
Richard Henderson0bfcb862012-10-02 11:32:23 -0700603 if (sum > 0) {
604 TCGArg t;
605 t = p1[0], p1[0] = p2[0], p2[0] = t;
606 t = p1[1], p1[1] = p2[1], p2[1] = t;
607 return true;
608 }
609 return false;
610}
611
Richard Hendersone2577ea2021-08-24 08:00:48 -0700612static void init_arguments(OptContext *ctx, TCGOp *op, int nb_args)
613{
614 for (int i = 0; i < nb_args; i++) {
615 TCGTemp *ts = arg_temp(op->args[i]);
616 if (ts) {
617 init_ts_info(ctx, ts);
618 }
619 }
620}
621
Richard Henderson8774dde2021-08-24 08:04:47 -0700622static void copy_propagate(OptContext *ctx, TCGOp *op,
623 int nb_oargs, int nb_iargs)
624{
625 TCGContext *s = ctx->tcg;
626
627 for (int i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
628 TCGTemp *ts = arg_temp(op->args[i]);
629 if (ts && ts_is_copy(ts)) {
630 op->args[i] = temp_arg(find_better_copy(s, ts));
631 }
632 }
633}
634
Richard Henderson137f1f42021-08-24 08:49:25 -0700635static void finish_folding(OptContext *ctx, TCGOp *op)
636{
637 const TCGOpDef *def = &tcg_op_defs[op->opc];
638 int i, nb_oargs;
639
640 /*
641 * For an opcode that ends a BB, reset all temp data.
642 * We do no cross-BB optimization.
643 */
644 if (def->flags & TCG_OPF_BB_END) {
645 memset(&ctx->temps_used, 0, sizeof(ctx->temps_used));
646 ctx->prev_mb = NULL;
647 return;
648 }
649
650 nb_oargs = def->nb_oargs;
651 for (i = 0; i < nb_oargs; i++) {
652 reset_temp(op->args[i]);
653 /*
654 * Save the corresponding known-zero bits mask for the
655 * first output argument (only one supported so far).
656 */
657 if (i == 0) {
658 arg_info(op->args[i])->z_mask = ctx->z_mask;
659 }
660 }
661}
662
Richard Henderson2f9f08b2021-08-25 12:03:48 -0700663/*
664 * The fold_* functions return true when processing is complete,
665 * usually by folding the operation to a constant or to a copy,
666 * and calling tcg_opt_gen_{mov,movi}. They may do other things,
667 * like collect information about the value produced, for use in
668 * optimizing a subsequent operation.
669 *
670 * These first fold_* functions are all helpers, used by other
671 * folders for more specific operations.
672 */
673
674static bool fold_const1(OptContext *ctx, TCGOp *op)
675{
676 if (arg_is_const(op->args[1])) {
677 uint64_t t;
678
679 t = arg_info(op->args[1])->val;
680 t = do_constant_folding(op->opc, t, 0);
681 return tcg_opt_gen_movi(ctx, op, op->args[0], t);
682 }
683 return false;
684}
685
686static bool fold_const2(OptContext *ctx, TCGOp *op)
687{
688 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
689 uint64_t t1 = arg_info(op->args[1])->val;
690 uint64_t t2 = arg_info(op->args[2])->val;
691
692 t1 = do_constant_folding(op->opc, t1, t2);
693 return tcg_opt_gen_movi(ctx, op, op->args[0], t1);
694 }
695 return false;
696}
697
698/*
699 * These outermost fold_<op> functions are sorted alphabetically.
700 */
701
702static bool fold_add(OptContext *ctx, TCGOp *op)
703{
704 return fold_const2(ctx, op);
705}
706
707static bool fold_and(OptContext *ctx, TCGOp *op)
708{
709 return fold_const2(ctx, op);
710}
711
712static bool fold_andc(OptContext *ctx, TCGOp *op)
713{
714 return fold_const2(ctx, op);
715}
716
Richard Henderson079b0802021-08-24 09:30:59 -0700717static bool fold_brcond(OptContext *ctx, TCGOp *op)
718{
719 TCGCond cond = op->args[2];
720 int i = do_constant_folding_cond(op->opc, op->args[0], op->args[1], cond);
721
722 if (i == 0) {
723 tcg_op_remove(ctx->tcg, op);
724 return true;
725 }
726 if (i > 0) {
727 op->opc = INDEX_op_br;
728 op->args[0] = op->args[3];
729 }
730 return false;
731}
732
Richard Henderson764d2ab2021-08-24 09:22:11 -0700733static bool fold_brcond2(OptContext *ctx, TCGOp *op)
734{
735 TCGCond cond = op->args[4];
736 int i = do_constant_folding_cond2(&op->args[0], &op->args[2], cond);
737 TCGArg label = op->args[5];
738 int inv = 0;
739
740 if (i >= 0) {
741 goto do_brcond_const;
742 }
743
744 switch (cond) {
745 case TCG_COND_LT:
746 case TCG_COND_GE:
747 /*
748 * Simplify LT/GE comparisons vs zero to a single compare
749 * vs the high word of the input.
750 */
751 if (arg_is_const(op->args[2]) && arg_info(op->args[2])->val == 0 &&
752 arg_is_const(op->args[3]) && arg_info(op->args[3])->val == 0) {
753 goto do_brcond_high;
754 }
755 break;
756
757 case TCG_COND_NE:
758 inv = 1;
759 QEMU_FALLTHROUGH;
760 case TCG_COND_EQ:
761 /*
762 * Simplify EQ/NE comparisons where one of the pairs
763 * can be simplified.
764 */
765 i = do_constant_folding_cond(INDEX_op_brcond_i32, op->args[0],
766 op->args[2], cond);
767 switch (i ^ inv) {
768 case 0:
769 goto do_brcond_const;
770 case 1:
771 goto do_brcond_high;
772 }
773
774 i = do_constant_folding_cond(INDEX_op_brcond_i32, op->args[1],
775 op->args[3], cond);
776 switch (i ^ inv) {
777 case 0:
778 goto do_brcond_const;
779 case 1:
780 op->opc = INDEX_op_brcond_i32;
781 op->args[1] = op->args[2];
782 op->args[2] = cond;
783 op->args[3] = label;
784 break;
785 }
786 break;
787
788 default:
789 break;
790
791 do_brcond_high:
792 op->opc = INDEX_op_brcond_i32;
793 op->args[0] = op->args[1];
794 op->args[1] = op->args[3];
795 op->args[2] = cond;
796 op->args[3] = label;
797 break;
798
799 do_brcond_const:
800 if (i == 0) {
801 tcg_op_remove(ctx->tcg, op);
802 return true;
803 }
804 op->opc = INDEX_op_br;
805 op->args[0] = label;
806 break;
807 }
808 return false;
809}
810
Richard Henderson5cf32be2021-08-24 08:17:08 -0700811static bool fold_call(OptContext *ctx, TCGOp *op)
812{
813 TCGContext *s = ctx->tcg;
814 int nb_oargs = TCGOP_CALLO(op);
815 int nb_iargs = TCGOP_CALLI(op);
816 int flags, i;
817
818 init_arguments(ctx, op, nb_oargs + nb_iargs);
819 copy_propagate(ctx, op, nb_oargs, nb_iargs);
820
821 /* If the function reads or writes globals, reset temp data. */
822 flags = tcg_call_flags(op);
823 if (!(flags & (TCG_CALL_NO_READ_GLOBALS | TCG_CALL_NO_WRITE_GLOBALS))) {
824 int nb_globals = s->nb_globals;
825
826 for (i = 0; i < nb_globals; i++) {
827 if (test_bit(i, ctx->temps_used.l)) {
828 reset_ts(&ctx->tcg->temps[i]);
829 }
830 }
831 }
832
833 /* Reset temp data for outputs. */
834 for (i = 0; i < nb_oargs; i++) {
835 reset_temp(op->args[i]);
836 }
837
838 /* Stop optimizing MB across calls. */
839 ctx->prev_mb = NULL;
840 return true;
841}
842
Richard Henderson2f9f08b2021-08-25 12:03:48 -0700843static bool fold_ctpop(OptContext *ctx, TCGOp *op)
844{
845 return fold_const1(ctx, op);
846}
847
848static bool fold_divide(OptContext *ctx, TCGOp *op)
849{
850 return fold_const2(ctx, op);
851}
852
853static bool fold_eqv(OptContext *ctx, TCGOp *op)
854{
855 return fold_const2(ctx, op);
856}
857
858static bool fold_exts(OptContext *ctx, TCGOp *op)
859{
860 return fold_const1(ctx, op);
861}
862
863static bool fold_extu(OptContext *ctx, TCGOp *op)
864{
865 return fold_const1(ctx, op);
866}
867
Richard Henderson3eefdf22021-08-25 11:06:43 -0700868static bool fold_mb(OptContext *ctx, TCGOp *op)
869{
870 /* Eliminate duplicate and redundant fence instructions. */
871 if (ctx->prev_mb) {
872 /*
873 * Merge two barriers of the same type into one,
874 * or a weaker barrier into a stronger one,
875 * or two weaker barriers into a stronger one.
876 * mb X; mb Y => mb X|Y
877 * mb; strl => mb; st
878 * ldaq; mb => ld; mb
879 * ldaq; strl => ld; mb; st
880 * Other combinations are also merged into a strong
881 * barrier. This is stricter than specified but for
882 * the purposes of TCG is better than not optimizing.
883 */
884 ctx->prev_mb->args[0] |= op->args[0];
885 tcg_op_remove(ctx->tcg, op);
886 } else {
887 ctx->prev_mb = op;
888 }
889 return true;
890}
891
Richard Henderson2f9f08b2021-08-25 12:03:48 -0700892static bool fold_mul(OptContext *ctx, TCGOp *op)
893{
894 return fold_const2(ctx, op);
895}
896
897static bool fold_mul_highpart(OptContext *ctx, TCGOp *op)
898{
899 return fold_const2(ctx, op);
900}
901
Richard Henderson6b8ac0d2021-08-24 10:24:12 -0700902static bool fold_mulu2_i32(OptContext *ctx, TCGOp *op)
903{
904 if (arg_is_const(op->args[2]) && arg_is_const(op->args[3])) {
905 uint32_t a = arg_info(op->args[2])->val;
906 uint32_t b = arg_info(op->args[3])->val;
907 uint64_t r = (uint64_t)a * b;
908 TCGArg rl, rh;
909 TCGOp *op2 = tcg_op_insert_before(ctx->tcg, op, INDEX_op_mov_i32);
910
911 rl = op->args[0];
912 rh = op->args[1];
913 tcg_opt_gen_movi(ctx, op, rl, (int32_t)r);
914 tcg_opt_gen_movi(ctx, op2, rh, (int32_t)(r >> 32));
915 return true;
916 }
917 return false;
918}
919
Richard Henderson2f9f08b2021-08-25 12:03:48 -0700920static bool fold_nand(OptContext *ctx, TCGOp *op)
921{
922 return fold_const2(ctx, op);
923}
924
925static bool fold_neg(OptContext *ctx, TCGOp *op)
926{
927 return fold_const1(ctx, op);
928}
929
930static bool fold_nor(OptContext *ctx, TCGOp *op)
931{
932 return fold_const2(ctx, op);
933}
934
935static bool fold_not(OptContext *ctx, TCGOp *op)
936{
937 return fold_const1(ctx, op);
938}
939
940static bool fold_or(OptContext *ctx, TCGOp *op)
941{
942 return fold_const2(ctx, op);
943}
944
945static bool fold_orc(OptContext *ctx, TCGOp *op)
946{
947 return fold_const2(ctx, op);
948}
949
Richard Henderson3eefdf22021-08-25 11:06:43 -0700950static bool fold_qemu_ld(OptContext *ctx, TCGOp *op)
951{
952 /* Opcodes that touch guest memory stop the mb optimization. */
953 ctx->prev_mb = NULL;
954 return false;
955}
956
957static bool fold_qemu_st(OptContext *ctx, TCGOp *op)
958{
959 /* Opcodes that touch guest memory stop the mb optimization. */
960 ctx->prev_mb = NULL;
961 return false;
962}
963
Richard Henderson2f9f08b2021-08-25 12:03:48 -0700964static bool fold_remainder(OptContext *ctx, TCGOp *op)
965{
966 return fold_const2(ctx, op);
967}
968
Richard Hendersonc63ff552021-08-24 09:35:30 -0700969static bool fold_setcond(OptContext *ctx, TCGOp *op)
970{
971 TCGCond cond = op->args[3];
972 int i = do_constant_folding_cond(op->opc, op->args[1], op->args[2], cond);
973
974 if (i >= 0) {
975 return tcg_opt_gen_movi(ctx, op, op->args[0], i);
976 }
977 return false;
978}
979
Richard Hendersonbc47b1a2021-08-24 09:09:35 -0700980static bool fold_setcond2(OptContext *ctx, TCGOp *op)
981{
982 TCGCond cond = op->args[5];
983 int i = do_constant_folding_cond2(&op->args[1], &op->args[3], cond);
984 int inv = 0;
985
986 if (i >= 0) {
987 goto do_setcond_const;
988 }
989
990 switch (cond) {
991 case TCG_COND_LT:
992 case TCG_COND_GE:
993 /*
994 * Simplify LT/GE comparisons vs zero to a single compare
995 * vs the high word of the input.
996 */
997 if (arg_is_const(op->args[3]) && arg_info(op->args[3])->val == 0 &&
998 arg_is_const(op->args[4]) && arg_info(op->args[4])->val == 0) {
999 goto do_setcond_high;
1000 }
1001 break;
1002
1003 case TCG_COND_NE:
1004 inv = 1;
1005 QEMU_FALLTHROUGH;
1006 case TCG_COND_EQ:
1007 /*
1008 * Simplify EQ/NE comparisons where one of the pairs
1009 * can be simplified.
1010 */
1011 i = do_constant_folding_cond(INDEX_op_setcond_i32, op->args[1],
1012 op->args[3], cond);
1013 switch (i ^ inv) {
1014 case 0:
1015 goto do_setcond_const;
1016 case 1:
1017 goto do_setcond_high;
1018 }
1019
1020 i = do_constant_folding_cond(INDEX_op_setcond_i32, op->args[2],
1021 op->args[4], cond);
1022 switch (i ^ inv) {
1023 case 0:
1024 goto do_setcond_const;
1025 case 1:
1026 op->args[2] = op->args[3];
1027 op->args[3] = cond;
1028 op->opc = INDEX_op_setcond_i32;
1029 break;
1030 }
1031 break;
1032
1033 default:
1034 break;
1035
1036 do_setcond_high:
1037 op->args[1] = op->args[2];
1038 op->args[2] = op->args[4];
1039 op->args[3] = cond;
1040 op->opc = INDEX_op_setcond_i32;
1041 break;
1042 }
1043 return false;
1044
1045 do_setcond_const:
1046 return tcg_opt_gen_movi(ctx, op, op->args[0], i);
1047}
1048
Richard Henderson2f9f08b2021-08-25 12:03:48 -07001049static bool fold_shift(OptContext *ctx, TCGOp *op)
1050{
1051 return fold_const2(ctx, op);
1052}
1053
1054static bool fold_sub(OptContext *ctx, TCGOp *op)
1055{
1056 return fold_const2(ctx, op);
1057}
1058
1059static bool fold_xor(OptContext *ctx, TCGOp *op)
1060{
1061 return fold_const2(ctx, op);
1062}
1063
Kirill Batuzov22613af2011-07-07 16:37:13 +04001064/* Propagate constants and copies, fold constant expressions. */
Aurelien Jarno36e60ef2015-06-04 21:53:27 +02001065void tcg_optimize(TCGContext *s)
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001066{
Richard Henderson5cf32be2021-08-24 08:17:08 -07001067 int nb_temps, i;
Richard Hendersond0ed5152021-08-24 07:38:39 -07001068 TCGOp *op, *op_next;
Richard Hendersondc849882021-08-24 07:13:45 -07001069 OptContext ctx = { .tcg = s };
Richard Henderson5d8f5362012-09-21 10:13:38 -07001070
Kirill Batuzov22613af2011-07-07 16:37:13 +04001071 /* Array VALS has an element for each temp.
1072 If this temp holds a constant then its value is kept in VALS' element.
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +02001073 If this temp is a copy of other ones then the other copies are
1074 available through the doubly linked circular list. */
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001075
1076 nb_temps = s->nb_temps;
Richard Henderson8f17a972020-03-30 19:52:02 -07001077 for (i = 0; i < nb_temps; ++i) {
1078 s->temps[i].state_ptr = NULL;
1079 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001080
Richard Henderson15fa08f2017-11-02 15:19:14 +01001081 QTAILQ_FOREACH_SAFE(op, &s->ops, link, op_next) {
Richard Hendersonb1fde412021-08-23 13:07:49 -07001082 uint64_t z_mask, partmask, affected, tmp;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001083 TCGOpcode opc = op->opc;
Richard Henderson5cf32be2021-08-24 08:17:08 -07001084 const TCGOpDef *def;
Richard Henderson404a1482021-08-24 11:08:21 -07001085 bool done = false;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001086
Richard Henderson5cf32be2021-08-24 08:17:08 -07001087 /* Calls are special. */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001088 if (opc == INDEX_op_call) {
Richard Henderson5cf32be2021-08-24 08:17:08 -07001089 fold_call(&ctx, op);
1090 continue;
Richard Hendersoncf066672014-03-22 20:06:52 -07001091 }
Richard Henderson5cf32be2021-08-24 08:17:08 -07001092
1093 def = &tcg_op_defs[opc];
Richard Hendersonec5d4cb2021-08-24 08:20:27 -07001094 init_arguments(&ctx, op, def->nb_oargs + def->nb_iargs);
1095 copy_propagate(&ctx, op, def->nb_oargs, def->nb_iargs);
Kirill Batuzov22613af2011-07-07 16:37:13 +04001096
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001097 /* For commutative operations make constant second argument */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001098 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001099 CASE_OP_32_64_VEC(add):
1100 CASE_OP_32_64_VEC(mul):
1101 CASE_OP_32_64_VEC(and):
1102 CASE_OP_32_64_VEC(or):
1103 CASE_OP_32_64_VEC(xor):
Richard Hendersoncb25c802011-08-17 14:11:47 -07001104 CASE_OP_32_64(eqv):
1105 CASE_OP_32_64(nand):
1106 CASE_OP_32_64(nor):
Richard Henderson03271522013-08-14 14:35:56 -07001107 CASE_OP_32_64(muluh):
1108 CASE_OP_32_64(mulsh):
Richard Hendersonacd93702016-12-08 12:28:42 -08001109 swap_commutative(op->args[0], &op->args[1], &op->args[2]);
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001110 break;
Aurelien Jarno65a7cce2012-09-06 16:47:14 +02001111 CASE_OP_32_64(brcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001112 if (swap_commutative(-1, &op->args[0], &op->args[1])) {
1113 op->args[2] = tcg_swap_cond(op->args[2]);
Aurelien Jarno65a7cce2012-09-06 16:47:14 +02001114 }
1115 break;
1116 CASE_OP_32_64(setcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001117 if (swap_commutative(op->args[0], &op->args[1], &op->args[2])) {
1118 op->args[3] = tcg_swap_cond(op->args[3]);
Aurelien Jarno65a7cce2012-09-06 16:47:14 +02001119 }
1120 break;
Richard Hendersonfa01a202012-09-21 10:13:37 -07001121 CASE_OP_32_64(movcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001122 if (swap_commutative(-1, &op->args[1], &op->args[2])) {
1123 op->args[5] = tcg_swap_cond(op->args[5]);
Richard Hendersonfa01a202012-09-21 10:13:37 -07001124 }
Richard Henderson5d8f5362012-09-21 10:13:38 -07001125 /* For movcond, we canonicalize the "false" input reg to match
1126 the destination reg so that the tcg backend can implement
1127 a "move if true" operation. */
Richard Hendersonacd93702016-12-08 12:28:42 -08001128 if (swap_commutative(op->args[0], &op->args[4], &op->args[3])) {
1129 op->args[5] = tcg_invert_cond(op->args[5]);
Richard Henderson5d8f5362012-09-21 10:13:38 -07001130 }
Richard Henderson1e484e62012-10-02 11:32:22 -07001131 break;
Richard Hendersond7156f72013-02-19 23:51:52 -08001132 CASE_OP_32_64(add2):
Richard Hendersonacd93702016-12-08 12:28:42 -08001133 swap_commutative(op->args[0], &op->args[2], &op->args[4]);
1134 swap_commutative(op->args[1], &op->args[3], &op->args[5]);
Richard Henderson1e484e62012-10-02 11:32:22 -07001135 break;
Richard Hendersond7156f72013-02-19 23:51:52 -08001136 CASE_OP_32_64(mulu2):
Richard Henderson4d3203f2013-02-19 23:51:53 -08001137 CASE_OP_32_64(muls2):
Richard Hendersonacd93702016-12-08 12:28:42 -08001138 swap_commutative(op->args[0], &op->args[2], &op->args[3]);
Richard Henderson14149682012-10-02 11:32:30 -07001139 break;
Richard Henderson0bfcb862012-10-02 11:32:23 -07001140 case INDEX_op_brcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -08001141 if (swap_commutative2(&op->args[0], &op->args[2])) {
1142 op->args[4] = tcg_swap_cond(op->args[4]);
Richard Henderson0bfcb862012-10-02 11:32:23 -07001143 }
1144 break;
1145 case INDEX_op_setcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -08001146 if (swap_commutative2(&op->args[1], &op->args[3])) {
1147 op->args[5] = tcg_swap_cond(op->args[5]);
Richard Henderson0bfcb862012-10-02 11:32:23 -07001148 }
1149 break;
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001150 default:
1151 break;
1152 }
1153
Richard Henderson2d497542013-03-21 09:13:33 -07001154 /* Simplify expressions for "shift/rot r, 0, a => movi r, 0",
1155 and "sub r, 0, a => neg r, a" case. */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001156 switch (opc) {
Aurelien Jarno01ee5282012-09-06 16:47:14 +02001157 CASE_OP_32_64(shl):
1158 CASE_OP_32_64(shr):
1159 CASE_OP_32_64(sar):
1160 CASE_OP_32_64(rotl):
1161 CASE_OP_32_64(rotr):
Richard Henderson63490392017-06-20 13:43:15 -07001162 if (arg_is_const(op->args[1])
1163 && arg_info(op->args[1])->val == 0) {
Richard Hendersondc849882021-08-24 07:13:45 -07001164 tcg_opt_gen_movi(&ctx, op, op->args[0], 0);
Aurelien Jarno01ee5282012-09-06 16:47:14 +02001165 continue;
1166 }
1167 break;
Richard Henderson170ba882017-11-22 09:07:11 +01001168 CASE_OP_32_64_VEC(sub):
Richard Henderson2d497542013-03-21 09:13:33 -07001169 {
1170 TCGOpcode neg_op;
1171 bool have_neg;
1172
Richard Henderson63490392017-06-20 13:43:15 -07001173 if (arg_is_const(op->args[2])) {
Richard Henderson2d497542013-03-21 09:13:33 -07001174 /* Proceed with possible constant folding. */
1175 break;
1176 }
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001177 if (opc == INDEX_op_sub_i32) {
Richard Henderson2d497542013-03-21 09:13:33 -07001178 neg_op = INDEX_op_neg_i32;
1179 have_neg = TCG_TARGET_HAS_neg_i32;
Richard Henderson170ba882017-11-22 09:07:11 +01001180 } else if (opc == INDEX_op_sub_i64) {
Richard Henderson2d497542013-03-21 09:13:33 -07001181 neg_op = INDEX_op_neg_i64;
1182 have_neg = TCG_TARGET_HAS_neg_i64;
Richard Hendersonac383dde2019-04-20 00:27:24 +00001183 } else if (TCG_TARGET_HAS_neg_vec) {
1184 TCGType type = TCGOP_VECL(op) + TCG_TYPE_V64;
1185 unsigned vece = TCGOP_VECE(op);
Richard Henderson170ba882017-11-22 09:07:11 +01001186 neg_op = INDEX_op_neg_vec;
Richard Hendersonac383dde2019-04-20 00:27:24 +00001187 have_neg = tcg_can_emit_vec_op(neg_op, type, vece) > 0;
1188 } else {
1189 break;
Richard Henderson2d497542013-03-21 09:13:33 -07001190 }
1191 if (!have_neg) {
1192 break;
1193 }
Richard Henderson63490392017-06-20 13:43:15 -07001194 if (arg_is_const(op->args[1])
1195 && arg_info(op->args[1])->val == 0) {
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001196 op->opc = neg_op;
Richard Hendersonacd93702016-12-08 12:28:42 -08001197 reset_temp(op->args[0]);
1198 op->args[1] = op->args[2];
Richard Henderson2d497542013-03-21 09:13:33 -07001199 continue;
1200 }
1201 }
1202 break;
Richard Henderson170ba882017-11-22 09:07:11 +01001203 CASE_OP_32_64_VEC(xor):
Richard Hendersone201b562014-01-28 13:15:38 -08001204 CASE_OP_32_64(nand):
Richard Henderson63490392017-06-20 13:43:15 -07001205 if (!arg_is_const(op->args[1])
1206 && arg_is_const(op->args[2])
1207 && arg_info(op->args[2])->val == -1) {
Richard Hendersone201b562014-01-28 13:15:38 -08001208 i = 1;
1209 goto try_not;
1210 }
1211 break;
1212 CASE_OP_32_64(nor):
Richard Henderson63490392017-06-20 13:43:15 -07001213 if (!arg_is_const(op->args[1])
1214 && arg_is_const(op->args[2])
1215 && arg_info(op->args[2])->val == 0) {
Richard Hendersone201b562014-01-28 13:15:38 -08001216 i = 1;
1217 goto try_not;
1218 }
1219 break;
Richard Henderson170ba882017-11-22 09:07:11 +01001220 CASE_OP_32_64_VEC(andc):
Richard Henderson63490392017-06-20 13:43:15 -07001221 if (!arg_is_const(op->args[2])
1222 && arg_is_const(op->args[1])
1223 && arg_info(op->args[1])->val == -1) {
Richard Hendersone201b562014-01-28 13:15:38 -08001224 i = 2;
1225 goto try_not;
1226 }
1227 break;
Richard Henderson170ba882017-11-22 09:07:11 +01001228 CASE_OP_32_64_VEC(orc):
Richard Hendersone201b562014-01-28 13:15:38 -08001229 CASE_OP_32_64(eqv):
Richard Henderson63490392017-06-20 13:43:15 -07001230 if (!arg_is_const(op->args[2])
1231 && arg_is_const(op->args[1])
1232 && arg_info(op->args[1])->val == 0) {
Richard Hendersone201b562014-01-28 13:15:38 -08001233 i = 2;
1234 goto try_not;
1235 }
1236 break;
1237 try_not:
1238 {
1239 TCGOpcode not_op;
1240 bool have_not;
1241
Richard Henderson170ba882017-11-22 09:07:11 +01001242 if (def->flags & TCG_OPF_VECTOR) {
1243 not_op = INDEX_op_not_vec;
1244 have_not = TCG_TARGET_HAS_not_vec;
1245 } else if (def->flags & TCG_OPF_64BIT) {
Richard Hendersone201b562014-01-28 13:15:38 -08001246 not_op = INDEX_op_not_i64;
1247 have_not = TCG_TARGET_HAS_not_i64;
1248 } else {
1249 not_op = INDEX_op_not_i32;
1250 have_not = TCG_TARGET_HAS_not_i32;
1251 }
1252 if (!have_not) {
1253 break;
1254 }
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001255 op->opc = not_op;
Richard Hendersonacd93702016-12-08 12:28:42 -08001256 reset_temp(op->args[0]);
1257 op->args[1] = op->args[i];
Richard Hendersone201b562014-01-28 13:15:38 -08001258 continue;
1259 }
Aurelien Jarno01ee5282012-09-06 16:47:14 +02001260 default:
1261 break;
1262 }
1263
Richard Henderson464a1442014-01-31 07:42:11 -06001264 /* Simplify expression for "op r, a, const => mov r, a" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001265 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001266 CASE_OP_32_64_VEC(add):
1267 CASE_OP_32_64_VEC(sub):
1268 CASE_OP_32_64_VEC(or):
1269 CASE_OP_32_64_VEC(xor):
1270 CASE_OP_32_64_VEC(andc):
Kirill Batuzov55c09752011-07-07 16:37:16 +04001271 CASE_OP_32_64(shl):
1272 CASE_OP_32_64(shr):
1273 CASE_OP_32_64(sar):
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001274 CASE_OP_32_64(rotl):
1275 CASE_OP_32_64(rotr):
Richard Henderson63490392017-06-20 13:43:15 -07001276 if (!arg_is_const(op->args[1])
1277 && arg_is_const(op->args[2])
1278 && arg_info(op->args[2])->val == 0) {
Richard Hendersondc849882021-08-24 07:13:45 -07001279 tcg_opt_gen_mov(&ctx, op, op->args[0], op->args[1]);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +02001280 continue;
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001281 }
1282 break;
Richard Henderson170ba882017-11-22 09:07:11 +01001283 CASE_OP_32_64_VEC(and):
1284 CASE_OP_32_64_VEC(orc):
Richard Henderson464a1442014-01-31 07:42:11 -06001285 CASE_OP_32_64(eqv):
Richard Henderson63490392017-06-20 13:43:15 -07001286 if (!arg_is_const(op->args[1])
1287 && arg_is_const(op->args[2])
1288 && arg_info(op->args[2])->val == -1) {
Richard Hendersondc849882021-08-24 07:13:45 -07001289 tcg_opt_gen_mov(&ctx, op, op->args[0], op->args[1]);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +02001290 continue;
Richard Henderson464a1442014-01-31 07:42:11 -06001291 }
1292 break;
Aurelien Jarno56e49432012-09-06 16:47:13 +02001293 default:
1294 break;
1295 }
1296
Aurelien Jarno30312442013-09-03 08:27:38 +02001297 /* Simplify using known-zero bits. Currently only ops with a single
1298 output argument is supported. */
Richard Hendersonb1fde412021-08-23 13:07:49 -07001299 z_mask = -1;
Paolo Bonzini633f6502013-01-11 15:42:53 -08001300 affected = -1;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001301 switch (opc) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001302 CASE_OP_32_64(ext8s):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001303 if ((arg_info(op->args[1])->z_mask & 0x80) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001304 break;
1305 }
Thomas Huthd84568b2020-12-11 16:24:24 +01001306 QEMU_FALLTHROUGH;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001307 CASE_OP_32_64(ext8u):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001308 z_mask = 0xff;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001309 goto and_const;
1310 CASE_OP_32_64(ext16s):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001311 if ((arg_info(op->args[1])->z_mask & 0x8000) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001312 break;
1313 }
Thomas Huthd84568b2020-12-11 16:24:24 +01001314 QEMU_FALLTHROUGH;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001315 CASE_OP_32_64(ext16u):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001316 z_mask = 0xffff;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001317 goto and_const;
1318 case INDEX_op_ext32s_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001319 if ((arg_info(op->args[1])->z_mask & 0x80000000) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001320 break;
1321 }
Thomas Huthd84568b2020-12-11 16:24:24 +01001322 QEMU_FALLTHROUGH;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001323 case INDEX_op_ext32u_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001324 z_mask = 0xffffffffU;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001325 goto and_const;
1326
1327 CASE_OP_32_64(and):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001328 z_mask = arg_info(op->args[2])->z_mask;
Richard Henderson63490392017-06-20 13:43:15 -07001329 if (arg_is_const(op->args[2])) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001330 and_const:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001331 affected = arg_info(op->args[1])->z_mask & ~z_mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001332 }
Richard Hendersonb1fde412021-08-23 13:07:49 -07001333 z_mask = arg_info(op->args[1])->z_mask & z_mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001334 break;
1335
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +02001336 case INDEX_op_ext_i32_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001337 if ((arg_info(op->args[1])->z_mask & 0x80000000) != 0) {
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +02001338 break;
1339 }
Thomas Huthd84568b2020-12-11 16:24:24 +01001340 QEMU_FALLTHROUGH;
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +02001341 case INDEX_op_extu_i32_i64:
1342 /* We do not compute affected as it is a size changing op. */
Richard Hendersonb1fde412021-08-23 13:07:49 -07001343 z_mask = (uint32_t)arg_info(op->args[1])->z_mask;
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +02001344 break;
1345
Richard Henderson23ec69ed2014-01-28 12:03:24 -08001346 CASE_OP_32_64(andc):
1347 /* Known-zeros does not imply known-ones. Therefore unless
Richard Hendersonacd93702016-12-08 12:28:42 -08001348 op->args[2] is constant, we can't infer anything from it. */
Richard Henderson63490392017-06-20 13:43:15 -07001349 if (arg_is_const(op->args[2])) {
Richard Hendersonb1fde412021-08-23 13:07:49 -07001350 z_mask = ~arg_info(op->args[2])->z_mask;
Richard Henderson23ec69ed2014-01-28 12:03:24 -08001351 goto and_const;
1352 }
Richard Henderson63490392017-06-20 13:43:15 -07001353 /* But we certainly know nothing outside args[1] may be set. */
Richard Hendersonb1fde412021-08-23 13:07:49 -07001354 z_mask = arg_info(op->args[1])->z_mask;
Richard Henderson23ec69ed2014-01-28 12:03:24 -08001355 break;
1356
Aurelien Jarnoe46b2252013-09-03 08:27:38 +02001357 case INDEX_op_sar_i32:
Richard Henderson63490392017-06-20 13:43:15 -07001358 if (arg_is_const(op->args[2])) {
1359 tmp = arg_info(op->args[2])->val & 31;
Richard Hendersonb1fde412021-08-23 13:07:49 -07001360 z_mask = (int32_t)arg_info(op->args[1])->z_mask >> tmp;
Aurelien Jarnoe46b2252013-09-03 08:27:38 +02001361 }
1362 break;
1363 case INDEX_op_sar_i64:
Richard Henderson63490392017-06-20 13:43:15 -07001364 if (arg_is_const(op->args[2])) {
1365 tmp = arg_info(op->args[2])->val & 63;
Richard Hendersonb1fde412021-08-23 13:07:49 -07001366 z_mask = (int64_t)arg_info(op->args[1])->z_mask >> tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001367 }
1368 break;
1369
Aurelien Jarnoe46b2252013-09-03 08:27:38 +02001370 case INDEX_op_shr_i32:
Richard Henderson63490392017-06-20 13:43:15 -07001371 if (arg_is_const(op->args[2])) {
1372 tmp = arg_info(op->args[2])->val & 31;
Richard Hendersonb1fde412021-08-23 13:07:49 -07001373 z_mask = (uint32_t)arg_info(op->args[1])->z_mask >> tmp;
Aurelien Jarnoe46b2252013-09-03 08:27:38 +02001374 }
1375 break;
1376 case INDEX_op_shr_i64:
Richard Henderson63490392017-06-20 13:43:15 -07001377 if (arg_is_const(op->args[2])) {
1378 tmp = arg_info(op->args[2])->val & 63;
Richard Hendersonb1fde412021-08-23 13:07:49 -07001379 z_mask = (uint64_t)arg_info(op->args[1])->z_mask >> tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001380 }
1381 break;
1382
Richard Henderson609ad702015-07-24 07:16:00 -07001383 case INDEX_op_extrl_i64_i32:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001384 z_mask = (uint32_t)arg_info(op->args[1])->z_mask;
Richard Henderson609ad702015-07-24 07:16:00 -07001385 break;
1386 case INDEX_op_extrh_i64_i32:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001387 z_mask = (uint64_t)arg_info(op->args[1])->z_mask >> 32;
Richard Henderson4bb7a412013-09-09 17:03:24 -07001388 break;
1389
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001390 CASE_OP_32_64(shl):
Richard Henderson63490392017-06-20 13:43:15 -07001391 if (arg_is_const(op->args[2])) {
1392 tmp = arg_info(op->args[2])->val & (TCG_TARGET_REG_BITS - 1);
Richard Hendersonb1fde412021-08-23 13:07:49 -07001393 z_mask = arg_info(op->args[1])->z_mask << tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001394 }
1395 break;
1396
1397 CASE_OP_32_64(neg):
1398 /* Set to 1 all bits to the left of the rightmost. */
Richard Hendersonb1fde412021-08-23 13:07:49 -07001399 z_mask = -(arg_info(op->args[1])->z_mask
1400 & -arg_info(op->args[1])->z_mask);
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001401 break;
1402
1403 CASE_OP_32_64(deposit):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001404 z_mask = deposit64(arg_info(op->args[1])->z_mask,
1405 op->args[3], op->args[4],
1406 arg_info(op->args[2])->z_mask);
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001407 break;
1408
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001409 CASE_OP_32_64(extract):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001410 z_mask = extract64(arg_info(op->args[1])->z_mask,
1411 op->args[2], op->args[3]);
Richard Hendersonacd93702016-12-08 12:28:42 -08001412 if (op->args[2] == 0) {
Richard Hendersonb1fde412021-08-23 13:07:49 -07001413 affected = arg_info(op->args[1])->z_mask & ~z_mask;
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001414 }
1415 break;
1416 CASE_OP_32_64(sextract):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001417 z_mask = sextract64(arg_info(op->args[1])->z_mask,
1418 op->args[2], op->args[3]);
1419 if (op->args[2] == 0 && (tcg_target_long)z_mask >= 0) {
1420 affected = arg_info(op->args[1])->z_mask & ~z_mask;
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001421 }
1422 break;
1423
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001424 CASE_OP_32_64(or):
1425 CASE_OP_32_64(xor):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001426 z_mask = arg_info(op->args[1])->z_mask
1427 | arg_info(op->args[2])->z_mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001428 break;
1429
Richard Henderson0e28d002016-11-16 09:23:28 +01001430 case INDEX_op_clz_i32:
1431 case INDEX_op_ctz_i32:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001432 z_mask = arg_info(op->args[2])->z_mask | 31;
Richard Henderson0e28d002016-11-16 09:23:28 +01001433 break;
1434
1435 case INDEX_op_clz_i64:
1436 case INDEX_op_ctz_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001437 z_mask = arg_info(op->args[2])->z_mask | 63;
Richard Henderson0e28d002016-11-16 09:23:28 +01001438 break;
1439
Richard Hendersona768e4e2016-11-21 11:13:39 +01001440 case INDEX_op_ctpop_i32:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001441 z_mask = 32 | 31;
Richard Hendersona768e4e2016-11-21 11:13:39 +01001442 break;
1443 case INDEX_op_ctpop_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001444 z_mask = 64 | 63;
Richard Hendersona768e4e2016-11-21 11:13:39 +01001445 break;
1446
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001447 CASE_OP_32_64(setcond):
Richard Hendersona7635512014-04-23 22:18:30 -07001448 case INDEX_op_setcond2_i32:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001449 z_mask = 1;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001450 break;
1451
1452 CASE_OP_32_64(movcond):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001453 z_mask = arg_info(op->args[3])->z_mask
1454 | arg_info(op->args[4])->z_mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001455 break;
1456
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001457 CASE_OP_32_64(ld8u):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001458 z_mask = 0xff;
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001459 break;
1460 CASE_OP_32_64(ld16u):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001461 z_mask = 0xffff;
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001462 break;
1463 case INDEX_op_ld32u_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001464 z_mask = 0xffffffffu;
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001465 break;
1466
1467 CASE_OP_32_64(qemu_ld):
1468 {
Richard Hendersonec5d4cb2021-08-24 08:20:27 -07001469 MemOpIdx oi = op->args[def->nb_oargs + def->nb_iargs];
Tony Nguyen14776ab2019-08-24 04:10:58 +10001470 MemOp mop = get_memop(oi);
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001471 if (!(mop & MO_SIGN)) {
Richard Hendersonb1fde412021-08-23 13:07:49 -07001472 z_mask = (2ULL << ((8 << (mop & MO_SIZE)) - 1)) - 1;
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001473 }
1474 }
1475 break;
1476
Richard Henderson0b76ff82021-06-13 13:04:00 -07001477 CASE_OP_32_64(bswap16):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001478 z_mask = arg_info(op->args[1])->z_mask;
1479 if (z_mask <= 0xffff) {
Richard Henderson0b76ff82021-06-13 13:04:00 -07001480 op->args[2] |= TCG_BSWAP_IZ;
1481 }
Richard Hendersonb1fde412021-08-23 13:07:49 -07001482 z_mask = bswap16(z_mask);
Richard Henderson0b76ff82021-06-13 13:04:00 -07001483 switch (op->args[2] & (TCG_BSWAP_OZ | TCG_BSWAP_OS)) {
1484 case TCG_BSWAP_OZ:
1485 break;
1486 case TCG_BSWAP_OS:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001487 z_mask = (int16_t)z_mask;
Richard Henderson0b76ff82021-06-13 13:04:00 -07001488 break;
1489 default: /* undefined high bits */
Richard Hendersonb1fde412021-08-23 13:07:49 -07001490 z_mask |= MAKE_64BIT_MASK(16, 48);
Richard Henderson0b76ff82021-06-13 13:04:00 -07001491 break;
1492 }
1493 break;
1494
1495 case INDEX_op_bswap32_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001496 z_mask = arg_info(op->args[1])->z_mask;
1497 if (z_mask <= 0xffffffffu) {
Richard Henderson0b76ff82021-06-13 13:04:00 -07001498 op->args[2] |= TCG_BSWAP_IZ;
1499 }
Richard Hendersonb1fde412021-08-23 13:07:49 -07001500 z_mask = bswap32(z_mask);
Richard Henderson0b76ff82021-06-13 13:04:00 -07001501 switch (op->args[2] & (TCG_BSWAP_OZ | TCG_BSWAP_OS)) {
1502 case TCG_BSWAP_OZ:
1503 break;
1504 case TCG_BSWAP_OS:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001505 z_mask = (int32_t)z_mask;
Richard Henderson0b76ff82021-06-13 13:04:00 -07001506 break;
1507 default: /* undefined high bits */
Richard Hendersonb1fde412021-08-23 13:07:49 -07001508 z_mask |= MAKE_64BIT_MASK(32, 32);
Richard Henderson0b76ff82021-06-13 13:04:00 -07001509 break;
1510 }
1511 break;
1512
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001513 default:
1514 break;
1515 }
1516
Richard Hendersonbc8d6882014-06-08 18:24:14 -07001517 /* 32-bit ops generate 32-bit results. For the result is zero test
1518 below, we can ignore high bits, but for further optimizations we
1519 need to record that the high bits contain garbage. */
Richard Hendersonb1fde412021-08-23 13:07:49 -07001520 partmask = z_mask;
Richard Hendersonbc8d6882014-06-08 18:24:14 -07001521 if (!(def->flags & TCG_OPF_64BIT)) {
Richard Hendersonb1fde412021-08-23 13:07:49 -07001522 z_mask |= ~(tcg_target_ulong)0xffffffffu;
Richard Henderson24666ba2014-05-22 11:14:10 -07001523 partmask &= 0xffffffffu;
1524 affected &= 0xffffffffu;
Aurelien Jarnof096dc92013-09-03 08:27:38 +02001525 }
Richard Henderson137f1f42021-08-24 08:49:25 -07001526 ctx.z_mask = z_mask;
Aurelien Jarnof096dc92013-09-03 08:27:38 +02001527
Richard Henderson24666ba2014-05-22 11:14:10 -07001528 if (partmask == 0) {
Richard Hendersondc849882021-08-24 07:13:45 -07001529 tcg_opt_gen_movi(&ctx, op, op->args[0], 0);
Paolo Bonzini633f6502013-01-11 15:42:53 -08001530 continue;
1531 }
1532 if (affected == 0) {
Richard Hendersondc849882021-08-24 07:13:45 -07001533 tcg_opt_gen_mov(&ctx, op, op->args[0], op->args[1]);
Paolo Bonzini633f6502013-01-11 15:42:53 -08001534 continue;
1535 }
1536
Aurelien Jarno56e49432012-09-06 16:47:13 +02001537 /* Simplify expression for "op r, a, 0 => movi r, 0" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001538 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001539 CASE_OP_32_64_VEC(and):
1540 CASE_OP_32_64_VEC(mul):
Richard Henderson03271522013-08-14 14:35:56 -07001541 CASE_OP_32_64(muluh):
1542 CASE_OP_32_64(mulsh):
Richard Henderson63490392017-06-20 13:43:15 -07001543 if (arg_is_const(op->args[2])
1544 && arg_info(op->args[2])->val == 0) {
Richard Hendersondc849882021-08-24 07:13:45 -07001545 tcg_opt_gen_movi(&ctx, op, op->args[0], 0);
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001546 continue;
1547 }
1548 break;
Aurelien Jarno56e49432012-09-06 16:47:13 +02001549 default:
1550 break;
1551 }
1552
1553 /* Simplify expression for "op r, a, a => mov r, a" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001554 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001555 CASE_OP_32_64_VEC(or):
1556 CASE_OP_32_64_VEC(and):
Richard Henderson63490392017-06-20 13:43:15 -07001557 if (args_are_copies(op->args[1], op->args[2])) {
Richard Hendersondc849882021-08-24 07:13:45 -07001558 tcg_opt_gen_mov(&ctx, op, op->args[0], op->args[1]);
Kirill Batuzov9a810902011-07-07 16:37:15 +04001559 continue;
1560 }
1561 break;
Blue Swirlfe0de7a2011-07-30 19:18:32 +00001562 default:
1563 break;
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001564 }
1565
Aurelien Jarno3c941932012-09-18 19:12:36 +02001566 /* Simplify expression for "op r, a, a => movi r, 0" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001567 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001568 CASE_OP_32_64_VEC(andc):
1569 CASE_OP_32_64_VEC(sub):
1570 CASE_OP_32_64_VEC(xor):
Richard Henderson63490392017-06-20 13:43:15 -07001571 if (args_are_copies(op->args[1], op->args[2])) {
Richard Hendersondc849882021-08-24 07:13:45 -07001572 tcg_opt_gen_movi(&ctx, op, op->args[0], 0);
Aurelien Jarno3c941932012-09-18 19:12:36 +02001573 continue;
1574 }
1575 break;
1576 default:
1577 break;
1578 }
1579
Kirill Batuzov22613af2011-07-07 16:37:13 +04001580 /* Propagate constants through copy operations and do constant
1581 folding. Constants will be substituted to arguments by register
1582 allocator where needed and possible. Also detect copies. */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001583 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001584 CASE_OP_32_64_VEC(mov):
Richard Henderson404a1482021-08-24 11:08:21 -07001585 done = tcg_opt_gen_mov(&ctx, op, op->args[0], op->args[1]);
1586 break;
Richard Henderson6e14e912012-10-02 11:32:24 -07001587
Richard Henderson170ba882017-11-22 09:07:11 +01001588 case INDEX_op_dup_vec:
1589 if (arg_is_const(op->args[1])) {
1590 tmp = arg_info(op->args[1])->val;
1591 tmp = dup_const(TCGOP_VECE(op), tmp);
Richard Hendersondc849882021-08-24 07:13:45 -07001592 tcg_opt_gen_movi(&ctx, op, op->args[0], tmp);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001593 continue;
Richard Henderson170ba882017-11-22 09:07:11 +01001594 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001595 break;
Richard Henderson170ba882017-11-22 09:07:11 +01001596
Richard Henderson1dc4fe72020-09-05 17:03:35 -07001597 case INDEX_op_dup2_vec:
1598 assert(TCG_TARGET_REG_BITS == 32);
1599 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
Richard Hendersondc849882021-08-24 07:13:45 -07001600 tcg_opt_gen_movi(&ctx, op, op->args[0],
Richard Henderson0b4286d2020-09-06 17:33:18 -07001601 deposit64(arg_info(op->args[1])->val, 32, 32,
1602 arg_info(op->args[2])->val));
Richard Hendersonb10f3832021-08-23 22:30:17 -07001603 continue;
Richard Henderson1dc4fe72020-09-05 17:03:35 -07001604 } else if (args_are_copies(op->args[1], op->args[2])) {
1605 op->opc = INDEX_op_dup_vec;
1606 TCGOP_VECE(op) = MO_32;
Richard Henderson1dc4fe72020-09-05 17:03:35 -07001607 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001608 break;
Richard Henderson1dc4fe72020-09-05 17:03:35 -07001609
Richard Henderson0b76ff82021-06-13 13:04:00 -07001610 CASE_OP_32_64(bswap16):
1611 CASE_OP_32_64(bswap32):
1612 case INDEX_op_bswap64_i64:
1613 if (arg_is_const(op->args[1])) {
1614 tmp = do_constant_folding(opc, arg_info(op->args[1])->val,
1615 op->args[2]);
Richard Hendersondc849882021-08-24 07:13:45 -07001616 tcg_opt_gen_movi(&ctx, op, op->args[0], tmp);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001617 continue;
Richard Henderson0b76ff82021-06-13 13:04:00 -07001618 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001619 break;
Richard Henderson0b76ff82021-06-13 13:04:00 -07001620
Richard Henderson0e28d002016-11-16 09:23:28 +01001621 CASE_OP_32_64(clz):
1622 CASE_OP_32_64(ctz):
Richard Henderson63490392017-06-20 13:43:15 -07001623 if (arg_is_const(op->args[1])) {
1624 TCGArg v = arg_info(op->args[1])->val;
Richard Henderson0e28d002016-11-16 09:23:28 +01001625 if (v != 0) {
1626 tmp = do_constant_folding(opc, v, 0);
Richard Hendersondc849882021-08-24 07:13:45 -07001627 tcg_opt_gen_movi(&ctx, op, op->args[0], tmp);
Richard Henderson0e28d002016-11-16 09:23:28 +01001628 } else {
Richard Hendersondc849882021-08-24 07:13:45 -07001629 tcg_opt_gen_mov(&ctx, op, op->args[0], op->args[2]);
Richard Henderson0e28d002016-11-16 09:23:28 +01001630 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001631 continue;
Richard Henderson0e28d002016-11-16 09:23:28 +01001632 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001633 break;
Richard Henderson0e28d002016-11-16 09:23:28 +01001634
Aurelien Jarno7ef55fc2012-09-21 11:07:29 +02001635 CASE_OP_32_64(deposit):
Richard Henderson63490392017-06-20 13:43:15 -07001636 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
1637 tmp = deposit64(arg_info(op->args[1])->val,
1638 op->args[3], op->args[4],
1639 arg_info(op->args[2])->val);
Richard Hendersondc849882021-08-24 07:13:45 -07001640 tcg_opt_gen_movi(&ctx, op, op->args[0], tmp);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001641 continue;
Aurelien Jarno7ef55fc2012-09-21 11:07:29 +02001642 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001643 break;
Richard Henderson6e14e912012-10-02 11:32:24 -07001644
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001645 CASE_OP_32_64(extract):
Richard Henderson63490392017-06-20 13:43:15 -07001646 if (arg_is_const(op->args[1])) {
1647 tmp = extract64(arg_info(op->args[1])->val,
Richard Hendersonacd93702016-12-08 12:28:42 -08001648 op->args[2], op->args[3]);
Richard Hendersondc849882021-08-24 07:13:45 -07001649 tcg_opt_gen_movi(&ctx, op, op->args[0], tmp);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001650 continue;
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001651 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001652 break;
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001653
1654 CASE_OP_32_64(sextract):
Richard Henderson63490392017-06-20 13:43:15 -07001655 if (arg_is_const(op->args[1])) {
1656 tmp = sextract64(arg_info(op->args[1])->val,
Richard Hendersonacd93702016-12-08 12:28:42 -08001657 op->args[2], op->args[3]);
Richard Hendersondc849882021-08-24 07:13:45 -07001658 tcg_opt_gen_movi(&ctx, op, op->args[0], tmp);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001659 continue;
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001660 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001661 break;
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001662
Richard Hendersonfce12962019-02-25 10:29:25 -08001663 CASE_OP_32_64(extract2):
1664 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
Richard Henderson54795542020-09-06 16:21:32 -07001665 uint64_t v1 = arg_info(op->args[1])->val;
1666 uint64_t v2 = arg_info(op->args[2])->val;
1667 int shr = op->args[3];
Richard Hendersonfce12962019-02-25 10:29:25 -08001668
1669 if (opc == INDEX_op_extract2_i64) {
Richard Henderson54795542020-09-06 16:21:32 -07001670 tmp = (v1 >> shr) | (v2 << (64 - shr));
Richard Hendersonfce12962019-02-25 10:29:25 -08001671 } else {
Richard Henderson54795542020-09-06 16:21:32 -07001672 tmp = (int32_t)(((uint32_t)v1 >> shr) |
1673 ((uint32_t)v2 << (32 - shr)));
Richard Hendersonfce12962019-02-25 10:29:25 -08001674 }
Richard Hendersondc849882021-08-24 07:13:45 -07001675 tcg_opt_gen_movi(&ctx, op, op->args[0], tmp);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001676 continue;
Richard Hendersonfce12962019-02-25 10:29:25 -08001677 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001678 break;
Richard Hendersonfce12962019-02-25 10:29:25 -08001679
Richard Hendersonfa01a202012-09-21 10:13:37 -07001680 CASE_OP_32_64(movcond):
Richard Henderson8d57bf12021-08-24 08:34:27 -07001681 i = do_constant_folding_cond(opc, op->args[1],
1682 op->args[2], op->args[5]);
1683 if (i >= 0) {
1684 tcg_opt_gen_mov(&ctx, op, op->args[0], op->args[4 - i]);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001685 continue;
Richard Hendersonfa01a202012-09-21 10:13:37 -07001686 }
Richard Henderson63490392017-06-20 13:43:15 -07001687 if (arg_is_const(op->args[3]) && arg_is_const(op->args[4])) {
Richard Henderson54795542020-09-06 16:21:32 -07001688 uint64_t tv = arg_info(op->args[3])->val;
1689 uint64_t fv = arg_info(op->args[4])->val;
Richard Hendersonacd93702016-12-08 12:28:42 -08001690 TCGCond cond = op->args[5];
Richard Henderson54795542020-09-06 16:21:32 -07001691
Richard Henderson333b21b2016-10-23 20:44:32 -07001692 if (fv == 1 && tv == 0) {
1693 cond = tcg_invert_cond(cond);
1694 } else if (!(tv == 1 && fv == 0)) {
Richard Hendersonb10f3832021-08-23 22:30:17 -07001695 break;
Richard Henderson333b21b2016-10-23 20:44:32 -07001696 }
Richard Hendersonacd93702016-12-08 12:28:42 -08001697 op->args[3] = cond;
Richard Henderson333b21b2016-10-23 20:44:32 -07001698 op->opc = opc = (opc == INDEX_op_movcond_i32
1699 ? INDEX_op_setcond_i32
1700 : INDEX_op_setcond_i64);
Richard Henderson333b21b2016-10-23 20:44:32 -07001701 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001702 break;
Richard Henderson6e14e912012-10-02 11:32:24 -07001703
Richard Henderson212c3282012-10-02 11:32:28 -07001704 case INDEX_op_add2_i32:
1705 case INDEX_op_sub2_i32:
Richard Henderson63490392017-06-20 13:43:15 -07001706 if (arg_is_const(op->args[2]) && arg_is_const(op->args[3])
1707 && arg_is_const(op->args[4]) && arg_is_const(op->args[5])) {
1708 uint32_t al = arg_info(op->args[2])->val;
1709 uint32_t ah = arg_info(op->args[3])->val;
1710 uint32_t bl = arg_info(op->args[4])->val;
1711 uint32_t bh = arg_info(op->args[5])->val;
Richard Henderson212c3282012-10-02 11:32:28 -07001712 uint64_t a = ((uint64_t)ah << 32) | al;
1713 uint64_t b = ((uint64_t)bh << 32) | bl;
1714 TCGArg rl, rh;
Richard Henderson8fe35e02020-03-30 20:42:43 -07001715 TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_mov_i32);
Richard Henderson212c3282012-10-02 11:32:28 -07001716
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001717 if (opc == INDEX_op_add2_i32) {
Richard Henderson212c3282012-10-02 11:32:28 -07001718 a += b;
1719 } else {
1720 a -= b;
1721 }
1722
Richard Hendersonacd93702016-12-08 12:28:42 -08001723 rl = op->args[0];
1724 rh = op->args[1];
Richard Hendersondc849882021-08-24 07:13:45 -07001725 tcg_opt_gen_movi(&ctx, op, rl, (int32_t)a);
1726 tcg_opt_gen_movi(&ctx, op2, rh, (int32_t)(a >> 32));
Richard Hendersonb10f3832021-08-23 22:30:17 -07001727 continue;
Richard Henderson212c3282012-10-02 11:32:28 -07001728 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001729 break;
Richard Henderson212c3282012-10-02 11:32:28 -07001730
Richard Henderson2f9f08b2021-08-25 12:03:48 -07001731 default:
1732 break;
1733
1734 /* ---------------------------------------------------------- */
1735 /* Sorted alphabetically by opcode as much as possible. */
1736
1737 CASE_OP_32_64_VEC(add):
1738 done = fold_add(&ctx, op);
1739 break;
1740 CASE_OP_32_64_VEC(and):
1741 done = fold_and(&ctx, op);
1742 break;
1743 CASE_OP_32_64_VEC(andc):
1744 done = fold_andc(&ctx, op);
1745 break;
Richard Henderson079b0802021-08-24 09:30:59 -07001746 CASE_OP_32_64(brcond):
1747 done = fold_brcond(&ctx, op);
1748 break;
Richard Henderson764d2ab2021-08-24 09:22:11 -07001749 case INDEX_op_brcond2_i32:
1750 done = fold_brcond2(&ctx, op);
1751 break;
Richard Henderson2f9f08b2021-08-25 12:03:48 -07001752 CASE_OP_32_64(ctpop):
1753 done = fold_ctpop(&ctx, op);
1754 break;
1755 CASE_OP_32_64(div):
1756 CASE_OP_32_64(divu):
1757 done = fold_divide(&ctx, op);
1758 break;
1759 CASE_OP_32_64(eqv):
1760 done = fold_eqv(&ctx, op);
1761 break;
1762 CASE_OP_32_64(ext8s):
1763 CASE_OP_32_64(ext16s):
1764 case INDEX_op_ext32s_i64:
1765 case INDEX_op_ext_i32_i64:
1766 done = fold_exts(&ctx, op);
1767 break;
1768 CASE_OP_32_64(ext8u):
1769 CASE_OP_32_64(ext16u):
1770 case INDEX_op_ext32u_i64:
1771 case INDEX_op_extu_i32_i64:
1772 case INDEX_op_extrl_i64_i32:
1773 case INDEX_op_extrh_i64_i32:
1774 done = fold_extu(&ctx, op);
1775 break;
Richard Henderson3eefdf22021-08-25 11:06:43 -07001776 case INDEX_op_mb:
1777 done = fold_mb(&ctx, op);
1778 break;
Richard Henderson2f9f08b2021-08-25 12:03:48 -07001779 CASE_OP_32_64(mul):
1780 done = fold_mul(&ctx, op);
1781 break;
1782 CASE_OP_32_64(mulsh):
1783 CASE_OP_32_64(muluh):
1784 done = fold_mul_highpart(&ctx, op);
1785 break;
Richard Henderson6b8ac0d2021-08-24 10:24:12 -07001786 case INDEX_op_mulu2_i32:
1787 done = fold_mulu2_i32(&ctx, op);
1788 break;
Richard Henderson2f9f08b2021-08-25 12:03:48 -07001789 CASE_OP_32_64(nand):
1790 done = fold_nand(&ctx, op);
1791 break;
1792 CASE_OP_32_64(neg):
1793 done = fold_neg(&ctx, op);
1794 break;
1795 CASE_OP_32_64(nor):
1796 done = fold_nor(&ctx, op);
1797 break;
1798 CASE_OP_32_64_VEC(not):
1799 done = fold_not(&ctx, op);
1800 break;
1801 CASE_OP_32_64_VEC(or):
1802 done = fold_or(&ctx, op);
1803 break;
1804 CASE_OP_32_64_VEC(orc):
1805 done = fold_orc(&ctx, op);
1806 break;
Richard Henderson3eefdf22021-08-25 11:06:43 -07001807 case INDEX_op_qemu_ld_i32:
1808 case INDEX_op_qemu_ld_i64:
1809 done = fold_qemu_ld(&ctx, op);
1810 break;
1811 case INDEX_op_qemu_st_i32:
1812 case INDEX_op_qemu_st8_i32:
1813 case INDEX_op_qemu_st_i64:
1814 done = fold_qemu_st(&ctx, op);
1815 break;
Richard Henderson2f9f08b2021-08-25 12:03:48 -07001816 CASE_OP_32_64(rem):
1817 CASE_OP_32_64(remu):
1818 done = fold_remainder(&ctx, op);
1819 break;
1820 CASE_OP_32_64(rotl):
1821 CASE_OP_32_64(rotr):
1822 CASE_OP_32_64(sar):
1823 CASE_OP_32_64(shl):
1824 CASE_OP_32_64(shr):
1825 done = fold_shift(&ctx, op);
1826 break;
Richard Hendersonc63ff552021-08-24 09:35:30 -07001827 CASE_OP_32_64(setcond):
1828 done = fold_setcond(&ctx, op);
1829 break;
Richard Hendersonbc47b1a2021-08-24 09:09:35 -07001830 case INDEX_op_setcond2_i32:
1831 done = fold_setcond2(&ctx, op);
1832 break;
Richard Henderson2f9f08b2021-08-25 12:03:48 -07001833 CASE_OP_32_64_VEC(sub):
1834 done = fold_sub(&ctx, op);
1835 break;
1836 CASE_OP_32_64_VEC(xor):
1837 done = fold_xor(&ctx, op);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001838 break;
1839 }
1840
Richard Henderson404a1482021-08-24 11:08:21 -07001841 if (!done) {
1842 finish_folding(&ctx, op);
1843 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001844 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001845}