blob: 148e360fc68ed9b0cfb47c508f6acbea25ab8357 [file] [log] [blame]
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001/*
2 * Optimizations for Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2010 Samsung Electronics.
5 * Contributed by Kirill Batuzov <batuzovk@ispras.ru>
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25
Peter Maydell757e7252016-01-26 18:17:08 +000026#include "qemu/osdep.h"
Philippe Mathieu-Daudédcb32f12020-01-01 12:23:00 +010027#include "tcg/tcg-op.h"
Richard Henderson90163902021-03-18 10:21:45 -060028#include "tcg-internal.h"
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040029
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040030#define CASE_OP_32_64(x) \
31 glue(glue(case INDEX_op_, x), _i32): \
32 glue(glue(case INDEX_op_, x), _i64)
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040033
Richard Henderson170ba882017-11-22 09:07:11 +010034#define CASE_OP_32_64_VEC(x) \
35 glue(glue(case INDEX_op_, x), _i32): \
36 glue(glue(case INDEX_op_, x), _i64): \
37 glue(glue(case INDEX_op_, x), _vec)
38
Richard Henderson6fcb98e2020-03-30 17:44:30 -070039typedef struct TempOptInfo {
Aurelien Jarnob41059d2015-07-27 12:41:44 +020040 bool is_const;
Richard Henderson63490392017-06-20 13:43:15 -070041 TCGTemp *prev_copy;
42 TCGTemp *next_copy;
Richard Henderson54795542020-09-06 16:21:32 -070043 uint64_t val;
Richard Hendersonb1fde412021-08-23 13:07:49 -070044 uint64_t z_mask; /* mask bit is 0 if and only if value bit is 0 */
Richard Henderson6fcb98e2020-03-30 17:44:30 -070045} TempOptInfo;
Kirill Batuzov22613af2011-07-07 16:37:13 +040046
Richard Henderson6fcb98e2020-03-30 17:44:30 -070047static inline TempOptInfo *ts_info(TCGTemp *ts)
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020048{
Richard Henderson63490392017-06-20 13:43:15 -070049 return ts->state_ptr;
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020050}
51
Richard Henderson6fcb98e2020-03-30 17:44:30 -070052static inline TempOptInfo *arg_info(TCGArg arg)
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020053{
Richard Henderson63490392017-06-20 13:43:15 -070054 return ts_info(arg_temp(arg));
55}
56
57static inline bool ts_is_const(TCGTemp *ts)
58{
59 return ts_info(ts)->is_const;
60}
61
62static inline bool arg_is_const(TCGArg arg)
63{
64 return ts_is_const(arg_temp(arg));
65}
66
67static inline bool ts_is_copy(TCGTemp *ts)
68{
69 return ts_info(ts)->next_copy != ts;
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020070}
71
Aurelien Jarnob41059d2015-07-27 12:41:44 +020072/* Reset TEMP's state, possibly removing the temp for the list of copies. */
Richard Henderson63490392017-06-20 13:43:15 -070073static void reset_ts(TCGTemp *ts)
Kirill Batuzov22613af2011-07-07 16:37:13 +040074{
Richard Henderson6fcb98e2020-03-30 17:44:30 -070075 TempOptInfo *ti = ts_info(ts);
76 TempOptInfo *pi = ts_info(ti->prev_copy);
77 TempOptInfo *ni = ts_info(ti->next_copy);
Richard Henderson63490392017-06-20 13:43:15 -070078
79 ni->prev_copy = ti->prev_copy;
80 pi->next_copy = ti->next_copy;
81 ti->next_copy = ts;
82 ti->prev_copy = ts;
83 ti->is_const = false;
Richard Hendersonb1fde412021-08-23 13:07:49 -070084 ti->z_mask = -1;
Richard Henderson63490392017-06-20 13:43:15 -070085}
86
87static void reset_temp(TCGArg arg)
88{
89 reset_ts(arg_temp(arg));
Kirill Batuzov22613af2011-07-07 16:37:13 +040090}
91
Aurelien Jarno1208d7d2015-07-27 12:41:44 +020092/* Initialize and activate a temporary. */
Richard Henderson8f17a972020-03-30 19:52:02 -070093static void init_ts_info(TCGTempSet *temps_used, TCGTemp *ts)
Aurelien Jarno1208d7d2015-07-27 12:41:44 +020094{
Richard Henderson63490392017-06-20 13:43:15 -070095 size_t idx = temp_idx(ts);
Richard Henderson8f17a972020-03-30 19:52:02 -070096 TempOptInfo *ti;
Richard Henderson63490392017-06-20 13:43:15 -070097
Richard Henderson8f17a972020-03-30 19:52:02 -070098 if (test_bit(idx, temps_used->l)) {
99 return;
100 }
101 set_bit(idx, temps_used->l);
102
103 ti = ts->state_ptr;
104 if (ti == NULL) {
105 ti = tcg_malloc(sizeof(TempOptInfo));
Richard Henderson63490392017-06-20 13:43:15 -0700106 ts->state_ptr = ti;
Richard Henderson8f17a972020-03-30 19:52:02 -0700107 }
108
109 ti->next_copy = ts;
110 ti->prev_copy = ts;
111 if (ts->kind == TEMP_CONST) {
112 ti->is_const = true;
113 ti->val = ts->val;
Richard Hendersonb1fde412021-08-23 13:07:49 -0700114 ti->z_mask = ts->val;
Richard Henderson8f17a972020-03-30 19:52:02 -0700115 if (TCG_TARGET_REG_BITS > 32 && ts->type == TCG_TYPE_I32) {
116 /* High bits of a 32-bit quantity are garbage. */
Richard Hendersonb1fde412021-08-23 13:07:49 -0700117 ti->z_mask |= ~0xffffffffull;
Richard Hendersonc0522132020-03-29 18:55:52 -0700118 }
Richard Henderson8f17a972020-03-30 19:52:02 -0700119 } else {
120 ti->is_const = false;
Richard Hendersonb1fde412021-08-23 13:07:49 -0700121 ti->z_mask = -1;
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200122 }
123}
124
Richard Henderson8f17a972020-03-30 19:52:02 -0700125static void init_arg_info(TCGTempSet *temps_used, TCGArg arg)
Richard Henderson63490392017-06-20 13:43:15 -0700126{
Richard Henderson8f17a972020-03-30 19:52:02 -0700127 init_ts_info(temps_used, arg_temp(arg));
Richard Henderson63490392017-06-20 13:43:15 -0700128}
129
Richard Henderson63490392017-06-20 13:43:15 -0700130static TCGTemp *find_better_copy(TCGContext *s, TCGTemp *ts)
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200131{
Richard Henderson4c868ce2020-04-23 09:02:23 -0700132 TCGTemp *i, *g, *l;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200133
Richard Henderson4c868ce2020-04-23 09:02:23 -0700134 /* If this is already readonly, we can't do better. */
135 if (temp_readonly(ts)) {
Richard Henderson63490392017-06-20 13:43:15 -0700136 return ts;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200137 }
138
Richard Henderson4c868ce2020-04-23 09:02:23 -0700139 g = l = NULL;
Richard Henderson63490392017-06-20 13:43:15 -0700140 for (i = ts_info(ts)->next_copy; i != ts; i = ts_info(i)->next_copy) {
Richard Henderson4c868ce2020-04-23 09:02:23 -0700141 if (temp_readonly(i)) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200142 return i;
Richard Henderson4c868ce2020-04-23 09:02:23 -0700143 } else if (i->kind > ts->kind) {
144 if (i->kind == TEMP_GLOBAL) {
145 g = i;
146 } else if (i->kind == TEMP_LOCAL) {
147 l = i;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200148 }
149 }
150 }
151
Richard Henderson4c868ce2020-04-23 09:02:23 -0700152 /* If we didn't find a better representation, return the same temp. */
153 return g ? g : l ? l : ts;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200154}
155
Richard Henderson63490392017-06-20 13:43:15 -0700156static bool ts_are_copies(TCGTemp *ts1, TCGTemp *ts2)
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200157{
Richard Henderson63490392017-06-20 13:43:15 -0700158 TCGTemp *i;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200159
Richard Henderson63490392017-06-20 13:43:15 -0700160 if (ts1 == ts2) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200161 return true;
162 }
163
Richard Henderson63490392017-06-20 13:43:15 -0700164 if (!ts_is_copy(ts1) || !ts_is_copy(ts2)) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200165 return false;
166 }
167
Richard Henderson63490392017-06-20 13:43:15 -0700168 for (i = ts_info(ts1)->next_copy; i != ts1; i = ts_info(i)->next_copy) {
169 if (i == ts2) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200170 return true;
171 }
172 }
173
174 return false;
175}
176
Richard Henderson63490392017-06-20 13:43:15 -0700177static bool args_are_copies(TCGArg arg1, TCGArg arg2)
178{
179 return ts_are_copies(arg_temp(arg1), arg_temp(arg2));
180}
181
Richard Hendersonacd93702016-12-08 12:28:42 -0800182static void tcg_opt_gen_mov(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg src)
Kirill Batuzov22613af2011-07-07 16:37:13 +0400183{
Richard Henderson63490392017-06-20 13:43:15 -0700184 TCGTemp *dst_ts = arg_temp(dst);
185 TCGTemp *src_ts = arg_temp(src);
Richard Henderson170ba882017-11-22 09:07:11 +0100186 const TCGOpDef *def;
Richard Henderson6fcb98e2020-03-30 17:44:30 -0700187 TempOptInfo *di;
188 TempOptInfo *si;
Richard Hendersonb1fde412021-08-23 13:07:49 -0700189 uint64_t z_mask;
Richard Henderson63490392017-06-20 13:43:15 -0700190 TCGOpcode new_op;
191
192 if (ts_are_copies(dst_ts, src_ts)) {
Aurelien Jarno53657182015-06-04 21:53:25 +0200193 tcg_op_remove(s, op);
194 return;
195 }
196
Richard Henderson63490392017-06-20 13:43:15 -0700197 reset_ts(dst_ts);
198 di = ts_info(dst_ts);
199 si = ts_info(src_ts);
Richard Henderson170ba882017-11-22 09:07:11 +0100200 def = &tcg_op_defs[op->opc];
201 if (def->flags & TCG_OPF_VECTOR) {
202 new_op = INDEX_op_mov_vec;
203 } else if (def->flags & TCG_OPF_64BIT) {
204 new_op = INDEX_op_mov_i64;
205 } else {
206 new_op = INDEX_op_mov_i32;
207 }
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700208 op->opc = new_op;
Richard Henderson170ba882017-11-22 09:07:11 +0100209 /* TCGOP_VECL and TCGOP_VECE remain unchanged. */
Richard Henderson63490392017-06-20 13:43:15 -0700210 op->args[0] = dst;
211 op->args[1] = src;
Richard Hendersona62f6f52014-05-22 10:59:12 -0700212
Richard Hendersonb1fde412021-08-23 13:07:49 -0700213 z_mask = si->z_mask;
Richard Henderson24666ba2014-05-22 11:14:10 -0700214 if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_mov_i32) {
215 /* High bits of the destination are now garbage. */
Richard Hendersonb1fde412021-08-23 13:07:49 -0700216 z_mask |= ~0xffffffffull;
Richard Henderson24666ba2014-05-22 11:14:10 -0700217 }
Richard Hendersonb1fde412021-08-23 13:07:49 -0700218 di->z_mask = z_mask;
Richard Henderson24666ba2014-05-22 11:14:10 -0700219
Richard Henderson63490392017-06-20 13:43:15 -0700220 if (src_ts->type == dst_ts->type) {
Richard Henderson6fcb98e2020-03-30 17:44:30 -0700221 TempOptInfo *ni = ts_info(si->next_copy);
Richard Henderson63490392017-06-20 13:43:15 -0700222
223 di->next_copy = si->next_copy;
224 di->prev_copy = src_ts;
225 ni->prev_copy = dst_ts;
226 si->next_copy = dst_ts;
227 di->is_const = si->is_const;
228 di->val = si->val;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800229 }
Kirill Batuzov22613af2011-07-07 16:37:13 +0400230}
231
Richard Henderson8fe35e02020-03-30 20:42:43 -0700232static void tcg_opt_gen_movi(TCGContext *s, TCGTempSet *temps_used,
233 TCGOp *op, TCGArg dst, uint64_t val)
234{
235 const TCGOpDef *def = &tcg_op_defs[op->opc];
236 TCGType type;
237 TCGTemp *tv;
238
239 if (def->flags & TCG_OPF_VECTOR) {
240 type = TCGOP_VECL(op) + TCG_TYPE_V64;
241 } else if (def->flags & TCG_OPF_64BIT) {
242 type = TCG_TYPE_I64;
243 } else {
244 type = TCG_TYPE_I32;
245 }
246
247 /* Convert movi to mov with constant temp. */
248 tv = tcg_constant_internal(type, val);
249 init_ts_info(temps_used, tv);
250 tcg_opt_gen_mov(s, op, dst, temp_arg(tv));
251}
252
Richard Henderson54795542020-09-06 16:21:32 -0700253static uint64_t do_constant_folding_2(TCGOpcode op, uint64_t x, uint64_t y)
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400254{
Richard Henderson03271522013-08-14 14:35:56 -0700255 uint64_t l64, h64;
256
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400257 switch (op) {
258 CASE_OP_32_64(add):
259 return x + y;
260
261 CASE_OP_32_64(sub):
262 return x - y;
263
264 CASE_OP_32_64(mul):
265 return x * y;
266
Kirill Batuzov9a810902011-07-07 16:37:15 +0400267 CASE_OP_32_64(and):
268 return x & y;
269
270 CASE_OP_32_64(or):
271 return x | y;
272
273 CASE_OP_32_64(xor):
274 return x ^ y;
275
Kirill Batuzov55c09752011-07-07 16:37:16 +0400276 case INDEX_op_shl_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700277 return (uint32_t)x << (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400278
Kirill Batuzov55c09752011-07-07 16:37:16 +0400279 case INDEX_op_shl_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700280 return (uint64_t)x << (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400281
282 case INDEX_op_shr_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700283 return (uint32_t)x >> (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400284
Kirill Batuzov55c09752011-07-07 16:37:16 +0400285 case INDEX_op_shr_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700286 return (uint64_t)x >> (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400287
288 case INDEX_op_sar_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700289 return (int32_t)x >> (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400290
Kirill Batuzov55c09752011-07-07 16:37:16 +0400291 case INDEX_op_sar_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700292 return (int64_t)x >> (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400293
294 case INDEX_op_rotr_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700295 return ror32(x, y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400296
Kirill Batuzov55c09752011-07-07 16:37:16 +0400297 case INDEX_op_rotr_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700298 return ror64(x, y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400299
300 case INDEX_op_rotl_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700301 return rol32(x, y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400302
Kirill Batuzov55c09752011-07-07 16:37:16 +0400303 case INDEX_op_rotl_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700304 return rol64(x, y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400305
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700306 CASE_OP_32_64(not):
Kirill Batuzova640f032011-07-07 16:37:17 +0400307 return ~x;
308
Richard Hendersoncb25c802011-08-17 14:11:47 -0700309 CASE_OP_32_64(neg):
310 return -x;
311
312 CASE_OP_32_64(andc):
313 return x & ~y;
314
315 CASE_OP_32_64(orc):
316 return x | ~y;
317
318 CASE_OP_32_64(eqv):
319 return ~(x ^ y);
320
321 CASE_OP_32_64(nand):
322 return ~(x & y);
323
324 CASE_OP_32_64(nor):
325 return ~(x | y);
326
Richard Henderson0e28d002016-11-16 09:23:28 +0100327 case INDEX_op_clz_i32:
328 return (uint32_t)x ? clz32(x) : y;
329
330 case INDEX_op_clz_i64:
331 return x ? clz64(x) : y;
332
333 case INDEX_op_ctz_i32:
334 return (uint32_t)x ? ctz32(x) : y;
335
336 case INDEX_op_ctz_i64:
337 return x ? ctz64(x) : y;
338
Richard Hendersona768e4e2016-11-21 11:13:39 +0100339 case INDEX_op_ctpop_i32:
340 return ctpop32(x);
341
342 case INDEX_op_ctpop_i64:
343 return ctpop64(x);
344
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700345 CASE_OP_32_64(ext8s):
Kirill Batuzova640f032011-07-07 16:37:17 +0400346 return (int8_t)x;
347
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700348 CASE_OP_32_64(ext16s):
Kirill Batuzova640f032011-07-07 16:37:17 +0400349 return (int16_t)x;
350
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700351 CASE_OP_32_64(ext8u):
Kirill Batuzova640f032011-07-07 16:37:17 +0400352 return (uint8_t)x;
353
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700354 CASE_OP_32_64(ext16u):
Kirill Batuzova640f032011-07-07 16:37:17 +0400355 return (uint16_t)x;
356
Richard Henderson64985942018-11-20 08:53:34 +0100357 CASE_OP_32_64(bswap16):
Richard Henderson0b76ff82021-06-13 13:04:00 -0700358 x = bswap16(x);
359 return y & TCG_BSWAP_OS ? (int16_t)x : x;
Richard Henderson64985942018-11-20 08:53:34 +0100360
361 CASE_OP_32_64(bswap32):
Richard Henderson0b76ff82021-06-13 13:04:00 -0700362 x = bswap32(x);
363 return y & TCG_BSWAP_OS ? (int32_t)x : x;
Richard Henderson64985942018-11-20 08:53:34 +0100364
365 case INDEX_op_bswap64_i64:
366 return bswap64(x);
367
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200368 case INDEX_op_ext_i32_i64:
Kirill Batuzova640f032011-07-07 16:37:17 +0400369 case INDEX_op_ext32s_i64:
370 return (int32_t)x;
371
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200372 case INDEX_op_extu_i32_i64:
Richard Henderson609ad702015-07-24 07:16:00 -0700373 case INDEX_op_extrl_i64_i32:
Kirill Batuzova640f032011-07-07 16:37:17 +0400374 case INDEX_op_ext32u_i64:
375 return (uint32_t)x;
Kirill Batuzova640f032011-07-07 16:37:17 +0400376
Richard Henderson609ad702015-07-24 07:16:00 -0700377 case INDEX_op_extrh_i64_i32:
378 return (uint64_t)x >> 32;
379
Richard Henderson03271522013-08-14 14:35:56 -0700380 case INDEX_op_muluh_i32:
381 return ((uint64_t)(uint32_t)x * (uint32_t)y) >> 32;
382 case INDEX_op_mulsh_i32:
383 return ((int64_t)(int32_t)x * (int32_t)y) >> 32;
384
385 case INDEX_op_muluh_i64:
386 mulu64(&l64, &h64, x, y);
387 return h64;
388 case INDEX_op_mulsh_i64:
389 muls64(&l64, &h64, x, y);
390 return h64;
391
Richard Henderson01547f72013-08-14 15:22:46 -0700392 case INDEX_op_div_i32:
393 /* Avoid crashing on divide by zero, otherwise undefined. */
394 return (int32_t)x / ((int32_t)y ? : 1);
395 case INDEX_op_divu_i32:
396 return (uint32_t)x / ((uint32_t)y ? : 1);
397 case INDEX_op_div_i64:
398 return (int64_t)x / ((int64_t)y ? : 1);
399 case INDEX_op_divu_i64:
400 return (uint64_t)x / ((uint64_t)y ? : 1);
401
402 case INDEX_op_rem_i32:
403 return (int32_t)x % ((int32_t)y ? : 1);
404 case INDEX_op_remu_i32:
405 return (uint32_t)x % ((uint32_t)y ? : 1);
406 case INDEX_op_rem_i64:
407 return (int64_t)x % ((int64_t)y ? : 1);
408 case INDEX_op_remu_i64:
409 return (uint64_t)x % ((uint64_t)y ? : 1);
410
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400411 default:
412 fprintf(stderr,
413 "Unrecognized operation %d in do_constant_folding.\n", op);
414 tcg_abort();
415 }
416}
417
Richard Henderson54795542020-09-06 16:21:32 -0700418static uint64_t do_constant_folding(TCGOpcode op, uint64_t x, uint64_t y)
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400419{
Richard Henderson170ba882017-11-22 09:07:11 +0100420 const TCGOpDef *def = &tcg_op_defs[op];
Richard Henderson54795542020-09-06 16:21:32 -0700421 uint64_t res = do_constant_folding_2(op, x, y);
Richard Henderson170ba882017-11-22 09:07:11 +0100422 if (!(def->flags & TCG_OPF_64BIT)) {
Aurelien Jarno29f3ff82015-07-10 18:03:31 +0200423 res = (int32_t)res;
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400424 }
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400425 return res;
426}
427
Richard Henderson9519da72012-10-02 11:32:26 -0700428static bool do_constant_folding_cond_32(uint32_t x, uint32_t y, TCGCond c)
429{
430 switch (c) {
431 case TCG_COND_EQ:
432 return x == y;
433 case TCG_COND_NE:
434 return x != y;
435 case TCG_COND_LT:
436 return (int32_t)x < (int32_t)y;
437 case TCG_COND_GE:
438 return (int32_t)x >= (int32_t)y;
439 case TCG_COND_LE:
440 return (int32_t)x <= (int32_t)y;
441 case TCG_COND_GT:
442 return (int32_t)x > (int32_t)y;
443 case TCG_COND_LTU:
444 return x < y;
445 case TCG_COND_GEU:
446 return x >= y;
447 case TCG_COND_LEU:
448 return x <= y;
449 case TCG_COND_GTU:
450 return x > y;
451 default:
452 tcg_abort();
453 }
454}
455
456static bool do_constant_folding_cond_64(uint64_t x, uint64_t y, TCGCond c)
457{
458 switch (c) {
459 case TCG_COND_EQ:
460 return x == y;
461 case TCG_COND_NE:
462 return x != y;
463 case TCG_COND_LT:
464 return (int64_t)x < (int64_t)y;
465 case TCG_COND_GE:
466 return (int64_t)x >= (int64_t)y;
467 case TCG_COND_LE:
468 return (int64_t)x <= (int64_t)y;
469 case TCG_COND_GT:
470 return (int64_t)x > (int64_t)y;
471 case TCG_COND_LTU:
472 return x < y;
473 case TCG_COND_GEU:
474 return x >= y;
475 case TCG_COND_LEU:
476 return x <= y;
477 case TCG_COND_GTU:
478 return x > y;
479 default:
480 tcg_abort();
481 }
482}
483
484static bool do_constant_folding_cond_eq(TCGCond c)
485{
486 switch (c) {
487 case TCG_COND_GT:
488 case TCG_COND_LTU:
489 case TCG_COND_LT:
490 case TCG_COND_GTU:
491 case TCG_COND_NE:
492 return 0;
493 case TCG_COND_GE:
494 case TCG_COND_GEU:
495 case TCG_COND_LE:
496 case TCG_COND_LEU:
497 case TCG_COND_EQ:
498 return 1;
499 default:
500 tcg_abort();
501 }
502}
503
Aurelien Jarnob336ceb2012-09-18 19:37:00 +0200504/* Return 2 if the condition can't be simplified, and the result
505 of the condition (0 or 1) if it can */
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200506static TCGArg do_constant_folding_cond(TCGOpcode op, TCGArg x,
507 TCGArg y, TCGCond c)
508{
Richard Henderson54795542020-09-06 16:21:32 -0700509 uint64_t xv = arg_info(x)->val;
510 uint64_t yv = arg_info(y)->val;
511
Richard Henderson63490392017-06-20 13:43:15 -0700512 if (arg_is_const(x) && arg_is_const(y)) {
Richard Henderson170ba882017-11-22 09:07:11 +0100513 const TCGOpDef *def = &tcg_op_defs[op];
514 tcg_debug_assert(!(def->flags & TCG_OPF_VECTOR));
515 if (def->flags & TCG_OPF_64BIT) {
Richard Henderson63490392017-06-20 13:43:15 -0700516 return do_constant_folding_cond_64(xv, yv, c);
Richard Henderson170ba882017-11-22 09:07:11 +0100517 } else {
518 return do_constant_folding_cond_32(xv, yv, c);
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200519 }
Richard Henderson63490392017-06-20 13:43:15 -0700520 } else if (args_are_copies(x, y)) {
Richard Henderson9519da72012-10-02 11:32:26 -0700521 return do_constant_folding_cond_eq(c);
Richard Henderson63490392017-06-20 13:43:15 -0700522 } else if (arg_is_const(y) && yv == 0) {
Aurelien Jarnob336ceb2012-09-18 19:37:00 +0200523 switch (c) {
524 case TCG_COND_LTU:
525 return 0;
526 case TCG_COND_GEU:
527 return 1;
528 default:
529 return 2;
530 }
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200531 }
Alex Bennée550276a2016-09-30 22:30:55 +0100532 return 2;
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200533}
534
Richard Henderson6c4382f2012-10-02 11:32:27 -0700535/* Return 2 if the condition can't be simplified, and the result
536 of the condition (0 or 1) if it can */
537static TCGArg do_constant_folding_cond2(TCGArg *p1, TCGArg *p2, TCGCond c)
538{
539 TCGArg al = p1[0], ah = p1[1];
540 TCGArg bl = p2[0], bh = p2[1];
541
Richard Henderson63490392017-06-20 13:43:15 -0700542 if (arg_is_const(bl) && arg_is_const(bh)) {
543 tcg_target_ulong blv = arg_info(bl)->val;
544 tcg_target_ulong bhv = arg_info(bh)->val;
545 uint64_t b = deposit64(blv, 32, 32, bhv);
Richard Henderson6c4382f2012-10-02 11:32:27 -0700546
Richard Henderson63490392017-06-20 13:43:15 -0700547 if (arg_is_const(al) && arg_is_const(ah)) {
548 tcg_target_ulong alv = arg_info(al)->val;
549 tcg_target_ulong ahv = arg_info(ah)->val;
550 uint64_t a = deposit64(alv, 32, 32, ahv);
Richard Henderson6c4382f2012-10-02 11:32:27 -0700551 return do_constant_folding_cond_64(a, b, c);
552 }
553 if (b == 0) {
554 switch (c) {
555 case TCG_COND_LTU:
556 return 0;
557 case TCG_COND_GEU:
558 return 1;
559 default:
560 break;
561 }
562 }
563 }
Richard Henderson63490392017-06-20 13:43:15 -0700564 if (args_are_copies(al, bl) && args_are_copies(ah, bh)) {
Richard Henderson6c4382f2012-10-02 11:32:27 -0700565 return do_constant_folding_cond_eq(c);
566 }
567 return 2;
568}
569
Richard Henderson24c9ae42012-10-02 11:32:21 -0700570static bool swap_commutative(TCGArg dest, TCGArg *p1, TCGArg *p2)
571{
572 TCGArg a1 = *p1, a2 = *p2;
573 int sum = 0;
Richard Henderson63490392017-06-20 13:43:15 -0700574 sum += arg_is_const(a1);
575 sum -= arg_is_const(a2);
Richard Henderson24c9ae42012-10-02 11:32:21 -0700576
577 /* Prefer the constant in second argument, and then the form
578 op a, a, b, which is better handled on non-RISC hosts. */
579 if (sum > 0 || (sum == 0 && dest == a2)) {
580 *p1 = a2;
581 *p2 = a1;
582 return true;
583 }
584 return false;
585}
586
Richard Henderson0bfcb862012-10-02 11:32:23 -0700587static bool swap_commutative2(TCGArg *p1, TCGArg *p2)
588{
589 int sum = 0;
Richard Henderson63490392017-06-20 13:43:15 -0700590 sum += arg_is_const(p1[0]);
591 sum += arg_is_const(p1[1]);
592 sum -= arg_is_const(p2[0]);
593 sum -= arg_is_const(p2[1]);
Richard Henderson0bfcb862012-10-02 11:32:23 -0700594 if (sum > 0) {
595 TCGArg t;
596 t = p1[0], p1[0] = p2[0], p2[0] = t;
597 t = p1[1], p1[1] = p2[1], p2[1] = t;
598 return true;
599 }
600 return false;
601}
602
Kirill Batuzov22613af2011-07-07 16:37:13 +0400603/* Propagate constants and copies, fold constant expressions. */
Aurelien Jarno36e60ef2015-06-04 21:53:27 +0200604void tcg_optimize(TCGContext *s)
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +0400605{
Richard Henderson8f17a972020-03-30 19:52:02 -0700606 int nb_temps, nb_globals, i;
Richard Henderson15fa08f2017-11-02 15:19:14 +0100607 TCGOp *op, *op_next, *prev_mb = NULL;
Emilio G. Cota34184b02017-07-19 14:32:24 -0400608 TCGTempSet temps_used;
Richard Henderson5d8f5362012-09-21 10:13:38 -0700609
Kirill Batuzov22613af2011-07-07 16:37:13 +0400610 /* Array VALS has an element for each temp.
611 If this temp holds a constant then its value is kept in VALS' element.
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200612 If this temp is a copy of other ones then the other copies are
613 available through the doubly linked circular list. */
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +0400614
615 nb_temps = s->nb_temps;
616 nb_globals = s->nb_globals;
Richard Henderson8f17a972020-03-30 19:52:02 -0700617
Richard Henderson8fe35e02020-03-30 20:42:43 -0700618 memset(&temps_used, 0, sizeof(temps_used));
Richard Henderson8f17a972020-03-30 19:52:02 -0700619 for (i = 0; i < nb_temps; ++i) {
620 s->temps[i].state_ptr = NULL;
621 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +0400622
Richard Henderson15fa08f2017-11-02 15:19:14 +0100623 QTAILQ_FOREACH_SAFE(op, &s->ops, link, op_next) {
Richard Hendersonb1fde412021-08-23 13:07:49 -0700624 uint64_t z_mask, partmask, affected, tmp;
Richard Henderson8f17a972020-03-30 19:52:02 -0700625 int nb_oargs, nb_iargs;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700626 TCGOpcode opc = op->opc;
627 const TCGOpDef *def = &tcg_op_defs[opc];
628
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200629 /* Count the arguments, and initialize the temps that are
630 going to be used */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700631 if (opc == INDEX_op_call) {
Richard Hendersoncd9090a2017-11-14 13:02:51 +0100632 nb_oargs = TCGOP_CALLO(op);
633 nb_iargs = TCGOP_CALLI(op);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200634 for (i = 0; i < nb_oargs + nb_iargs; i++) {
Richard Henderson63490392017-06-20 13:43:15 -0700635 TCGTemp *ts = arg_temp(op->args[i]);
636 if (ts) {
Richard Henderson8f17a972020-03-30 19:52:02 -0700637 init_ts_info(&temps_used, ts);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200638 }
639 }
Aurelien Jarno1ff8c542012-09-11 16:18:49 +0200640 } else {
Richard Hendersoncf066672014-03-22 20:06:52 -0700641 nb_oargs = def->nb_oargs;
642 nb_iargs = def->nb_iargs;
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200643 for (i = 0; i < nb_oargs + nb_iargs; i++) {
Richard Henderson8f17a972020-03-30 19:52:02 -0700644 init_arg_info(&temps_used, op->args[i]);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200645 }
Richard Hendersoncf066672014-03-22 20:06:52 -0700646 }
647
648 /* Do copy propagation */
649 for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
Richard Henderson63490392017-06-20 13:43:15 -0700650 TCGTemp *ts = arg_temp(op->args[i]);
651 if (ts && ts_is_copy(ts)) {
652 op->args[i] = temp_arg(find_better_copy(s, ts));
Kirill Batuzov22613af2011-07-07 16:37:13 +0400653 }
654 }
655
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400656 /* For commutative operations make constant second argument */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700657 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +0100658 CASE_OP_32_64_VEC(add):
659 CASE_OP_32_64_VEC(mul):
660 CASE_OP_32_64_VEC(and):
661 CASE_OP_32_64_VEC(or):
662 CASE_OP_32_64_VEC(xor):
Richard Hendersoncb25c802011-08-17 14:11:47 -0700663 CASE_OP_32_64(eqv):
664 CASE_OP_32_64(nand):
665 CASE_OP_32_64(nor):
Richard Henderson03271522013-08-14 14:35:56 -0700666 CASE_OP_32_64(muluh):
667 CASE_OP_32_64(mulsh):
Richard Hendersonacd93702016-12-08 12:28:42 -0800668 swap_commutative(op->args[0], &op->args[1], &op->args[2]);
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400669 break;
Aurelien Jarno65a7cce2012-09-06 16:47:14 +0200670 CASE_OP_32_64(brcond):
Richard Hendersonacd93702016-12-08 12:28:42 -0800671 if (swap_commutative(-1, &op->args[0], &op->args[1])) {
672 op->args[2] = tcg_swap_cond(op->args[2]);
Aurelien Jarno65a7cce2012-09-06 16:47:14 +0200673 }
674 break;
675 CASE_OP_32_64(setcond):
Richard Hendersonacd93702016-12-08 12:28:42 -0800676 if (swap_commutative(op->args[0], &op->args[1], &op->args[2])) {
677 op->args[3] = tcg_swap_cond(op->args[3]);
Aurelien Jarno65a7cce2012-09-06 16:47:14 +0200678 }
679 break;
Richard Hendersonfa01a202012-09-21 10:13:37 -0700680 CASE_OP_32_64(movcond):
Richard Hendersonacd93702016-12-08 12:28:42 -0800681 if (swap_commutative(-1, &op->args[1], &op->args[2])) {
682 op->args[5] = tcg_swap_cond(op->args[5]);
Richard Hendersonfa01a202012-09-21 10:13:37 -0700683 }
Richard Henderson5d8f5362012-09-21 10:13:38 -0700684 /* For movcond, we canonicalize the "false" input reg to match
685 the destination reg so that the tcg backend can implement
686 a "move if true" operation. */
Richard Hendersonacd93702016-12-08 12:28:42 -0800687 if (swap_commutative(op->args[0], &op->args[4], &op->args[3])) {
688 op->args[5] = tcg_invert_cond(op->args[5]);
Richard Henderson5d8f5362012-09-21 10:13:38 -0700689 }
Richard Henderson1e484e62012-10-02 11:32:22 -0700690 break;
Richard Hendersond7156f72013-02-19 23:51:52 -0800691 CASE_OP_32_64(add2):
Richard Hendersonacd93702016-12-08 12:28:42 -0800692 swap_commutative(op->args[0], &op->args[2], &op->args[4]);
693 swap_commutative(op->args[1], &op->args[3], &op->args[5]);
Richard Henderson1e484e62012-10-02 11:32:22 -0700694 break;
Richard Hendersond7156f72013-02-19 23:51:52 -0800695 CASE_OP_32_64(mulu2):
Richard Henderson4d3203f2013-02-19 23:51:53 -0800696 CASE_OP_32_64(muls2):
Richard Hendersonacd93702016-12-08 12:28:42 -0800697 swap_commutative(op->args[0], &op->args[2], &op->args[3]);
Richard Henderson14149682012-10-02 11:32:30 -0700698 break;
Richard Henderson0bfcb862012-10-02 11:32:23 -0700699 case INDEX_op_brcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -0800700 if (swap_commutative2(&op->args[0], &op->args[2])) {
701 op->args[4] = tcg_swap_cond(op->args[4]);
Richard Henderson0bfcb862012-10-02 11:32:23 -0700702 }
703 break;
704 case INDEX_op_setcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -0800705 if (swap_commutative2(&op->args[1], &op->args[3])) {
706 op->args[5] = tcg_swap_cond(op->args[5]);
Richard Henderson0bfcb862012-10-02 11:32:23 -0700707 }
708 break;
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400709 default:
710 break;
711 }
712
Richard Henderson2d497542013-03-21 09:13:33 -0700713 /* Simplify expressions for "shift/rot r, 0, a => movi r, 0",
714 and "sub r, 0, a => neg r, a" case. */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700715 switch (opc) {
Aurelien Jarno01ee5282012-09-06 16:47:14 +0200716 CASE_OP_32_64(shl):
717 CASE_OP_32_64(shr):
718 CASE_OP_32_64(sar):
719 CASE_OP_32_64(rotl):
720 CASE_OP_32_64(rotr):
Richard Henderson63490392017-06-20 13:43:15 -0700721 if (arg_is_const(op->args[1])
722 && arg_info(op->args[1])->val == 0) {
Richard Henderson8fe35e02020-03-30 20:42:43 -0700723 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], 0);
Aurelien Jarno01ee5282012-09-06 16:47:14 +0200724 continue;
725 }
726 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100727 CASE_OP_32_64_VEC(sub):
Richard Henderson2d497542013-03-21 09:13:33 -0700728 {
729 TCGOpcode neg_op;
730 bool have_neg;
731
Richard Henderson63490392017-06-20 13:43:15 -0700732 if (arg_is_const(op->args[2])) {
Richard Henderson2d497542013-03-21 09:13:33 -0700733 /* Proceed with possible constant folding. */
734 break;
735 }
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700736 if (opc == INDEX_op_sub_i32) {
Richard Henderson2d497542013-03-21 09:13:33 -0700737 neg_op = INDEX_op_neg_i32;
738 have_neg = TCG_TARGET_HAS_neg_i32;
Richard Henderson170ba882017-11-22 09:07:11 +0100739 } else if (opc == INDEX_op_sub_i64) {
Richard Henderson2d497542013-03-21 09:13:33 -0700740 neg_op = INDEX_op_neg_i64;
741 have_neg = TCG_TARGET_HAS_neg_i64;
Richard Hendersonac383dde2019-04-20 00:27:24 +0000742 } else if (TCG_TARGET_HAS_neg_vec) {
743 TCGType type = TCGOP_VECL(op) + TCG_TYPE_V64;
744 unsigned vece = TCGOP_VECE(op);
Richard Henderson170ba882017-11-22 09:07:11 +0100745 neg_op = INDEX_op_neg_vec;
Richard Hendersonac383dde2019-04-20 00:27:24 +0000746 have_neg = tcg_can_emit_vec_op(neg_op, type, vece) > 0;
747 } else {
748 break;
Richard Henderson2d497542013-03-21 09:13:33 -0700749 }
750 if (!have_neg) {
751 break;
752 }
Richard Henderson63490392017-06-20 13:43:15 -0700753 if (arg_is_const(op->args[1])
754 && arg_info(op->args[1])->val == 0) {
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700755 op->opc = neg_op;
Richard Hendersonacd93702016-12-08 12:28:42 -0800756 reset_temp(op->args[0]);
757 op->args[1] = op->args[2];
Richard Henderson2d497542013-03-21 09:13:33 -0700758 continue;
759 }
760 }
761 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100762 CASE_OP_32_64_VEC(xor):
Richard Hendersone201b562014-01-28 13:15:38 -0800763 CASE_OP_32_64(nand):
Richard Henderson63490392017-06-20 13:43:15 -0700764 if (!arg_is_const(op->args[1])
765 && arg_is_const(op->args[2])
766 && arg_info(op->args[2])->val == -1) {
Richard Hendersone201b562014-01-28 13:15:38 -0800767 i = 1;
768 goto try_not;
769 }
770 break;
771 CASE_OP_32_64(nor):
Richard Henderson63490392017-06-20 13:43:15 -0700772 if (!arg_is_const(op->args[1])
773 && arg_is_const(op->args[2])
774 && arg_info(op->args[2])->val == 0) {
Richard Hendersone201b562014-01-28 13:15:38 -0800775 i = 1;
776 goto try_not;
777 }
778 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100779 CASE_OP_32_64_VEC(andc):
Richard Henderson63490392017-06-20 13:43:15 -0700780 if (!arg_is_const(op->args[2])
781 && arg_is_const(op->args[1])
782 && arg_info(op->args[1])->val == -1) {
Richard Hendersone201b562014-01-28 13:15:38 -0800783 i = 2;
784 goto try_not;
785 }
786 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100787 CASE_OP_32_64_VEC(orc):
Richard Hendersone201b562014-01-28 13:15:38 -0800788 CASE_OP_32_64(eqv):
Richard Henderson63490392017-06-20 13:43:15 -0700789 if (!arg_is_const(op->args[2])
790 && arg_is_const(op->args[1])
791 && arg_info(op->args[1])->val == 0) {
Richard Hendersone201b562014-01-28 13:15:38 -0800792 i = 2;
793 goto try_not;
794 }
795 break;
796 try_not:
797 {
798 TCGOpcode not_op;
799 bool have_not;
800
Richard Henderson170ba882017-11-22 09:07:11 +0100801 if (def->flags & TCG_OPF_VECTOR) {
802 not_op = INDEX_op_not_vec;
803 have_not = TCG_TARGET_HAS_not_vec;
804 } else if (def->flags & TCG_OPF_64BIT) {
Richard Hendersone201b562014-01-28 13:15:38 -0800805 not_op = INDEX_op_not_i64;
806 have_not = TCG_TARGET_HAS_not_i64;
807 } else {
808 not_op = INDEX_op_not_i32;
809 have_not = TCG_TARGET_HAS_not_i32;
810 }
811 if (!have_not) {
812 break;
813 }
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700814 op->opc = not_op;
Richard Hendersonacd93702016-12-08 12:28:42 -0800815 reset_temp(op->args[0]);
816 op->args[1] = op->args[i];
Richard Hendersone201b562014-01-28 13:15:38 -0800817 continue;
818 }
Aurelien Jarno01ee5282012-09-06 16:47:14 +0200819 default:
820 break;
821 }
822
Richard Henderson464a1442014-01-31 07:42:11 -0600823 /* Simplify expression for "op r, a, const => mov r, a" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700824 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +0100825 CASE_OP_32_64_VEC(add):
826 CASE_OP_32_64_VEC(sub):
827 CASE_OP_32_64_VEC(or):
828 CASE_OP_32_64_VEC(xor):
829 CASE_OP_32_64_VEC(andc):
Kirill Batuzov55c09752011-07-07 16:37:16 +0400830 CASE_OP_32_64(shl):
831 CASE_OP_32_64(shr):
832 CASE_OP_32_64(sar):
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700833 CASE_OP_32_64(rotl):
834 CASE_OP_32_64(rotr):
Richard Henderson63490392017-06-20 13:43:15 -0700835 if (!arg_is_const(op->args[1])
836 && arg_is_const(op->args[2])
837 && arg_info(op->args[2])->val == 0) {
Richard Hendersonacd93702016-12-08 12:28:42 -0800838 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200839 continue;
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400840 }
841 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100842 CASE_OP_32_64_VEC(and):
843 CASE_OP_32_64_VEC(orc):
Richard Henderson464a1442014-01-31 07:42:11 -0600844 CASE_OP_32_64(eqv):
Richard Henderson63490392017-06-20 13:43:15 -0700845 if (!arg_is_const(op->args[1])
846 && arg_is_const(op->args[2])
847 && arg_info(op->args[2])->val == -1) {
Richard Hendersonacd93702016-12-08 12:28:42 -0800848 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200849 continue;
Richard Henderson464a1442014-01-31 07:42:11 -0600850 }
851 break;
Aurelien Jarno56e49432012-09-06 16:47:13 +0200852 default:
853 break;
854 }
855
Aurelien Jarno30312442013-09-03 08:27:38 +0200856 /* Simplify using known-zero bits. Currently only ops with a single
857 output argument is supported. */
Richard Hendersonb1fde412021-08-23 13:07:49 -0700858 z_mask = -1;
Paolo Bonzini633f6502013-01-11 15:42:53 -0800859 affected = -1;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700860 switch (opc) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800861 CASE_OP_32_64(ext8s):
Richard Hendersonb1fde412021-08-23 13:07:49 -0700862 if ((arg_info(op->args[1])->z_mask & 0x80) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800863 break;
864 }
Thomas Huthd84568b2020-12-11 16:24:24 +0100865 QEMU_FALLTHROUGH;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800866 CASE_OP_32_64(ext8u):
Richard Hendersonb1fde412021-08-23 13:07:49 -0700867 z_mask = 0xff;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800868 goto and_const;
869 CASE_OP_32_64(ext16s):
Richard Hendersonb1fde412021-08-23 13:07:49 -0700870 if ((arg_info(op->args[1])->z_mask & 0x8000) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800871 break;
872 }
Thomas Huthd84568b2020-12-11 16:24:24 +0100873 QEMU_FALLTHROUGH;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800874 CASE_OP_32_64(ext16u):
Richard Hendersonb1fde412021-08-23 13:07:49 -0700875 z_mask = 0xffff;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800876 goto and_const;
877 case INDEX_op_ext32s_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -0700878 if ((arg_info(op->args[1])->z_mask & 0x80000000) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800879 break;
880 }
Thomas Huthd84568b2020-12-11 16:24:24 +0100881 QEMU_FALLTHROUGH;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800882 case INDEX_op_ext32u_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -0700883 z_mask = 0xffffffffU;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800884 goto and_const;
885
886 CASE_OP_32_64(and):
Richard Hendersonb1fde412021-08-23 13:07:49 -0700887 z_mask = arg_info(op->args[2])->z_mask;
Richard Henderson63490392017-06-20 13:43:15 -0700888 if (arg_is_const(op->args[2])) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800889 and_const:
Richard Hendersonb1fde412021-08-23 13:07:49 -0700890 affected = arg_info(op->args[1])->z_mask & ~z_mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800891 }
Richard Hendersonb1fde412021-08-23 13:07:49 -0700892 z_mask = arg_info(op->args[1])->z_mask & z_mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800893 break;
894
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200895 case INDEX_op_ext_i32_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -0700896 if ((arg_info(op->args[1])->z_mask & 0x80000000) != 0) {
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200897 break;
898 }
Thomas Huthd84568b2020-12-11 16:24:24 +0100899 QEMU_FALLTHROUGH;
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200900 case INDEX_op_extu_i32_i64:
901 /* We do not compute affected as it is a size changing op. */
Richard Hendersonb1fde412021-08-23 13:07:49 -0700902 z_mask = (uint32_t)arg_info(op->args[1])->z_mask;
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200903 break;
904
Richard Henderson23ec69ed2014-01-28 12:03:24 -0800905 CASE_OP_32_64(andc):
906 /* Known-zeros does not imply known-ones. Therefore unless
Richard Hendersonacd93702016-12-08 12:28:42 -0800907 op->args[2] is constant, we can't infer anything from it. */
Richard Henderson63490392017-06-20 13:43:15 -0700908 if (arg_is_const(op->args[2])) {
Richard Hendersonb1fde412021-08-23 13:07:49 -0700909 z_mask = ~arg_info(op->args[2])->z_mask;
Richard Henderson23ec69ed2014-01-28 12:03:24 -0800910 goto and_const;
911 }
Richard Henderson63490392017-06-20 13:43:15 -0700912 /* But we certainly know nothing outside args[1] may be set. */
Richard Hendersonb1fde412021-08-23 13:07:49 -0700913 z_mask = arg_info(op->args[1])->z_mask;
Richard Henderson23ec69ed2014-01-28 12:03:24 -0800914 break;
915
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200916 case INDEX_op_sar_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700917 if (arg_is_const(op->args[2])) {
918 tmp = arg_info(op->args[2])->val & 31;
Richard Hendersonb1fde412021-08-23 13:07:49 -0700919 z_mask = (int32_t)arg_info(op->args[1])->z_mask >> tmp;
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200920 }
921 break;
922 case INDEX_op_sar_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700923 if (arg_is_const(op->args[2])) {
924 tmp = arg_info(op->args[2])->val & 63;
Richard Hendersonb1fde412021-08-23 13:07:49 -0700925 z_mask = (int64_t)arg_info(op->args[1])->z_mask >> tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800926 }
927 break;
928
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200929 case INDEX_op_shr_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700930 if (arg_is_const(op->args[2])) {
931 tmp = arg_info(op->args[2])->val & 31;
Richard Hendersonb1fde412021-08-23 13:07:49 -0700932 z_mask = (uint32_t)arg_info(op->args[1])->z_mask >> tmp;
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200933 }
934 break;
935 case INDEX_op_shr_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700936 if (arg_is_const(op->args[2])) {
937 tmp = arg_info(op->args[2])->val & 63;
Richard Hendersonb1fde412021-08-23 13:07:49 -0700938 z_mask = (uint64_t)arg_info(op->args[1])->z_mask >> tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800939 }
940 break;
941
Richard Henderson609ad702015-07-24 07:16:00 -0700942 case INDEX_op_extrl_i64_i32:
Richard Hendersonb1fde412021-08-23 13:07:49 -0700943 z_mask = (uint32_t)arg_info(op->args[1])->z_mask;
Richard Henderson609ad702015-07-24 07:16:00 -0700944 break;
945 case INDEX_op_extrh_i64_i32:
Richard Hendersonb1fde412021-08-23 13:07:49 -0700946 z_mask = (uint64_t)arg_info(op->args[1])->z_mask >> 32;
Richard Henderson4bb7a412013-09-09 17:03:24 -0700947 break;
948
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800949 CASE_OP_32_64(shl):
Richard Henderson63490392017-06-20 13:43:15 -0700950 if (arg_is_const(op->args[2])) {
951 tmp = arg_info(op->args[2])->val & (TCG_TARGET_REG_BITS - 1);
Richard Hendersonb1fde412021-08-23 13:07:49 -0700952 z_mask = arg_info(op->args[1])->z_mask << tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800953 }
954 break;
955
956 CASE_OP_32_64(neg):
957 /* Set to 1 all bits to the left of the rightmost. */
Richard Hendersonb1fde412021-08-23 13:07:49 -0700958 z_mask = -(arg_info(op->args[1])->z_mask
959 & -arg_info(op->args[1])->z_mask);
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800960 break;
961
962 CASE_OP_32_64(deposit):
Richard Hendersonb1fde412021-08-23 13:07:49 -0700963 z_mask = deposit64(arg_info(op->args[1])->z_mask,
964 op->args[3], op->args[4],
965 arg_info(op->args[2])->z_mask);
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800966 break;
967
Richard Henderson7ec8bab2016-10-14 12:04:32 -0500968 CASE_OP_32_64(extract):
Richard Hendersonb1fde412021-08-23 13:07:49 -0700969 z_mask = extract64(arg_info(op->args[1])->z_mask,
970 op->args[2], op->args[3]);
Richard Hendersonacd93702016-12-08 12:28:42 -0800971 if (op->args[2] == 0) {
Richard Hendersonb1fde412021-08-23 13:07:49 -0700972 affected = arg_info(op->args[1])->z_mask & ~z_mask;
Richard Henderson7ec8bab2016-10-14 12:04:32 -0500973 }
974 break;
975 CASE_OP_32_64(sextract):
Richard Hendersonb1fde412021-08-23 13:07:49 -0700976 z_mask = sextract64(arg_info(op->args[1])->z_mask,
977 op->args[2], op->args[3]);
978 if (op->args[2] == 0 && (tcg_target_long)z_mask >= 0) {
979 affected = arg_info(op->args[1])->z_mask & ~z_mask;
Richard Henderson7ec8bab2016-10-14 12:04:32 -0500980 }
981 break;
982
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800983 CASE_OP_32_64(or):
984 CASE_OP_32_64(xor):
Richard Hendersonb1fde412021-08-23 13:07:49 -0700985 z_mask = arg_info(op->args[1])->z_mask
986 | arg_info(op->args[2])->z_mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800987 break;
988
Richard Henderson0e28d002016-11-16 09:23:28 +0100989 case INDEX_op_clz_i32:
990 case INDEX_op_ctz_i32:
Richard Hendersonb1fde412021-08-23 13:07:49 -0700991 z_mask = arg_info(op->args[2])->z_mask | 31;
Richard Henderson0e28d002016-11-16 09:23:28 +0100992 break;
993
994 case INDEX_op_clz_i64:
995 case INDEX_op_ctz_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -0700996 z_mask = arg_info(op->args[2])->z_mask | 63;
Richard Henderson0e28d002016-11-16 09:23:28 +0100997 break;
998
Richard Hendersona768e4e2016-11-21 11:13:39 +0100999 case INDEX_op_ctpop_i32:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001000 z_mask = 32 | 31;
Richard Hendersona768e4e2016-11-21 11:13:39 +01001001 break;
1002 case INDEX_op_ctpop_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001003 z_mask = 64 | 63;
Richard Hendersona768e4e2016-11-21 11:13:39 +01001004 break;
1005
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001006 CASE_OP_32_64(setcond):
Richard Hendersona7635512014-04-23 22:18:30 -07001007 case INDEX_op_setcond2_i32:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001008 z_mask = 1;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001009 break;
1010
1011 CASE_OP_32_64(movcond):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001012 z_mask = arg_info(op->args[3])->z_mask
1013 | arg_info(op->args[4])->z_mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001014 break;
1015
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001016 CASE_OP_32_64(ld8u):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001017 z_mask = 0xff;
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001018 break;
1019 CASE_OP_32_64(ld16u):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001020 z_mask = 0xffff;
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001021 break;
1022 case INDEX_op_ld32u_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001023 z_mask = 0xffffffffu;
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001024 break;
1025
1026 CASE_OP_32_64(qemu_ld):
1027 {
Richard Henderson9002ffc2021-07-25 12:06:49 -10001028 MemOpIdx oi = op->args[nb_oargs + nb_iargs];
Tony Nguyen14776ab2019-08-24 04:10:58 +10001029 MemOp mop = get_memop(oi);
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001030 if (!(mop & MO_SIGN)) {
Richard Hendersonb1fde412021-08-23 13:07:49 -07001031 z_mask = (2ULL << ((8 << (mop & MO_SIZE)) - 1)) - 1;
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001032 }
1033 }
1034 break;
1035
Richard Henderson0b76ff82021-06-13 13:04:00 -07001036 CASE_OP_32_64(bswap16):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001037 z_mask = arg_info(op->args[1])->z_mask;
1038 if (z_mask <= 0xffff) {
Richard Henderson0b76ff82021-06-13 13:04:00 -07001039 op->args[2] |= TCG_BSWAP_IZ;
1040 }
Richard Hendersonb1fde412021-08-23 13:07:49 -07001041 z_mask = bswap16(z_mask);
Richard Henderson0b76ff82021-06-13 13:04:00 -07001042 switch (op->args[2] & (TCG_BSWAP_OZ | TCG_BSWAP_OS)) {
1043 case TCG_BSWAP_OZ:
1044 break;
1045 case TCG_BSWAP_OS:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001046 z_mask = (int16_t)z_mask;
Richard Henderson0b76ff82021-06-13 13:04:00 -07001047 break;
1048 default: /* undefined high bits */
Richard Hendersonb1fde412021-08-23 13:07:49 -07001049 z_mask |= MAKE_64BIT_MASK(16, 48);
Richard Henderson0b76ff82021-06-13 13:04:00 -07001050 break;
1051 }
1052 break;
1053
1054 case INDEX_op_bswap32_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001055 z_mask = arg_info(op->args[1])->z_mask;
1056 if (z_mask <= 0xffffffffu) {
Richard Henderson0b76ff82021-06-13 13:04:00 -07001057 op->args[2] |= TCG_BSWAP_IZ;
1058 }
Richard Hendersonb1fde412021-08-23 13:07:49 -07001059 z_mask = bswap32(z_mask);
Richard Henderson0b76ff82021-06-13 13:04:00 -07001060 switch (op->args[2] & (TCG_BSWAP_OZ | TCG_BSWAP_OS)) {
1061 case TCG_BSWAP_OZ:
1062 break;
1063 case TCG_BSWAP_OS:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001064 z_mask = (int32_t)z_mask;
Richard Henderson0b76ff82021-06-13 13:04:00 -07001065 break;
1066 default: /* undefined high bits */
Richard Hendersonb1fde412021-08-23 13:07:49 -07001067 z_mask |= MAKE_64BIT_MASK(32, 32);
Richard Henderson0b76ff82021-06-13 13:04:00 -07001068 break;
1069 }
1070 break;
1071
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001072 default:
1073 break;
1074 }
1075
Richard Hendersonbc8d6882014-06-08 18:24:14 -07001076 /* 32-bit ops generate 32-bit results. For the result is zero test
1077 below, we can ignore high bits, but for further optimizations we
1078 need to record that the high bits contain garbage. */
Richard Hendersonb1fde412021-08-23 13:07:49 -07001079 partmask = z_mask;
Richard Hendersonbc8d6882014-06-08 18:24:14 -07001080 if (!(def->flags & TCG_OPF_64BIT)) {
Richard Hendersonb1fde412021-08-23 13:07:49 -07001081 z_mask |= ~(tcg_target_ulong)0xffffffffu;
Richard Henderson24666ba2014-05-22 11:14:10 -07001082 partmask &= 0xffffffffu;
1083 affected &= 0xffffffffu;
Aurelien Jarnof096dc92013-09-03 08:27:38 +02001084 }
1085
Richard Henderson24666ba2014-05-22 11:14:10 -07001086 if (partmask == 0) {
Aurelien Jarnoeabb7b92016-04-21 10:48:49 +02001087 tcg_debug_assert(nb_oargs == 1);
Richard Henderson8fe35e02020-03-30 20:42:43 -07001088 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], 0);
Paolo Bonzini633f6502013-01-11 15:42:53 -08001089 continue;
1090 }
1091 if (affected == 0) {
Aurelien Jarnoeabb7b92016-04-21 10:48:49 +02001092 tcg_debug_assert(nb_oargs == 1);
Richard Hendersonacd93702016-12-08 12:28:42 -08001093 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Paolo Bonzini633f6502013-01-11 15:42:53 -08001094 continue;
1095 }
1096
Aurelien Jarno56e49432012-09-06 16:47:13 +02001097 /* Simplify expression for "op r, a, 0 => movi r, 0" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001098 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001099 CASE_OP_32_64_VEC(and):
1100 CASE_OP_32_64_VEC(mul):
Richard Henderson03271522013-08-14 14:35:56 -07001101 CASE_OP_32_64(muluh):
1102 CASE_OP_32_64(mulsh):
Richard Henderson63490392017-06-20 13:43:15 -07001103 if (arg_is_const(op->args[2])
1104 && arg_info(op->args[2])->val == 0) {
Richard Henderson8fe35e02020-03-30 20:42:43 -07001105 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], 0);
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001106 continue;
1107 }
1108 break;
Aurelien Jarno56e49432012-09-06 16:47:13 +02001109 default:
1110 break;
1111 }
1112
1113 /* Simplify expression for "op r, a, a => mov r, a" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001114 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001115 CASE_OP_32_64_VEC(or):
1116 CASE_OP_32_64_VEC(and):
Richard Henderson63490392017-06-20 13:43:15 -07001117 if (args_are_copies(op->args[1], op->args[2])) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001118 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Kirill Batuzov9a810902011-07-07 16:37:15 +04001119 continue;
1120 }
1121 break;
Blue Swirlfe0de7a2011-07-30 19:18:32 +00001122 default:
1123 break;
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001124 }
1125
Aurelien Jarno3c941932012-09-18 19:12:36 +02001126 /* Simplify expression for "op r, a, a => movi r, 0" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001127 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001128 CASE_OP_32_64_VEC(andc):
1129 CASE_OP_32_64_VEC(sub):
1130 CASE_OP_32_64_VEC(xor):
Richard Henderson63490392017-06-20 13:43:15 -07001131 if (args_are_copies(op->args[1], op->args[2])) {
Richard Henderson8fe35e02020-03-30 20:42:43 -07001132 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], 0);
Aurelien Jarno3c941932012-09-18 19:12:36 +02001133 continue;
1134 }
1135 break;
1136 default:
1137 break;
1138 }
1139
Kirill Batuzov22613af2011-07-07 16:37:13 +04001140 /* Propagate constants through copy operations and do constant
1141 folding. Constants will be substituted to arguments by register
1142 allocator where needed and possible. Also detect copies. */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001143 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001144 CASE_OP_32_64_VEC(mov):
Richard Hendersonacd93702016-12-08 12:28:42 -08001145 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +02001146 break;
Richard Henderson6e14e912012-10-02 11:32:24 -07001147
Richard Henderson170ba882017-11-22 09:07:11 +01001148 case INDEX_op_dup_vec:
1149 if (arg_is_const(op->args[1])) {
1150 tmp = arg_info(op->args[1])->val;
1151 tmp = dup_const(TCGOP_VECE(op), tmp);
Richard Henderson8fe35e02020-03-30 20:42:43 -07001152 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
Richard Henderson1fb57da72018-08-05 16:32:58 -07001153 break;
Richard Henderson170ba882017-11-22 09:07:11 +01001154 }
Richard Henderson1fb57da72018-08-05 16:32:58 -07001155 goto do_default;
Richard Henderson170ba882017-11-22 09:07:11 +01001156
Richard Henderson1dc4fe72020-09-05 17:03:35 -07001157 case INDEX_op_dup2_vec:
1158 assert(TCG_TARGET_REG_BITS == 32);
1159 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
Richard Henderson0b4286d2020-09-06 17:33:18 -07001160 tcg_opt_gen_movi(s, &temps_used, op, op->args[0],
1161 deposit64(arg_info(op->args[1])->val, 32, 32,
1162 arg_info(op->args[2])->val));
1163 break;
Richard Henderson1dc4fe72020-09-05 17:03:35 -07001164 } else if (args_are_copies(op->args[1], op->args[2])) {
1165 op->opc = INDEX_op_dup_vec;
1166 TCGOP_VECE(op) = MO_32;
1167 nb_iargs = 1;
1168 }
1169 goto do_default;
1170
Kirill Batuzova640f032011-07-07 16:37:17 +04001171 CASE_OP_32_64(not):
Richard Hendersoncb25c802011-08-17 14:11:47 -07001172 CASE_OP_32_64(neg):
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001173 CASE_OP_32_64(ext8s):
1174 CASE_OP_32_64(ext8u):
1175 CASE_OP_32_64(ext16s):
1176 CASE_OP_32_64(ext16u):
Richard Hendersona768e4e2016-11-21 11:13:39 +01001177 CASE_OP_32_64(ctpop):
Kirill Batuzova640f032011-07-07 16:37:17 +04001178 case INDEX_op_ext32s_i64:
1179 case INDEX_op_ext32u_i64:
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +02001180 case INDEX_op_ext_i32_i64:
1181 case INDEX_op_extu_i32_i64:
Richard Henderson609ad702015-07-24 07:16:00 -07001182 case INDEX_op_extrl_i64_i32:
1183 case INDEX_op_extrh_i64_i32:
Richard Henderson63490392017-06-20 13:43:15 -07001184 if (arg_is_const(op->args[1])) {
1185 tmp = do_constant_folding(opc, arg_info(op->args[1])->val, 0);
Richard Henderson8fe35e02020-03-30 20:42:43 -07001186 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
Richard Henderson6e14e912012-10-02 11:32:24 -07001187 break;
Kirill Batuzova640f032011-07-07 16:37:17 +04001188 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001189 goto do_default;
1190
Richard Henderson0b76ff82021-06-13 13:04:00 -07001191 CASE_OP_32_64(bswap16):
1192 CASE_OP_32_64(bswap32):
1193 case INDEX_op_bswap64_i64:
1194 if (arg_is_const(op->args[1])) {
1195 tmp = do_constant_folding(opc, arg_info(op->args[1])->val,
1196 op->args[2]);
1197 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
1198 break;
1199 }
1200 goto do_default;
1201
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001202 CASE_OP_32_64(add):
1203 CASE_OP_32_64(sub):
1204 CASE_OP_32_64(mul):
Kirill Batuzov9a810902011-07-07 16:37:15 +04001205 CASE_OP_32_64(or):
1206 CASE_OP_32_64(and):
1207 CASE_OP_32_64(xor):
Kirill Batuzov55c09752011-07-07 16:37:16 +04001208 CASE_OP_32_64(shl):
1209 CASE_OP_32_64(shr):
1210 CASE_OP_32_64(sar):
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001211 CASE_OP_32_64(rotl):
1212 CASE_OP_32_64(rotr):
Richard Hendersoncb25c802011-08-17 14:11:47 -07001213 CASE_OP_32_64(andc):
1214 CASE_OP_32_64(orc):
1215 CASE_OP_32_64(eqv):
1216 CASE_OP_32_64(nand):
1217 CASE_OP_32_64(nor):
Richard Henderson03271522013-08-14 14:35:56 -07001218 CASE_OP_32_64(muluh):
1219 CASE_OP_32_64(mulsh):
Richard Henderson01547f72013-08-14 15:22:46 -07001220 CASE_OP_32_64(div):
1221 CASE_OP_32_64(divu):
1222 CASE_OP_32_64(rem):
1223 CASE_OP_32_64(remu):
Richard Henderson63490392017-06-20 13:43:15 -07001224 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
1225 tmp = do_constant_folding(opc, arg_info(op->args[1])->val,
1226 arg_info(op->args[2])->val);
Richard Henderson8fe35e02020-03-30 20:42:43 -07001227 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
Richard Henderson6e14e912012-10-02 11:32:24 -07001228 break;
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001229 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001230 goto do_default;
1231
Richard Henderson0e28d002016-11-16 09:23:28 +01001232 CASE_OP_32_64(clz):
1233 CASE_OP_32_64(ctz):
Richard Henderson63490392017-06-20 13:43:15 -07001234 if (arg_is_const(op->args[1])) {
1235 TCGArg v = arg_info(op->args[1])->val;
Richard Henderson0e28d002016-11-16 09:23:28 +01001236 if (v != 0) {
1237 tmp = do_constant_folding(opc, v, 0);
Richard Henderson8fe35e02020-03-30 20:42:43 -07001238 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
Richard Henderson0e28d002016-11-16 09:23:28 +01001239 } else {
Richard Hendersonacd93702016-12-08 12:28:42 -08001240 tcg_opt_gen_mov(s, op, op->args[0], op->args[2]);
Richard Henderson0e28d002016-11-16 09:23:28 +01001241 }
1242 break;
1243 }
1244 goto do_default;
1245
Aurelien Jarno7ef55fc2012-09-21 11:07:29 +02001246 CASE_OP_32_64(deposit):
Richard Henderson63490392017-06-20 13:43:15 -07001247 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
1248 tmp = deposit64(arg_info(op->args[1])->val,
1249 op->args[3], op->args[4],
1250 arg_info(op->args[2])->val);
Richard Henderson8fe35e02020-03-30 20:42:43 -07001251 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
Richard Henderson6e14e912012-10-02 11:32:24 -07001252 break;
Aurelien Jarno7ef55fc2012-09-21 11:07:29 +02001253 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001254 goto do_default;
1255
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001256 CASE_OP_32_64(extract):
Richard Henderson63490392017-06-20 13:43:15 -07001257 if (arg_is_const(op->args[1])) {
1258 tmp = extract64(arg_info(op->args[1])->val,
Richard Hendersonacd93702016-12-08 12:28:42 -08001259 op->args[2], op->args[3]);
Richard Henderson8fe35e02020-03-30 20:42:43 -07001260 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001261 break;
1262 }
1263 goto do_default;
1264
1265 CASE_OP_32_64(sextract):
Richard Henderson63490392017-06-20 13:43:15 -07001266 if (arg_is_const(op->args[1])) {
1267 tmp = sextract64(arg_info(op->args[1])->val,
Richard Hendersonacd93702016-12-08 12:28:42 -08001268 op->args[2], op->args[3]);
Richard Henderson8fe35e02020-03-30 20:42:43 -07001269 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001270 break;
1271 }
1272 goto do_default;
1273
Richard Hendersonfce12962019-02-25 10:29:25 -08001274 CASE_OP_32_64(extract2):
1275 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
Richard Henderson54795542020-09-06 16:21:32 -07001276 uint64_t v1 = arg_info(op->args[1])->val;
1277 uint64_t v2 = arg_info(op->args[2])->val;
1278 int shr = op->args[3];
Richard Hendersonfce12962019-02-25 10:29:25 -08001279
1280 if (opc == INDEX_op_extract2_i64) {
Richard Henderson54795542020-09-06 16:21:32 -07001281 tmp = (v1 >> shr) | (v2 << (64 - shr));
Richard Hendersonfce12962019-02-25 10:29:25 -08001282 } else {
Richard Henderson54795542020-09-06 16:21:32 -07001283 tmp = (int32_t)(((uint32_t)v1 >> shr) |
1284 ((uint32_t)v2 << (32 - shr)));
Richard Hendersonfce12962019-02-25 10:29:25 -08001285 }
Richard Henderson8fe35e02020-03-30 20:42:43 -07001286 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
Richard Hendersonfce12962019-02-25 10:29:25 -08001287 break;
1288 }
1289 goto do_default;
1290
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +02001291 CASE_OP_32_64(setcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001292 tmp = do_constant_folding_cond(opc, op->args[1],
1293 op->args[2], op->args[3]);
Aurelien Jarnob336ceb2012-09-18 19:37:00 +02001294 if (tmp != 2) {
Richard Henderson8fe35e02020-03-30 20:42:43 -07001295 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
Richard Henderson6e14e912012-10-02 11:32:24 -07001296 break;
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +02001297 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001298 goto do_default;
1299
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001300 CASE_OP_32_64(brcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001301 tmp = do_constant_folding_cond(opc, op->args[0],
1302 op->args[1], op->args[2]);
Aurelien Jarnob336ceb2012-09-18 19:37:00 +02001303 if (tmp != 2) {
1304 if (tmp) {
Richard Henderson8fe35e02020-03-30 20:42:43 -07001305 memset(&temps_used, 0, sizeof(temps_used));
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001306 op->opc = INDEX_op_br;
Richard Hendersonacd93702016-12-08 12:28:42 -08001307 op->args[0] = op->args[3];
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001308 } else {
Richard Henderson0c627cd2014-03-30 16:51:54 -07001309 tcg_op_remove(s, op);
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001310 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001311 break;
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001312 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001313 goto do_default;
1314
Richard Hendersonfa01a202012-09-21 10:13:37 -07001315 CASE_OP_32_64(movcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001316 tmp = do_constant_folding_cond(opc, op->args[1],
1317 op->args[2], op->args[5]);
Aurelien Jarnob336ceb2012-09-18 19:37:00 +02001318 if (tmp != 2) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001319 tcg_opt_gen_mov(s, op, op->args[0], op->args[4-tmp]);
Richard Henderson6e14e912012-10-02 11:32:24 -07001320 break;
Richard Hendersonfa01a202012-09-21 10:13:37 -07001321 }
Richard Henderson63490392017-06-20 13:43:15 -07001322 if (arg_is_const(op->args[3]) && arg_is_const(op->args[4])) {
Richard Henderson54795542020-09-06 16:21:32 -07001323 uint64_t tv = arg_info(op->args[3])->val;
1324 uint64_t fv = arg_info(op->args[4])->val;
Richard Hendersonacd93702016-12-08 12:28:42 -08001325 TCGCond cond = op->args[5];
Richard Henderson54795542020-09-06 16:21:32 -07001326
Richard Henderson333b21b2016-10-23 20:44:32 -07001327 if (fv == 1 && tv == 0) {
1328 cond = tcg_invert_cond(cond);
1329 } else if (!(tv == 1 && fv == 0)) {
1330 goto do_default;
1331 }
Richard Hendersonacd93702016-12-08 12:28:42 -08001332 op->args[3] = cond;
Richard Henderson333b21b2016-10-23 20:44:32 -07001333 op->opc = opc = (opc == INDEX_op_movcond_i32
1334 ? INDEX_op_setcond_i32
1335 : INDEX_op_setcond_i64);
1336 nb_iargs = 2;
1337 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001338 goto do_default;
1339
Richard Henderson212c3282012-10-02 11:32:28 -07001340 case INDEX_op_add2_i32:
1341 case INDEX_op_sub2_i32:
Richard Henderson63490392017-06-20 13:43:15 -07001342 if (arg_is_const(op->args[2]) && arg_is_const(op->args[3])
1343 && arg_is_const(op->args[4]) && arg_is_const(op->args[5])) {
1344 uint32_t al = arg_info(op->args[2])->val;
1345 uint32_t ah = arg_info(op->args[3])->val;
1346 uint32_t bl = arg_info(op->args[4])->val;
1347 uint32_t bh = arg_info(op->args[5])->val;
Richard Henderson212c3282012-10-02 11:32:28 -07001348 uint64_t a = ((uint64_t)ah << 32) | al;
1349 uint64_t b = ((uint64_t)bh << 32) | bl;
1350 TCGArg rl, rh;
Richard Henderson8fe35e02020-03-30 20:42:43 -07001351 TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_mov_i32);
Richard Henderson212c3282012-10-02 11:32:28 -07001352
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001353 if (opc == INDEX_op_add2_i32) {
Richard Henderson212c3282012-10-02 11:32:28 -07001354 a += b;
1355 } else {
1356 a -= b;
1357 }
1358
Richard Hendersonacd93702016-12-08 12:28:42 -08001359 rl = op->args[0];
1360 rh = op->args[1];
Richard Henderson8fe35e02020-03-30 20:42:43 -07001361 tcg_opt_gen_movi(s, &temps_used, op, rl, (int32_t)a);
1362 tcg_opt_gen_movi(s, &temps_used, op2, rh, (int32_t)(a >> 32));
Richard Henderson212c3282012-10-02 11:32:28 -07001363 break;
1364 }
1365 goto do_default;
1366
Richard Henderson14149682012-10-02 11:32:30 -07001367 case INDEX_op_mulu2_i32:
Richard Henderson63490392017-06-20 13:43:15 -07001368 if (arg_is_const(op->args[2]) && arg_is_const(op->args[3])) {
1369 uint32_t a = arg_info(op->args[2])->val;
1370 uint32_t b = arg_info(op->args[3])->val;
Richard Henderson14149682012-10-02 11:32:30 -07001371 uint64_t r = (uint64_t)a * b;
1372 TCGArg rl, rh;
Richard Henderson8fe35e02020-03-30 20:42:43 -07001373 TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_mov_i32);
Richard Henderson14149682012-10-02 11:32:30 -07001374
Richard Hendersonacd93702016-12-08 12:28:42 -08001375 rl = op->args[0];
1376 rh = op->args[1];
Richard Henderson8fe35e02020-03-30 20:42:43 -07001377 tcg_opt_gen_movi(s, &temps_used, op, rl, (int32_t)r);
1378 tcg_opt_gen_movi(s, &temps_used, op2, rh, (int32_t)(r >> 32));
Richard Henderson14149682012-10-02 11:32:30 -07001379 break;
1380 }
1381 goto do_default;
1382
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001383 case INDEX_op_brcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -08001384 tmp = do_constant_folding_cond2(&op->args[0], &op->args[2],
1385 op->args[4]);
Richard Henderson6c4382f2012-10-02 11:32:27 -07001386 if (tmp != 2) {
1387 if (tmp) {
Richard Hendersona7635512014-04-23 22:18:30 -07001388 do_brcond_true:
Richard Henderson8fe35e02020-03-30 20:42:43 -07001389 memset(&temps_used, 0, sizeof(temps_used));
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001390 op->opc = INDEX_op_br;
Richard Hendersonacd93702016-12-08 12:28:42 -08001391 op->args[0] = op->args[5];
Richard Henderson6c4382f2012-10-02 11:32:27 -07001392 } else {
Richard Hendersona7635512014-04-23 22:18:30 -07001393 do_brcond_false:
Richard Henderson0c627cd2014-03-30 16:51:54 -07001394 tcg_op_remove(s, op);
Richard Henderson6c4382f2012-10-02 11:32:27 -07001395 }
Richard Hendersonacd93702016-12-08 12:28:42 -08001396 } else if ((op->args[4] == TCG_COND_LT
1397 || op->args[4] == TCG_COND_GE)
Richard Henderson63490392017-06-20 13:43:15 -07001398 && arg_is_const(op->args[2])
1399 && arg_info(op->args[2])->val == 0
1400 && arg_is_const(op->args[3])
1401 && arg_info(op->args[3])->val == 0) {
Richard Henderson6c4382f2012-10-02 11:32:27 -07001402 /* Simplify LT/GE comparisons vs zero to a single compare
1403 vs the high word of the input. */
Richard Hendersona7635512014-04-23 22:18:30 -07001404 do_brcond_high:
Richard Henderson8fe35e02020-03-30 20:42:43 -07001405 memset(&temps_used, 0, sizeof(temps_used));
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001406 op->opc = INDEX_op_brcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001407 op->args[0] = op->args[1];
1408 op->args[1] = op->args[3];
1409 op->args[2] = op->args[4];
1410 op->args[3] = op->args[5];
1411 } else if (op->args[4] == TCG_COND_EQ) {
Richard Hendersona7635512014-04-23 22:18:30 -07001412 /* Simplify EQ comparisons where one of the pairs
1413 can be simplified. */
1414 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001415 op->args[0], op->args[2],
1416 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001417 if (tmp == 0) {
1418 goto do_brcond_false;
1419 } else if (tmp == 1) {
1420 goto do_brcond_high;
1421 }
1422 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001423 op->args[1], op->args[3],
1424 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001425 if (tmp == 0) {
1426 goto do_brcond_false;
1427 } else if (tmp != 1) {
1428 goto do_default;
1429 }
1430 do_brcond_low:
Richard Henderson8fe35e02020-03-30 20:42:43 -07001431 memset(&temps_used, 0, sizeof(temps_used));
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001432 op->opc = INDEX_op_brcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001433 op->args[1] = op->args[2];
1434 op->args[2] = op->args[4];
1435 op->args[3] = op->args[5];
1436 } else if (op->args[4] == TCG_COND_NE) {
Richard Hendersona7635512014-04-23 22:18:30 -07001437 /* Simplify NE comparisons where one of the pairs
1438 can be simplified. */
1439 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001440 op->args[0], op->args[2],
1441 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001442 if (tmp == 0) {
1443 goto do_brcond_high;
1444 } else if (tmp == 1) {
1445 goto do_brcond_true;
1446 }
1447 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001448 op->args[1], op->args[3],
1449 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001450 if (tmp == 0) {
1451 goto do_brcond_low;
1452 } else if (tmp == 1) {
1453 goto do_brcond_true;
1454 }
1455 goto do_default;
Richard Henderson6c4382f2012-10-02 11:32:27 -07001456 } else {
1457 goto do_default;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001458 }
Richard Henderson6c4382f2012-10-02 11:32:27 -07001459 break;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001460
1461 case INDEX_op_setcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -08001462 tmp = do_constant_folding_cond2(&op->args[1], &op->args[3],
1463 op->args[5]);
Richard Henderson6c4382f2012-10-02 11:32:27 -07001464 if (tmp != 2) {
Richard Hendersona7635512014-04-23 22:18:30 -07001465 do_setcond_const:
Richard Henderson8fe35e02020-03-30 20:42:43 -07001466 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
Richard Hendersonacd93702016-12-08 12:28:42 -08001467 } else if ((op->args[5] == TCG_COND_LT
1468 || op->args[5] == TCG_COND_GE)
Richard Henderson63490392017-06-20 13:43:15 -07001469 && arg_is_const(op->args[3])
1470 && arg_info(op->args[3])->val == 0
1471 && arg_is_const(op->args[4])
1472 && arg_info(op->args[4])->val == 0) {
Richard Henderson6c4382f2012-10-02 11:32:27 -07001473 /* Simplify LT/GE comparisons vs zero to a single compare
1474 vs the high word of the input. */
Richard Hendersona7635512014-04-23 22:18:30 -07001475 do_setcond_high:
Richard Hendersonacd93702016-12-08 12:28:42 -08001476 reset_temp(op->args[0]);
Richard Hendersonb1fde412021-08-23 13:07:49 -07001477 arg_info(op->args[0])->z_mask = 1;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001478 op->opc = INDEX_op_setcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001479 op->args[1] = op->args[2];
1480 op->args[2] = op->args[4];
1481 op->args[3] = op->args[5];
1482 } else if (op->args[5] == TCG_COND_EQ) {
Richard Hendersona7635512014-04-23 22:18:30 -07001483 /* Simplify EQ comparisons where one of the pairs
1484 can be simplified. */
1485 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001486 op->args[1], op->args[3],
1487 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001488 if (tmp == 0) {
1489 goto do_setcond_const;
1490 } else if (tmp == 1) {
1491 goto do_setcond_high;
1492 }
1493 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001494 op->args[2], op->args[4],
1495 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001496 if (tmp == 0) {
1497 goto do_setcond_high;
1498 } else if (tmp != 1) {
1499 goto do_default;
1500 }
1501 do_setcond_low:
Richard Hendersonacd93702016-12-08 12:28:42 -08001502 reset_temp(op->args[0]);
Richard Hendersonb1fde412021-08-23 13:07:49 -07001503 arg_info(op->args[0])->z_mask = 1;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001504 op->opc = INDEX_op_setcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001505 op->args[2] = op->args[3];
1506 op->args[3] = op->args[5];
1507 } else if (op->args[5] == TCG_COND_NE) {
Richard Hendersona7635512014-04-23 22:18:30 -07001508 /* Simplify NE comparisons where one of the pairs
1509 can be simplified. */
1510 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001511 op->args[1], op->args[3],
1512 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001513 if (tmp == 0) {
1514 goto do_setcond_high;
1515 } else if (tmp == 1) {
1516 goto do_setcond_const;
1517 }
1518 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001519 op->args[2], op->args[4],
1520 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001521 if (tmp == 0) {
1522 goto do_setcond_low;
1523 } else if (tmp == 1) {
1524 goto do_setcond_const;
1525 }
1526 goto do_default;
Richard Henderson6c4382f2012-10-02 11:32:27 -07001527 } else {
1528 goto do_default;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001529 }
Richard Henderson6c4382f2012-10-02 11:32:27 -07001530 break;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001531
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001532 case INDEX_op_call:
Richard Henderson90163902021-03-18 10:21:45 -06001533 if (!(tcg_call_flags(op)
Richard Hendersoncf066672014-03-22 20:06:52 -07001534 & (TCG_CALL_NO_READ_GLOBALS | TCG_CALL_NO_WRITE_GLOBALS))) {
Kirill Batuzov22613af2011-07-07 16:37:13 +04001535 for (i = 0; i < nb_globals; i++) {
Aurelien Jarno1208d7d2015-07-27 12:41:44 +02001536 if (test_bit(i, temps_used.l)) {
Richard Henderson63490392017-06-20 13:43:15 -07001537 reset_ts(&s->temps[i]);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +02001538 }
Kirill Batuzov22613af2011-07-07 16:37:13 +04001539 }
1540 }
Richard Hendersonc56caea2020-11-03 13:20:21 -08001541 goto do_reset_output;
Richard Henderson6e14e912012-10-02 11:32:24 -07001542
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001543 default:
Richard Henderson6e14e912012-10-02 11:32:24 -07001544 do_default:
Richard Hendersonc56caea2020-11-03 13:20:21 -08001545 /* Default case: we know nothing about operation (or were unable
1546 to compute the operation result) so no propagation is done.
1547 We trash everything if the operation is the end of a basic
Richard Hendersonb1fde412021-08-23 13:07:49 -07001548 block, otherwise we only trash the output args. "z_mask" is
Richard Hendersonc56caea2020-11-03 13:20:21 -08001549 the non-zero bits mask for the first output arg. */
1550 if (def->flags & TCG_OPF_BB_END) {
Richard Henderson8fe35e02020-03-30 20:42:43 -07001551 memset(&temps_used, 0, sizeof(temps_used));
Richard Hendersonc56caea2020-11-03 13:20:21 -08001552 } else {
1553 do_reset_output:
1554 for (i = 0; i < nb_oargs; i++) {
1555 reset_temp(op->args[i]);
1556 /* Save the corresponding known-zero bits mask for the
1557 first output argument (only one supported so far). */
1558 if (i == 0) {
Richard Hendersonb1fde412021-08-23 13:07:49 -07001559 arg_info(op->args[i])->z_mask = z_mask;
Richard Hendersonc56caea2020-11-03 13:20:21 -08001560 }
Aurelien Jarnoa2550662012-09-19 21:40:30 +02001561 }
Kirill Batuzov22613af2011-07-07 16:37:13 +04001562 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001563 break;
1564 }
Pranith Kumar34f93922016-08-23 09:48:25 -04001565
1566 /* Eliminate duplicate and redundant fence instructions. */
Richard Hendersonacd93702016-12-08 12:28:42 -08001567 if (prev_mb) {
Pranith Kumar34f93922016-08-23 09:48:25 -04001568 switch (opc) {
1569 case INDEX_op_mb:
1570 /* Merge two barriers of the same type into one,
1571 * or a weaker barrier into a stronger one,
1572 * or two weaker barriers into a stronger one.
1573 * mb X; mb Y => mb X|Y
1574 * mb; strl => mb; st
1575 * ldaq; mb => ld; mb
1576 * ldaq; strl => ld; mb; st
1577 * Other combinations are also merged into a strong
1578 * barrier. This is stricter than specified but for
1579 * the purposes of TCG is better than not optimizing.
1580 */
Richard Hendersonacd93702016-12-08 12:28:42 -08001581 prev_mb->args[0] |= op->args[0];
Pranith Kumar34f93922016-08-23 09:48:25 -04001582 tcg_op_remove(s, op);
1583 break;
1584
1585 default:
1586 /* Opcodes that end the block stop the optimization. */
1587 if ((def->flags & TCG_OPF_BB_END) == 0) {
1588 break;
1589 }
1590 /* fallthru */
1591 case INDEX_op_qemu_ld_i32:
1592 case INDEX_op_qemu_ld_i64:
1593 case INDEX_op_qemu_st_i32:
Richard Henderson07ce0b02020-12-09 13:58:39 -06001594 case INDEX_op_qemu_st8_i32:
Pranith Kumar34f93922016-08-23 09:48:25 -04001595 case INDEX_op_qemu_st_i64:
1596 case INDEX_op_call:
1597 /* Opcodes that touch guest memory stop the optimization. */
Richard Hendersonacd93702016-12-08 12:28:42 -08001598 prev_mb = NULL;
Pranith Kumar34f93922016-08-23 09:48:25 -04001599 break;
1600 }
1601 } else if (opc == INDEX_op_mb) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001602 prev_mb = op;
Pranith Kumar34f93922016-08-23 09:48:25 -04001603 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001604 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001605}