blob: fad6f5de1f7e1d1385f6780ece46ab4d7ecb530c [file] [log] [blame]
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001/*
2 * Optimizations for Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2010 Samsung Electronics.
5 * Contributed by Kirill Batuzov <batuzovk@ispras.ru>
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25
Peter Maydell757e7252016-01-26 18:17:08 +000026#include "qemu/osdep.h"
Philippe Mathieu-Daudédcb32f12020-01-01 12:23:00 +010027#include "tcg/tcg-op.h"
Richard Henderson90163902021-03-18 10:21:45 -060028#include "tcg-internal.h"
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040029
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040030#define CASE_OP_32_64(x) \
31 glue(glue(case INDEX_op_, x), _i32): \
32 glue(glue(case INDEX_op_, x), _i64)
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040033
Richard Henderson170ba882017-11-22 09:07:11 +010034#define CASE_OP_32_64_VEC(x) \
35 glue(glue(case INDEX_op_, x), _i32): \
36 glue(glue(case INDEX_op_, x), _i64): \
37 glue(glue(case INDEX_op_, x), _vec)
38
Richard Henderson6fcb98e2020-03-30 17:44:30 -070039typedef struct TempOptInfo {
Aurelien Jarnob41059d2015-07-27 12:41:44 +020040 bool is_const;
Richard Henderson63490392017-06-20 13:43:15 -070041 TCGTemp *prev_copy;
42 TCGTemp *next_copy;
Richard Henderson54795542020-09-06 16:21:32 -070043 uint64_t val;
Richard Hendersonb1fde412021-08-23 13:07:49 -070044 uint64_t z_mask; /* mask bit is 0 if and only if value bit is 0 */
Richard Henderson6fcb98e2020-03-30 17:44:30 -070045} TempOptInfo;
Kirill Batuzov22613af2011-07-07 16:37:13 +040046
Richard Henderson3b3f8472021-08-23 22:06:31 -070047typedef struct OptContext {
Richard Hendersondc849882021-08-24 07:13:45 -070048 TCGContext *tcg;
Richard Hendersond0ed5152021-08-24 07:38:39 -070049 TCGOp *prev_mb;
Richard Henderson3b3f8472021-08-23 22:06:31 -070050 TCGTempSet temps_used;
51} OptContext;
52
Richard Henderson6fcb98e2020-03-30 17:44:30 -070053static inline TempOptInfo *ts_info(TCGTemp *ts)
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020054{
Richard Henderson63490392017-06-20 13:43:15 -070055 return ts->state_ptr;
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020056}
57
Richard Henderson6fcb98e2020-03-30 17:44:30 -070058static inline TempOptInfo *arg_info(TCGArg arg)
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020059{
Richard Henderson63490392017-06-20 13:43:15 -070060 return ts_info(arg_temp(arg));
61}
62
63static inline bool ts_is_const(TCGTemp *ts)
64{
65 return ts_info(ts)->is_const;
66}
67
68static inline bool arg_is_const(TCGArg arg)
69{
70 return ts_is_const(arg_temp(arg));
71}
72
73static inline bool ts_is_copy(TCGTemp *ts)
74{
75 return ts_info(ts)->next_copy != ts;
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020076}
77
Aurelien Jarnob41059d2015-07-27 12:41:44 +020078/* Reset TEMP's state, possibly removing the temp for the list of copies. */
Richard Henderson63490392017-06-20 13:43:15 -070079static void reset_ts(TCGTemp *ts)
Kirill Batuzov22613af2011-07-07 16:37:13 +040080{
Richard Henderson6fcb98e2020-03-30 17:44:30 -070081 TempOptInfo *ti = ts_info(ts);
82 TempOptInfo *pi = ts_info(ti->prev_copy);
83 TempOptInfo *ni = ts_info(ti->next_copy);
Richard Henderson63490392017-06-20 13:43:15 -070084
85 ni->prev_copy = ti->prev_copy;
86 pi->next_copy = ti->next_copy;
87 ti->next_copy = ts;
88 ti->prev_copy = ts;
89 ti->is_const = false;
Richard Hendersonb1fde412021-08-23 13:07:49 -070090 ti->z_mask = -1;
Richard Henderson63490392017-06-20 13:43:15 -070091}
92
93static void reset_temp(TCGArg arg)
94{
95 reset_ts(arg_temp(arg));
Kirill Batuzov22613af2011-07-07 16:37:13 +040096}
97
Aurelien Jarno1208d7d2015-07-27 12:41:44 +020098/* Initialize and activate a temporary. */
Richard Henderson3b3f8472021-08-23 22:06:31 -070099static void init_ts_info(OptContext *ctx, TCGTemp *ts)
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200100{
Richard Henderson63490392017-06-20 13:43:15 -0700101 size_t idx = temp_idx(ts);
Richard Henderson8f17a972020-03-30 19:52:02 -0700102 TempOptInfo *ti;
Richard Henderson63490392017-06-20 13:43:15 -0700103
Richard Henderson3b3f8472021-08-23 22:06:31 -0700104 if (test_bit(idx, ctx->temps_used.l)) {
Richard Henderson8f17a972020-03-30 19:52:02 -0700105 return;
106 }
Richard Henderson3b3f8472021-08-23 22:06:31 -0700107 set_bit(idx, ctx->temps_used.l);
Richard Henderson8f17a972020-03-30 19:52:02 -0700108
109 ti = ts->state_ptr;
110 if (ti == NULL) {
111 ti = tcg_malloc(sizeof(TempOptInfo));
Richard Henderson63490392017-06-20 13:43:15 -0700112 ts->state_ptr = ti;
Richard Henderson8f17a972020-03-30 19:52:02 -0700113 }
114
115 ti->next_copy = ts;
116 ti->prev_copy = ts;
117 if (ts->kind == TEMP_CONST) {
118 ti->is_const = true;
119 ti->val = ts->val;
Richard Hendersonb1fde412021-08-23 13:07:49 -0700120 ti->z_mask = ts->val;
Richard Henderson8f17a972020-03-30 19:52:02 -0700121 if (TCG_TARGET_REG_BITS > 32 && ts->type == TCG_TYPE_I32) {
122 /* High bits of a 32-bit quantity are garbage. */
Richard Hendersonb1fde412021-08-23 13:07:49 -0700123 ti->z_mask |= ~0xffffffffull;
Richard Hendersonc0522132020-03-29 18:55:52 -0700124 }
Richard Henderson8f17a972020-03-30 19:52:02 -0700125 } else {
126 ti->is_const = false;
Richard Hendersonb1fde412021-08-23 13:07:49 -0700127 ti->z_mask = -1;
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200128 }
129}
130
Richard Henderson63490392017-06-20 13:43:15 -0700131static TCGTemp *find_better_copy(TCGContext *s, TCGTemp *ts)
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200132{
Richard Henderson4c868ce2020-04-23 09:02:23 -0700133 TCGTemp *i, *g, *l;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200134
Richard Henderson4c868ce2020-04-23 09:02:23 -0700135 /* If this is already readonly, we can't do better. */
136 if (temp_readonly(ts)) {
Richard Henderson63490392017-06-20 13:43:15 -0700137 return ts;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200138 }
139
Richard Henderson4c868ce2020-04-23 09:02:23 -0700140 g = l = NULL;
Richard Henderson63490392017-06-20 13:43:15 -0700141 for (i = ts_info(ts)->next_copy; i != ts; i = ts_info(i)->next_copy) {
Richard Henderson4c868ce2020-04-23 09:02:23 -0700142 if (temp_readonly(i)) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200143 return i;
Richard Henderson4c868ce2020-04-23 09:02:23 -0700144 } else if (i->kind > ts->kind) {
145 if (i->kind == TEMP_GLOBAL) {
146 g = i;
147 } else if (i->kind == TEMP_LOCAL) {
148 l = i;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200149 }
150 }
151 }
152
Richard Henderson4c868ce2020-04-23 09:02:23 -0700153 /* If we didn't find a better representation, return the same temp. */
154 return g ? g : l ? l : ts;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200155}
156
Richard Henderson63490392017-06-20 13:43:15 -0700157static bool ts_are_copies(TCGTemp *ts1, TCGTemp *ts2)
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200158{
Richard Henderson63490392017-06-20 13:43:15 -0700159 TCGTemp *i;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200160
Richard Henderson63490392017-06-20 13:43:15 -0700161 if (ts1 == ts2) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200162 return true;
163 }
164
Richard Henderson63490392017-06-20 13:43:15 -0700165 if (!ts_is_copy(ts1) || !ts_is_copy(ts2)) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200166 return false;
167 }
168
Richard Henderson63490392017-06-20 13:43:15 -0700169 for (i = ts_info(ts1)->next_copy; i != ts1; i = ts_info(i)->next_copy) {
170 if (i == ts2) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200171 return true;
172 }
173 }
174
175 return false;
176}
177
Richard Henderson63490392017-06-20 13:43:15 -0700178static bool args_are_copies(TCGArg arg1, TCGArg arg2)
179{
180 return ts_are_copies(arg_temp(arg1), arg_temp(arg2));
181}
182
Richard Hendersondc849882021-08-24 07:13:45 -0700183static void tcg_opt_gen_mov(OptContext *ctx, TCGOp *op, TCGArg dst, TCGArg src)
Kirill Batuzov22613af2011-07-07 16:37:13 +0400184{
Richard Henderson63490392017-06-20 13:43:15 -0700185 TCGTemp *dst_ts = arg_temp(dst);
186 TCGTemp *src_ts = arg_temp(src);
Richard Henderson170ba882017-11-22 09:07:11 +0100187 const TCGOpDef *def;
Richard Henderson6fcb98e2020-03-30 17:44:30 -0700188 TempOptInfo *di;
189 TempOptInfo *si;
Richard Hendersonb1fde412021-08-23 13:07:49 -0700190 uint64_t z_mask;
Richard Henderson63490392017-06-20 13:43:15 -0700191 TCGOpcode new_op;
192
193 if (ts_are_copies(dst_ts, src_ts)) {
Richard Hendersondc849882021-08-24 07:13:45 -0700194 tcg_op_remove(ctx->tcg, op);
Aurelien Jarno53657182015-06-04 21:53:25 +0200195 return;
196 }
197
Richard Henderson63490392017-06-20 13:43:15 -0700198 reset_ts(dst_ts);
199 di = ts_info(dst_ts);
200 si = ts_info(src_ts);
Richard Henderson170ba882017-11-22 09:07:11 +0100201 def = &tcg_op_defs[op->opc];
202 if (def->flags & TCG_OPF_VECTOR) {
203 new_op = INDEX_op_mov_vec;
204 } else if (def->flags & TCG_OPF_64BIT) {
205 new_op = INDEX_op_mov_i64;
206 } else {
207 new_op = INDEX_op_mov_i32;
208 }
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700209 op->opc = new_op;
Richard Henderson170ba882017-11-22 09:07:11 +0100210 /* TCGOP_VECL and TCGOP_VECE remain unchanged. */
Richard Henderson63490392017-06-20 13:43:15 -0700211 op->args[0] = dst;
212 op->args[1] = src;
Richard Hendersona62f6f52014-05-22 10:59:12 -0700213
Richard Hendersonb1fde412021-08-23 13:07:49 -0700214 z_mask = si->z_mask;
Richard Henderson24666ba2014-05-22 11:14:10 -0700215 if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_mov_i32) {
216 /* High bits of the destination are now garbage. */
Richard Hendersonb1fde412021-08-23 13:07:49 -0700217 z_mask |= ~0xffffffffull;
Richard Henderson24666ba2014-05-22 11:14:10 -0700218 }
Richard Hendersonb1fde412021-08-23 13:07:49 -0700219 di->z_mask = z_mask;
Richard Henderson24666ba2014-05-22 11:14:10 -0700220
Richard Henderson63490392017-06-20 13:43:15 -0700221 if (src_ts->type == dst_ts->type) {
Richard Henderson6fcb98e2020-03-30 17:44:30 -0700222 TempOptInfo *ni = ts_info(si->next_copy);
Richard Henderson63490392017-06-20 13:43:15 -0700223
224 di->next_copy = si->next_copy;
225 di->prev_copy = src_ts;
226 ni->prev_copy = dst_ts;
227 si->next_copy = dst_ts;
228 di->is_const = si->is_const;
229 di->val = si->val;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800230 }
Kirill Batuzov22613af2011-07-07 16:37:13 +0400231}
232
Richard Hendersondc849882021-08-24 07:13:45 -0700233static void tcg_opt_gen_movi(OptContext *ctx, TCGOp *op,
234 TCGArg dst, uint64_t val)
Richard Henderson8fe35e02020-03-30 20:42:43 -0700235{
236 const TCGOpDef *def = &tcg_op_defs[op->opc];
237 TCGType type;
238 TCGTemp *tv;
239
240 if (def->flags & TCG_OPF_VECTOR) {
241 type = TCGOP_VECL(op) + TCG_TYPE_V64;
242 } else if (def->flags & TCG_OPF_64BIT) {
243 type = TCG_TYPE_I64;
244 } else {
245 type = TCG_TYPE_I32;
246 }
247
248 /* Convert movi to mov with constant temp. */
249 tv = tcg_constant_internal(type, val);
Richard Henderson3b3f8472021-08-23 22:06:31 -0700250 init_ts_info(ctx, tv);
Richard Hendersondc849882021-08-24 07:13:45 -0700251 tcg_opt_gen_mov(ctx, op, dst, temp_arg(tv));
Richard Henderson8fe35e02020-03-30 20:42:43 -0700252}
253
Richard Henderson54795542020-09-06 16:21:32 -0700254static uint64_t do_constant_folding_2(TCGOpcode op, uint64_t x, uint64_t y)
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400255{
Richard Henderson03271522013-08-14 14:35:56 -0700256 uint64_t l64, h64;
257
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400258 switch (op) {
259 CASE_OP_32_64(add):
260 return x + y;
261
262 CASE_OP_32_64(sub):
263 return x - y;
264
265 CASE_OP_32_64(mul):
266 return x * y;
267
Kirill Batuzov9a810902011-07-07 16:37:15 +0400268 CASE_OP_32_64(and):
269 return x & y;
270
271 CASE_OP_32_64(or):
272 return x | y;
273
274 CASE_OP_32_64(xor):
275 return x ^ y;
276
Kirill Batuzov55c09752011-07-07 16:37:16 +0400277 case INDEX_op_shl_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700278 return (uint32_t)x << (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400279
Kirill Batuzov55c09752011-07-07 16:37:16 +0400280 case INDEX_op_shl_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700281 return (uint64_t)x << (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400282
283 case INDEX_op_shr_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700284 return (uint32_t)x >> (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400285
Kirill Batuzov55c09752011-07-07 16:37:16 +0400286 case INDEX_op_shr_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700287 return (uint64_t)x >> (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400288
289 case INDEX_op_sar_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700290 return (int32_t)x >> (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400291
Kirill Batuzov55c09752011-07-07 16:37:16 +0400292 case INDEX_op_sar_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700293 return (int64_t)x >> (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400294
295 case INDEX_op_rotr_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700296 return ror32(x, y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400297
Kirill Batuzov55c09752011-07-07 16:37:16 +0400298 case INDEX_op_rotr_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700299 return ror64(x, y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400300
301 case INDEX_op_rotl_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700302 return rol32(x, y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400303
Kirill Batuzov55c09752011-07-07 16:37:16 +0400304 case INDEX_op_rotl_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700305 return rol64(x, y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400306
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700307 CASE_OP_32_64(not):
Kirill Batuzova640f032011-07-07 16:37:17 +0400308 return ~x;
309
Richard Hendersoncb25c802011-08-17 14:11:47 -0700310 CASE_OP_32_64(neg):
311 return -x;
312
313 CASE_OP_32_64(andc):
314 return x & ~y;
315
316 CASE_OP_32_64(orc):
317 return x | ~y;
318
319 CASE_OP_32_64(eqv):
320 return ~(x ^ y);
321
322 CASE_OP_32_64(nand):
323 return ~(x & y);
324
325 CASE_OP_32_64(nor):
326 return ~(x | y);
327
Richard Henderson0e28d002016-11-16 09:23:28 +0100328 case INDEX_op_clz_i32:
329 return (uint32_t)x ? clz32(x) : y;
330
331 case INDEX_op_clz_i64:
332 return x ? clz64(x) : y;
333
334 case INDEX_op_ctz_i32:
335 return (uint32_t)x ? ctz32(x) : y;
336
337 case INDEX_op_ctz_i64:
338 return x ? ctz64(x) : y;
339
Richard Hendersona768e4e2016-11-21 11:13:39 +0100340 case INDEX_op_ctpop_i32:
341 return ctpop32(x);
342
343 case INDEX_op_ctpop_i64:
344 return ctpop64(x);
345
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700346 CASE_OP_32_64(ext8s):
Kirill Batuzova640f032011-07-07 16:37:17 +0400347 return (int8_t)x;
348
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700349 CASE_OP_32_64(ext16s):
Kirill Batuzova640f032011-07-07 16:37:17 +0400350 return (int16_t)x;
351
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700352 CASE_OP_32_64(ext8u):
Kirill Batuzova640f032011-07-07 16:37:17 +0400353 return (uint8_t)x;
354
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700355 CASE_OP_32_64(ext16u):
Kirill Batuzova640f032011-07-07 16:37:17 +0400356 return (uint16_t)x;
357
Richard Henderson64985942018-11-20 08:53:34 +0100358 CASE_OP_32_64(bswap16):
Richard Henderson0b76ff82021-06-13 13:04:00 -0700359 x = bswap16(x);
360 return y & TCG_BSWAP_OS ? (int16_t)x : x;
Richard Henderson64985942018-11-20 08:53:34 +0100361
362 CASE_OP_32_64(bswap32):
Richard Henderson0b76ff82021-06-13 13:04:00 -0700363 x = bswap32(x);
364 return y & TCG_BSWAP_OS ? (int32_t)x : x;
Richard Henderson64985942018-11-20 08:53:34 +0100365
366 case INDEX_op_bswap64_i64:
367 return bswap64(x);
368
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200369 case INDEX_op_ext_i32_i64:
Kirill Batuzova640f032011-07-07 16:37:17 +0400370 case INDEX_op_ext32s_i64:
371 return (int32_t)x;
372
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200373 case INDEX_op_extu_i32_i64:
Richard Henderson609ad702015-07-24 07:16:00 -0700374 case INDEX_op_extrl_i64_i32:
Kirill Batuzova640f032011-07-07 16:37:17 +0400375 case INDEX_op_ext32u_i64:
376 return (uint32_t)x;
Kirill Batuzova640f032011-07-07 16:37:17 +0400377
Richard Henderson609ad702015-07-24 07:16:00 -0700378 case INDEX_op_extrh_i64_i32:
379 return (uint64_t)x >> 32;
380
Richard Henderson03271522013-08-14 14:35:56 -0700381 case INDEX_op_muluh_i32:
382 return ((uint64_t)(uint32_t)x * (uint32_t)y) >> 32;
383 case INDEX_op_mulsh_i32:
384 return ((int64_t)(int32_t)x * (int32_t)y) >> 32;
385
386 case INDEX_op_muluh_i64:
387 mulu64(&l64, &h64, x, y);
388 return h64;
389 case INDEX_op_mulsh_i64:
390 muls64(&l64, &h64, x, y);
391 return h64;
392
Richard Henderson01547f72013-08-14 15:22:46 -0700393 case INDEX_op_div_i32:
394 /* Avoid crashing on divide by zero, otherwise undefined. */
395 return (int32_t)x / ((int32_t)y ? : 1);
396 case INDEX_op_divu_i32:
397 return (uint32_t)x / ((uint32_t)y ? : 1);
398 case INDEX_op_div_i64:
399 return (int64_t)x / ((int64_t)y ? : 1);
400 case INDEX_op_divu_i64:
401 return (uint64_t)x / ((uint64_t)y ? : 1);
402
403 case INDEX_op_rem_i32:
404 return (int32_t)x % ((int32_t)y ? : 1);
405 case INDEX_op_remu_i32:
406 return (uint32_t)x % ((uint32_t)y ? : 1);
407 case INDEX_op_rem_i64:
408 return (int64_t)x % ((int64_t)y ? : 1);
409 case INDEX_op_remu_i64:
410 return (uint64_t)x % ((uint64_t)y ? : 1);
411
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400412 default:
413 fprintf(stderr,
414 "Unrecognized operation %d in do_constant_folding.\n", op);
415 tcg_abort();
416 }
417}
418
Richard Henderson54795542020-09-06 16:21:32 -0700419static uint64_t do_constant_folding(TCGOpcode op, uint64_t x, uint64_t y)
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400420{
Richard Henderson170ba882017-11-22 09:07:11 +0100421 const TCGOpDef *def = &tcg_op_defs[op];
Richard Henderson54795542020-09-06 16:21:32 -0700422 uint64_t res = do_constant_folding_2(op, x, y);
Richard Henderson170ba882017-11-22 09:07:11 +0100423 if (!(def->flags & TCG_OPF_64BIT)) {
Aurelien Jarno29f3ff82015-07-10 18:03:31 +0200424 res = (int32_t)res;
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400425 }
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400426 return res;
427}
428
Richard Henderson9519da72012-10-02 11:32:26 -0700429static bool do_constant_folding_cond_32(uint32_t x, uint32_t y, TCGCond c)
430{
431 switch (c) {
432 case TCG_COND_EQ:
433 return x == y;
434 case TCG_COND_NE:
435 return x != y;
436 case TCG_COND_LT:
437 return (int32_t)x < (int32_t)y;
438 case TCG_COND_GE:
439 return (int32_t)x >= (int32_t)y;
440 case TCG_COND_LE:
441 return (int32_t)x <= (int32_t)y;
442 case TCG_COND_GT:
443 return (int32_t)x > (int32_t)y;
444 case TCG_COND_LTU:
445 return x < y;
446 case TCG_COND_GEU:
447 return x >= y;
448 case TCG_COND_LEU:
449 return x <= y;
450 case TCG_COND_GTU:
451 return x > y;
452 default:
453 tcg_abort();
454 }
455}
456
457static bool do_constant_folding_cond_64(uint64_t x, uint64_t y, TCGCond c)
458{
459 switch (c) {
460 case TCG_COND_EQ:
461 return x == y;
462 case TCG_COND_NE:
463 return x != y;
464 case TCG_COND_LT:
465 return (int64_t)x < (int64_t)y;
466 case TCG_COND_GE:
467 return (int64_t)x >= (int64_t)y;
468 case TCG_COND_LE:
469 return (int64_t)x <= (int64_t)y;
470 case TCG_COND_GT:
471 return (int64_t)x > (int64_t)y;
472 case TCG_COND_LTU:
473 return x < y;
474 case TCG_COND_GEU:
475 return x >= y;
476 case TCG_COND_LEU:
477 return x <= y;
478 case TCG_COND_GTU:
479 return x > y;
480 default:
481 tcg_abort();
482 }
483}
484
485static bool do_constant_folding_cond_eq(TCGCond c)
486{
487 switch (c) {
488 case TCG_COND_GT:
489 case TCG_COND_LTU:
490 case TCG_COND_LT:
491 case TCG_COND_GTU:
492 case TCG_COND_NE:
493 return 0;
494 case TCG_COND_GE:
495 case TCG_COND_GEU:
496 case TCG_COND_LE:
497 case TCG_COND_LEU:
498 case TCG_COND_EQ:
499 return 1;
500 default:
501 tcg_abort();
502 }
503}
504
Aurelien Jarnob336ceb2012-09-18 19:37:00 +0200505/* Return 2 if the condition can't be simplified, and the result
506 of the condition (0 or 1) if it can */
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200507static TCGArg do_constant_folding_cond(TCGOpcode op, TCGArg x,
508 TCGArg y, TCGCond c)
509{
Richard Henderson54795542020-09-06 16:21:32 -0700510 uint64_t xv = arg_info(x)->val;
511 uint64_t yv = arg_info(y)->val;
512
Richard Henderson63490392017-06-20 13:43:15 -0700513 if (arg_is_const(x) && arg_is_const(y)) {
Richard Henderson170ba882017-11-22 09:07:11 +0100514 const TCGOpDef *def = &tcg_op_defs[op];
515 tcg_debug_assert(!(def->flags & TCG_OPF_VECTOR));
516 if (def->flags & TCG_OPF_64BIT) {
Richard Henderson63490392017-06-20 13:43:15 -0700517 return do_constant_folding_cond_64(xv, yv, c);
Richard Henderson170ba882017-11-22 09:07:11 +0100518 } else {
519 return do_constant_folding_cond_32(xv, yv, c);
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200520 }
Richard Henderson63490392017-06-20 13:43:15 -0700521 } else if (args_are_copies(x, y)) {
Richard Henderson9519da72012-10-02 11:32:26 -0700522 return do_constant_folding_cond_eq(c);
Richard Henderson63490392017-06-20 13:43:15 -0700523 } else if (arg_is_const(y) && yv == 0) {
Aurelien Jarnob336ceb2012-09-18 19:37:00 +0200524 switch (c) {
525 case TCG_COND_LTU:
526 return 0;
527 case TCG_COND_GEU:
528 return 1;
529 default:
530 return 2;
531 }
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200532 }
Alex Bennée550276a2016-09-30 22:30:55 +0100533 return 2;
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200534}
535
Richard Henderson6c4382f2012-10-02 11:32:27 -0700536/* Return 2 if the condition can't be simplified, and the result
537 of the condition (0 or 1) if it can */
538static TCGArg do_constant_folding_cond2(TCGArg *p1, TCGArg *p2, TCGCond c)
539{
540 TCGArg al = p1[0], ah = p1[1];
541 TCGArg bl = p2[0], bh = p2[1];
542
Richard Henderson63490392017-06-20 13:43:15 -0700543 if (arg_is_const(bl) && arg_is_const(bh)) {
544 tcg_target_ulong blv = arg_info(bl)->val;
545 tcg_target_ulong bhv = arg_info(bh)->val;
546 uint64_t b = deposit64(blv, 32, 32, bhv);
Richard Henderson6c4382f2012-10-02 11:32:27 -0700547
Richard Henderson63490392017-06-20 13:43:15 -0700548 if (arg_is_const(al) && arg_is_const(ah)) {
549 tcg_target_ulong alv = arg_info(al)->val;
550 tcg_target_ulong ahv = arg_info(ah)->val;
551 uint64_t a = deposit64(alv, 32, 32, ahv);
Richard Henderson6c4382f2012-10-02 11:32:27 -0700552 return do_constant_folding_cond_64(a, b, c);
553 }
554 if (b == 0) {
555 switch (c) {
556 case TCG_COND_LTU:
557 return 0;
558 case TCG_COND_GEU:
559 return 1;
560 default:
561 break;
562 }
563 }
564 }
Richard Henderson63490392017-06-20 13:43:15 -0700565 if (args_are_copies(al, bl) && args_are_copies(ah, bh)) {
Richard Henderson6c4382f2012-10-02 11:32:27 -0700566 return do_constant_folding_cond_eq(c);
567 }
568 return 2;
569}
570
Richard Henderson24c9ae42012-10-02 11:32:21 -0700571static bool swap_commutative(TCGArg dest, TCGArg *p1, TCGArg *p2)
572{
573 TCGArg a1 = *p1, a2 = *p2;
574 int sum = 0;
Richard Henderson63490392017-06-20 13:43:15 -0700575 sum += arg_is_const(a1);
576 sum -= arg_is_const(a2);
Richard Henderson24c9ae42012-10-02 11:32:21 -0700577
578 /* Prefer the constant in second argument, and then the form
579 op a, a, b, which is better handled on non-RISC hosts. */
580 if (sum > 0 || (sum == 0 && dest == a2)) {
581 *p1 = a2;
582 *p2 = a1;
583 return true;
584 }
585 return false;
586}
587
Richard Henderson0bfcb862012-10-02 11:32:23 -0700588static bool swap_commutative2(TCGArg *p1, TCGArg *p2)
589{
590 int sum = 0;
Richard Henderson63490392017-06-20 13:43:15 -0700591 sum += arg_is_const(p1[0]);
592 sum += arg_is_const(p1[1]);
593 sum -= arg_is_const(p2[0]);
594 sum -= arg_is_const(p2[1]);
Richard Henderson0bfcb862012-10-02 11:32:23 -0700595 if (sum > 0) {
596 TCGArg t;
597 t = p1[0], p1[0] = p2[0], p2[0] = t;
598 t = p1[1], p1[1] = p2[1], p2[1] = t;
599 return true;
600 }
601 return false;
602}
603
Richard Hendersone2577ea2021-08-24 08:00:48 -0700604static void init_arguments(OptContext *ctx, TCGOp *op, int nb_args)
605{
606 for (int i = 0; i < nb_args; i++) {
607 TCGTemp *ts = arg_temp(op->args[i]);
608 if (ts) {
609 init_ts_info(ctx, ts);
610 }
611 }
612}
613
Richard Henderson8774dde2021-08-24 08:04:47 -0700614static void copy_propagate(OptContext *ctx, TCGOp *op,
615 int nb_oargs, int nb_iargs)
616{
617 TCGContext *s = ctx->tcg;
618
619 for (int i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
620 TCGTemp *ts = arg_temp(op->args[i]);
621 if (ts && ts_is_copy(ts)) {
622 op->args[i] = temp_arg(find_better_copy(s, ts));
623 }
624 }
625}
626
Kirill Batuzov22613af2011-07-07 16:37:13 +0400627/* Propagate constants and copies, fold constant expressions. */
Aurelien Jarno36e60ef2015-06-04 21:53:27 +0200628void tcg_optimize(TCGContext *s)
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +0400629{
Richard Henderson8f17a972020-03-30 19:52:02 -0700630 int nb_temps, nb_globals, i;
Richard Hendersond0ed5152021-08-24 07:38:39 -0700631 TCGOp *op, *op_next;
Richard Hendersondc849882021-08-24 07:13:45 -0700632 OptContext ctx = { .tcg = s };
Richard Henderson5d8f5362012-09-21 10:13:38 -0700633
Kirill Batuzov22613af2011-07-07 16:37:13 +0400634 /* Array VALS has an element for each temp.
635 If this temp holds a constant then its value is kept in VALS' element.
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200636 If this temp is a copy of other ones then the other copies are
637 available through the doubly linked circular list. */
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +0400638
639 nb_temps = s->nb_temps;
640 nb_globals = s->nb_globals;
Richard Henderson8f17a972020-03-30 19:52:02 -0700641
Richard Henderson8f17a972020-03-30 19:52:02 -0700642 for (i = 0; i < nb_temps; ++i) {
643 s->temps[i].state_ptr = NULL;
644 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +0400645
Richard Henderson15fa08f2017-11-02 15:19:14 +0100646 QTAILQ_FOREACH_SAFE(op, &s->ops, link, op_next) {
Richard Hendersonb1fde412021-08-23 13:07:49 -0700647 uint64_t z_mask, partmask, affected, tmp;
Richard Henderson8f17a972020-03-30 19:52:02 -0700648 int nb_oargs, nb_iargs;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700649 TCGOpcode opc = op->opc;
650 const TCGOpDef *def = &tcg_op_defs[opc];
651
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200652 /* Count the arguments, and initialize the temps that are
653 going to be used */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700654 if (opc == INDEX_op_call) {
Richard Hendersoncd9090a2017-11-14 13:02:51 +0100655 nb_oargs = TCGOP_CALLO(op);
656 nb_iargs = TCGOP_CALLI(op);
Aurelien Jarno1ff8c542012-09-11 16:18:49 +0200657 } else {
Richard Hendersoncf066672014-03-22 20:06:52 -0700658 nb_oargs = def->nb_oargs;
659 nb_iargs = def->nb_iargs;
Richard Hendersoncf066672014-03-22 20:06:52 -0700660 }
Richard Hendersone2577ea2021-08-24 08:00:48 -0700661 init_arguments(&ctx, op, nb_oargs + nb_iargs);
Richard Henderson8774dde2021-08-24 08:04:47 -0700662 copy_propagate(&ctx, op, nb_oargs, nb_iargs);
Kirill Batuzov22613af2011-07-07 16:37:13 +0400663
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400664 /* For commutative operations make constant second argument */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700665 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +0100666 CASE_OP_32_64_VEC(add):
667 CASE_OP_32_64_VEC(mul):
668 CASE_OP_32_64_VEC(and):
669 CASE_OP_32_64_VEC(or):
670 CASE_OP_32_64_VEC(xor):
Richard Hendersoncb25c802011-08-17 14:11:47 -0700671 CASE_OP_32_64(eqv):
672 CASE_OP_32_64(nand):
673 CASE_OP_32_64(nor):
Richard Henderson03271522013-08-14 14:35:56 -0700674 CASE_OP_32_64(muluh):
675 CASE_OP_32_64(mulsh):
Richard Hendersonacd93702016-12-08 12:28:42 -0800676 swap_commutative(op->args[0], &op->args[1], &op->args[2]);
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400677 break;
Aurelien Jarno65a7cce2012-09-06 16:47:14 +0200678 CASE_OP_32_64(brcond):
Richard Hendersonacd93702016-12-08 12:28:42 -0800679 if (swap_commutative(-1, &op->args[0], &op->args[1])) {
680 op->args[2] = tcg_swap_cond(op->args[2]);
Aurelien Jarno65a7cce2012-09-06 16:47:14 +0200681 }
682 break;
683 CASE_OP_32_64(setcond):
Richard Hendersonacd93702016-12-08 12:28:42 -0800684 if (swap_commutative(op->args[0], &op->args[1], &op->args[2])) {
685 op->args[3] = tcg_swap_cond(op->args[3]);
Aurelien Jarno65a7cce2012-09-06 16:47:14 +0200686 }
687 break;
Richard Hendersonfa01a202012-09-21 10:13:37 -0700688 CASE_OP_32_64(movcond):
Richard Hendersonacd93702016-12-08 12:28:42 -0800689 if (swap_commutative(-1, &op->args[1], &op->args[2])) {
690 op->args[5] = tcg_swap_cond(op->args[5]);
Richard Hendersonfa01a202012-09-21 10:13:37 -0700691 }
Richard Henderson5d8f5362012-09-21 10:13:38 -0700692 /* For movcond, we canonicalize the "false" input reg to match
693 the destination reg so that the tcg backend can implement
694 a "move if true" operation. */
Richard Hendersonacd93702016-12-08 12:28:42 -0800695 if (swap_commutative(op->args[0], &op->args[4], &op->args[3])) {
696 op->args[5] = tcg_invert_cond(op->args[5]);
Richard Henderson5d8f5362012-09-21 10:13:38 -0700697 }
Richard Henderson1e484e62012-10-02 11:32:22 -0700698 break;
Richard Hendersond7156f72013-02-19 23:51:52 -0800699 CASE_OP_32_64(add2):
Richard Hendersonacd93702016-12-08 12:28:42 -0800700 swap_commutative(op->args[0], &op->args[2], &op->args[4]);
701 swap_commutative(op->args[1], &op->args[3], &op->args[5]);
Richard Henderson1e484e62012-10-02 11:32:22 -0700702 break;
Richard Hendersond7156f72013-02-19 23:51:52 -0800703 CASE_OP_32_64(mulu2):
Richard Henderson4d3203f2013-02-19 23:51:53 -0800704 CASE_OP_32_64(muls2):
Richard Hendersonacd93702016-12-08 12:28:42 -0800705 swap_commutative(op->args[0], &op->args[2], &op->args[3]);
Richard Henderson14149682012-10-02 11:32:30 -0700706 break;
Richard Henderson0bfcb862012-10-02 11:32:23 -0700707 case INDEX_op_brcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -0800708 if (swap_commutative2(&op->args[0], &op->args[2])) {
709 op->args[4] = tcg_swap_cond(op->args[4]);
Richard Henderson0bfcb862012-10-02 11:32:23 -0700710 }
711 break;
712 case INDEX_op_setcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -0800713 if (swap_commutative2(&op->args[1], &op->args[3])) {
714 op->args[5] = tcg_swap_cond(op->args[5]);
Richard Henderson0bfcb862012-10-02 11:32:23 -0700715 }
716 break;
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400717 default:
718 break;
719 }
720
Richard Henderson2d497542013-03-21 09:13:33 -0700721 /* Simplify expressions for "shift/rot r, 0, a => movi r, 0",
722 and "sub r, 0, a => neg r, a" case. */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700723 switch (opc) {
Aurelien Jarno01ee5282012-09-06 16:47:14 +0200724 CASE_OP_32_64(shl):
725 CASE_OP_32_64(shr):
726 CASE_OP_32_64(sar):
727 CASE_OP_32_64(rotl):
728 CASE_OP_32_64(rotr):
Richard Henderson63490392017-06-20 13:43:15 -0700729 if (arg_is_const(op->args[1])
730 && arg_info(op->args[1])->val == 0) {
Richard Hendersondc849882021-08-24 07:13:45 -0700731 tcg_opt_gen_movi(&ctx, op, op->args[0], 0);
Aurelien Jarno01ee5282012-09-06 16:47:14 +0200732 continue;
733 }
734 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100735 CASE_OP_32_64_VEC(sub):
Richard Henderson2d497542013-03-21 09:13:33 -0700736 {
737 TCGOpcode neg_op;
738 bool have_neg;
739
Richard Henderson63490392017-06-20 13:43:15 -0700740 if (arg_is_const(op->args[2])) {
Richard Henderson2d497542013-03-21 09:13:33 -0700741 /* Proceed with possible constant folding. */
742 break;
743 }
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700744 if (opc == INDEX_op_sub_i32) {
Richard Henderson2d497542013-03-21 09:13:33 -0700745 neg_op = INDEX_op_neg_i32;
746 have_neg = TCG_TARGET_HAS_neg_i32;
Richard Henderson170ba882017-11-22 09:07:11 +0100747 } else if (opc == INDEX_op_sub_i64) {
Richard Henderson2d497542013-03-21 09:13:33 -0700748 neg_op = INDEX_op_neg_i64;
749 have_neg = TCG_TARGET_HAS_neg_i64;
Richard Hendersonac383dde2019-04-20 00:27:24 +0000750 } else if (TCG_TARGET_HAS_neg_vec) {
751 TCGType type = TCGOP_VECL(op) + TCG_TYPE_V64;
752 unsigned vece = TCGOP_VECE(op);
Richard Henderson170ba882017-11-22 09:07:11 +0100753 neg_op = INDEX_op_neg_vec;
Richard Hendersonac383dde2019-04-20 00:27:24 +0000754 have_neg = tcg_can_emit_vec_op(neg_op, type, vece) > 0;
755 } else {
756 break;
Richard Henderson2d497542013-03-21 09:13:33 -0700757 }
758 if (!have_neg) {
759 break;
760 }
Richard Henderson63490392017-06-20 13:43:15 -0700761 if (arg_is_const(op->args[1])
762 && arg_info(op->args[1])->val == 0) {
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700763 op->opc = neg_op;
Richard Hendersonacd93702016-12-08 12:28:42 -0800764 reset_temp(op->args[0]);
765 op->args[1] = op->args[2];
Richard Henderson2d497542013-03-21 09:13:33 -0700766 continue;
767 }
768 }
769 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100770 CASE_OP_32_64_VEC(xor):
Richard Hendersone201b562014-01-28 13:15:38 -0800771 CASE_OP_32_64(nand):
Richard Henderson63490392017-06-20 13:43:15 -0700772 if (!arg_is_const(op->args[1])
773 && arg_is_const(op->args[2])
774 && arg_info(op->args[2])->val == -1) {
Richard Hendersone201b562014-01-28 13:15:38 -0800775 i = 1;
776 goto try_not;
777 }
778 break;
779 CASE_OP_32_64(nor):
Richard Henderson63490392017-06-20 13:43:15 -0700780 if (!arg_is_const(op->args[1])
781 && arg_is_const(op->args[2])
782 && arg_info(op->args[2])->val == 0) {
Richard Hendersone201b562014-01-28 13:15:38 -0800783 i = 1;
784 goto try_not;
785 }
786 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100787 CASE_OP_32_64_VEC(andc):
Richard Henderson63490392017-06-20 13:43:15 -0700788 if (!arg_is_const(op->args[2])
789 && arg_is_const(op->args[1])
790 && arg_info(op->args[1])->val == -1) {
Richard Hendersone201b562014-01-28 13:15:38 -0800791 i = 2;
792 goto try_not;
793 }
794 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100795 CASE_OP_32_64_VEC(orc):
Richard Hendersone201b562014-01-28 13:15:38 -0800796 CASE_OP_32_64(eqv):
Richard Henderson63490392017-06-20 13:43:15 -0700797 if (!arg_is_const(op->args[2])
798 && arg_is_const(op->args[1])
799 && arg_info(op->args[1])->val == 0) {
Richard Hendersone201b562014-01-28 13:15:38 -0800800 i = 2;
801 goto try_not;
802 }
803 break;
804 try_not:
805 {
806 TCGOpcode not_op;
807 bool have_not;
808
Richard Henderson170ba882017-11-22 09:07:11 +0100809 if (def->flags & TCG_OPF_VECTOR) {
810 not_op = INDEX_op_not_vec;
811 have_not = TCG_TARGET_HAS_not_vec;
812 } else if (def->flags & TCG_OPF_64BIT) {
Richard Hendersone201b562014-01-28 13:15:38 -0800813 not_op = INDEX_op_not_i64;
814 have_not = TCG_TARGET_HAS_not_i64;
815 } else {
816 not_op = INDEX_op_not_i32;
817 have_not = TCG_TARGET_HAS_not_i32;
818 }
819 if (!have_not) {
820 break;
821 }
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700822 op->opc = not_op;
Richard Hendersonacd93702016-12-08 12:28:42 -0800823 reset_temp(op->args[0]);
824 op->args[1] = op->args[i];
Richard Hendersone201b562014-01-28 13:15:38 -0800825 continue;
826 }
Aurelien Jarno01ee5282012-09-06 16:47:14 +0200827 default:
828 break;
829 }
830
Richard Henderson464a1442014-01-31 07:42:11 -0600831 /* Simplify expression for "op r, a, const => mov r, a" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700832 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +0100833 CASE_OP_32_64_VEC(add):
834 CASE_OP_32_64_VEC(sub):
835 CASE_OP_32_64_VEC(or):
836 CASE_OP_32_64_VEC(xor):
837 CASE_OP_32_64_VEC(andc):
Kirill Batuzov55c09752011-07-07 16:37:16 +0400838 CASE_OP_32_64(shl):
839 CASE_OP_32_64(shr):
840 CASE_OP_32_64(sar):
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700841 CASE_OP_32_64(rotl):
842 CASE_OP_32_64(rotr):
Richard Henderson63490392017-06-20 13:43:15 -0700843 if (!arg_is_const(op->args[1])
844 && arg_is_const(op->args[2])
845 && arg_info(op->args[2])->val == 0) {
Richard Hendersondc849882021-08-24 07:13:45 -0700846 tcg_opt_gen_mov(&ctx, op, op->args[0], op->args[1]);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200847 continue;
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400848 }
849 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100850 CASE_OP_32_64_VEC(and):
851 CASE_OP_32_64_VEC(orc):
Richard Henderson464a1442014-01-31 07:42:11 -0600852 CASE_OP_32_64(eqv):
Richard Henderson63490392017-06-20 13:43:15 -0700853 if (!arg_is_const(op->args[1])
854 && arg_is_const(op->args[2])
855 && arg_info(op->args[2])->val == -1) {
Richard Hendersondc849882021-08-24 07:13:45 -0700856 tcg_opt_gen_mov(&ctx, op, op->args[0], op->args[1]);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200857 continue;
Richard Henderson464a1442014-01-31 07:42:11 -0600858 }
859 break;
Aurelien Jarno56e49432012-09-06 16:47:13 +0200860 default:
861 break;
862 }
863
Aurelien Jarno30312442013-09-03 08:27:38 +0200864 /* Simplify using known-zero bits. Currently only ops with a single
865 output argument is supported. */
Richard Hendersonb1fde412021-08-23 13:07:49 -0700866 z_mask = -1;
Paolo Bonzini633f6502013-01-11 15:42:53 -0800867 affected = -1;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700868 switch (opc) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800869 CASE_OP_32_64(ext8s):
Richard Hendersonb1fde412021-08-23 13:07:49 -0700870 if ((arg_info(op->args[1])->z_mask & 0x80) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800871 break;
872 }
Thomas Huthd84568b2020-12-11 16:24:24 +0100873 QEMU_FALLTHROUGH;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800874 CASE_OP_32_64(ext8u):
Richard Hendersonb1fde412021-08-23 13:07:49 -0700875 z_mask = 0xff;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800876 goto and_const;
877 CASE_OP_32_64(ext16s):
Richard Hendersonb1fde412021-08-23 13:07:49 -0700878 if ((arg_info(op->args[1])->z_mask & 0x8000) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800879 break;
880 }
Thomas Huthd84568b2020-12-11 16:24:24 +0100881 QEMU_FALLTHROUGH;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800882 CASE_OP_32_64(ext16u):
Richard Hendersonb1fde412021-08-23 13:07:49 -0700883 z_mask = 0xffff;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800884 goto and_const;
885 case INDEX_op_ext32s_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -0700886 if ((arg_info(op->args[1])->z_mask & 0x80000000) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800887 break;
888 }
Thomas Huthd84568b2020-12-11 16:24:24 +0100889 QEMU_FALLTHROUGH;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800890 case INDEX_op_ext32u_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -0700891 z_mask = 0xffffffffU;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800892 goto and_const;
893
894 CASE_OP_32_64(and):
Richard Hendersonb1fde412021-08-23 13:07:49 -0700895 z_mask = arg_info(op->args[2])->z_mask;
Richard Henderson63490392017-06-20 13:43:15 -0700896 if (arg_is_const(op->args[2])) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800897 and_const:
Richard Hendersonb1fde412021-08-23 13:07:49 -0700898 affected = arg_info(op->args[1])->z_mask & ~z_mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800899 }
Richard Hendersonb1fde412021-08-23 13:07:49 -0700900 z_mask = arg_info(op->args[1])->z_mask & z_mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800901 break;
902
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200903 case INDEX_op_ext_i32_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -0700904 if ((arg_info(op->args[1])->z_mask & 0x80000000) != 0) {
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200905 break;
906 }
Thomas Huthd84568b2020-12-11 16:24:24 +0100907 QEMU_FALLTHROUGH;
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200908 case INDEX_op_extu_i32_i64:
909 /* We do not compute affected as it is a size changing op. */
Richard Hendersonb1fde412021-08-23 13:07:49 -0700910 z_mask = (uint32_t)arg_info(op->args[1])->z_mask;
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200911 break;
912
Richard Henderson23ec69ed2014-01-28 12:03:24 -0800913 CASE_OP_32_64(andc):
914 /* Known-zeros does not imply known-ones. Therefore unless
Richard Hendersonacd93702016-12-08 12:28:42 -0800915 op->args[2] is constant, we can't infer anything from it. */
Richard Henderson63490392017-06-20 13:43:15 -0700916 if (arg_is_const(op->args[2])) {
Richard Hendersonb1fde412021-08-23 13:07:49 -0700917 z_mask = ~arg_info(op->args[2])->z_mask;
Richard Henderson23ec69ed2014-01-28 12:03:24 -0800918 goto and_const;
919 }
Richard Henderson63490392017-06-20 13:43:15 -0700920 /* But we certainly know nothing outside args[1] may be set. */
Richard Hendersonb1fde412021-08-23 13:07:49 -0700921 z_mask = arg_info(op->args[1])->z_mask;
Richard Henderson23ec69ed2014-01-28 12:03:24 -0800922 break;
923
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200924 case INDEX_op_sar_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700925 if (arg_is_const(op->args[2])) {
926 tmp = arg_info(op->args[2])->val & 31;
Richard Hendersonb1fde412021-08-23 13:07:49 -0700927 z_mask = (int32_t)arg_info(op->args[1])->z_mask >> tmp;
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200928 }
929 break;
930 case INDEX_op_sar_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700931 if (arg_is_const(op->args[2])) {
932 tmp = arg_info(op->args[2])->val & 63;
Richard Hendersonb1fde412021-08-23 13:07:49 -0700933 z_mask = (int64_t)arg_info(op->args[1])->z_mask >> tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800934 }
935 break;
936
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200937 case INDEX_op_shr_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700938 if (arg_is_const(op->args[2])) {
939 tmp = arg_info(op->args[2])->val & 31;
Richard Hendersonb1fde412021-08-23 13:07:49 -0700940 z_mask = (uint32_t)arg_info(op->args[1])->z_mask >> tmp;
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200941 }
942 break;
943 case INDEX_op_shr_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700944 if (arg_is_const(op->args[2])) {
945 tmp = arg_info(op->args[2])->val & 63;
Richard Hendersonb1fde412021-08-23 13:07:49 -0700946 z_mask = (uint64_t)arg_info(op->args[1])->z_mask >> tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800947 }
948 break;
949
Richard Henderson609ad702015-07-24 07:16:00 -0700950 case INDEX_op_extrl_i64_i32:
Richard Hendersonb1fde412021-08-23 13:07:49 -0700951 z_mask = (uint32_t)arg_info(op->args[1])->z_mask;
Richard Henderson609ad702015-07-24 07:16:00 -0700952 break;
953 case INDEX_op_extrh_i64_i32:
Richard Hendersonb1fde412021-08-23 13:07:49 -0700954 z_mask = (uint64_t)arg_info(op->args[1])->z_mask >> 32;
Richard Henderson4bb7a412013-09-09 17:03:24 -0700955 break;
956
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800957 CASE_OP_32_64(shl):
Richard Henderson63490392017-06-20 13:43:15 -0700958 if (arg_is_const(op->args[2])) {
959 tmp = arg_info(op->args[2])->val & (TCG_TARGET_REG_BITS - 1);
Richard Hendersonb1fde412021-08-23 13:07:49 -0700960 z_mask = arg_info(op->args[1])->z_mask << tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800961 }
962 break;
963
964 CASE_OP_32_64(neg):
965 /* Set to 1 all bits to the left of the rightmost. */
Richard Hendersonb1fde412021-08-23 13:07:49 -0700966 z_mask = -(arg_info(op->args[1])->z_mask
967 & -arg_info(op->args[1])->z_mask);
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800968 break;
969
970 CASE_OP_32_64(deposit):
Richard Hendersonb1fde412021-08-23 13:07:49 -0700971 z_mask = deposit64(arg_info(op->args[1])->z_mask,
972 op->args[3], op->args[4],
973 arg_info(op->args[2])->z_mask);
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800974 break;
975
Richard Henderson7ec8bab2016-10-14 12:04:32 -0500976 CASE_OP_32_64(extract):
Richard Hendersonb1fde412021-08-23 13:07:49 -0700977 z_mask = extract64(arg_info(op->args[1])->z_mask,
978 op->args[2], op->args[3]);
Richard Hendersonacd93702016-12-08 12:28:42 -0800979 if (op->args[2] == 0) {
Richard Hendersonb1fde412021-08-23 13:07:49 -0700980 affected = arg_info(op->args[1])->z_mask & ~z_mask;
Richard Henderson7ec8bab2016-10-14 12:04:32 -0500981 }
982 break;
983 CASE_OP_32_64(sextract):
Richard Hendersonb1fde412021-08-23 13:07:49 -0700984 z_mask = sextract64(arg_info(op->args[1])->z_mask,
985 op->args[2], op->args[3]);
986 if (op->args[2] == 0 && (tcg_target_long)z_mask >= 0) {
987 affected = arg_info(op->args[1])->z_mask & ~z_mask;
Richard Henderson7ec8bab2016-10-14 12:04:32 -0500988 }
989 break;
990
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800991 CASE_OP_32_64(or):
992 CASE_OP_32_64(xor):
Richard Hendersonb1fde412021-08-23 13:07:49 -0700993 z_mask = arg_info(op->args[1])->z_mask
994 | arg_info(op->args[2])->z_mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800995 break;
996
Richard Henderson0e28d002016-11-16 09:23:28 +0100997 case INDEX_op_clz_i32:
998 case INDEX_op_ctz_i32:
Richard Hendersonb1fde412021-08-23 13:07:49 -0700999 z_mask = arg_info(op->args[2])->z_mask | 31;
Richard Henderson0e28d002016-11-16 09:23:28 +01001000 break;
1001
1002 case INDEX_op_clz_i64:
1003 case INDEX_op_ctz_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001004 z_mask = arg_info(op->args[2])->z_mask | 63;
Richard Henderson0e28d002016-11-16 09:23:28 +01001005 break;
1006
Richard Hendersona768e4e2016-11-21 11:13:39 +01001007 case INDEX_op_ctpop_i32:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001008 z_mask = 32 | 31;
Richard Hendersona768e4e2016-11-21 11:13:39 +01001009 break;
1010 case INDEX_op_ctpop_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001011 z_mask = 64 | 63;
Richard Hendersona768e4e2016-11-21 11:13:39 +01001012 break;
1013
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001014 CASE_OP_32_64(setcond):
Richard Hendersona7635512014-04-23 22:18:30 -07001015 case INDEX_op_setcond2_i32:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001016 z_mask = 1;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001017 break;
1018
1019 CASE_OP_32_64(movcond):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001020 z_mask = arg_info(op->args[3])->z_mask
1021 | arg_info(op->args[4])->z_mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001022 break;
1023
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001024 CASE_OP_32_64(ld8u):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001025 z_mask = 0xff;
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001026 break;
1027 CASE_OP_32_64(ld16u):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001028 z_mask = 0xffff;
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001029 break;
1030 case INDEX_op_ld32u_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001031 z_mask = 0xffffffffu;
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001032 break;
1033
1034 CASE_OP_32_64(qemu_ld):
1035 {
Richard Henderson9002ffc2021-07-25 12:06:49 -10001036 MemOpIdx oi = op->args[nb_oargs + nb_iargs];
Tony Nguyen14776ab2019-08-24 04:10:58 +10001037 MemOp mop = get_memop(oi);
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001038 if (!(mop & MO_SIGN)) {
Richard Hendersonb1fde412021-08-23 13:07:49 -07001039 z_mask = (2ULL << ((8 << (mop & MO_SIZE)) - 1)) - 1;
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001040 }
1041 }
1042 break;
1043
Richard Henderson0b76ff82021-06-13 13:04:00 -07001044 CASE_OP_32_64(bswap16):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001045 z_mask = arg_info(op->args[1])->z_mask;
1046 if (z_mask <= 0xffff) {
Richard Henderson0b76ff82021-06-13 13:04:00 -07001047 op->args[2] |= TCG_BSWAP_IZ;
1048 }
Richard Hendersonb1fde412021-08-23 13:07:49 -07001049 z_mask = bswap16(z_mask);
Richard Henderson0b76ff82021-06-13 13:04:00 -07001050 switch (op->args[2] & (TCG_BSWAP_OZ | TCG_BSWAP_OS)) {
1051 case TCG_BSWAP_OZ:
1052 break;
1053 case TCG_BSWAP_OS:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001054 z_mask = (int16_t)z_mask;
Richard Henderson0b76ff82021-06-13 13:04:00 -07001055 break;
1056 default: /* undefined high bits */
Richard Hendersonb1fde412021-08-23 13:07:49 -07001057 z_mask |= MAKE_64BIT_MASK(16, 48);
Richard Henderson0b76ff82021-06-13 13:04:00 -07001058 break;
1059 }
1060 break;
1061
1062 case INDEX_op_bswap32_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001063 z_mask = arg_info(op->args[1])->z_mask;
1064 if (z_mask <= 0xffffffffu) {
Richard Henderson0b76ff82021-06-13 13:04:00 -07001065 op->args[2] |= TCG_BSWAP_IZ;
1066 }
Richard Hendersonb1fde412021-08-23 13:07:49 -07001067 z_mask = bswap32(z_mask);
Richard Henderson0b76ff82021-06-13 13:04:00 -07001068 switch (op->args[2] & (TCG_BSWAP_OZ | TCG_BSWAP_OS)) {
1069 case TCG_BSWAP_OZ:
1070 break;
1071 case TCG_BSWAP_OS:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001072 z_mask = (int32_t)z_mask;
Richard Henderson0b76ff82021-06-13 13:04:00 -07001073 break;
1074 default: /* undefined high bits */
Richard Hendersonb1fde412021-08-23 13:07:49 -07001075 z_mask |= MAKE_64BIT_MASK(32, 32);
Richard Henderson0b76ff82021-06-13 13:04:00 -07001076 break;
1077 }
1078 break;
1079
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001080 default:
1081 break;
1082 }
1083
Richard Hendersonbc8d6882014-06-08 18:24:14 -07001084 /* 32-bit ops generate 32-bit results. For the result is zero test
1085 below, we can ignore high bits, but for further optimizations we
1086 need to record that the high bits contain garbage. */
Richard Hendersonb1fde412021-08-23 13:07:49 -07001087 partmask = z_mask;
Richard Hendersonbc8d6882014-06-08 18:24:14 -07001088 if (!(def->flags & TCG_OPF_64BIT)) {
Richard Hendersonb1fde412021-08-23 13:07:49 -07001089 z_mask |= ~(tcg_target_ulong)0xffffffffu;
Richard Henderson24666ba2014-05-22 11:14:10 -07001090 partmask &= 0xffffffffu;
1091 affected &= 0xffffffffu;
Aurelien Jarnof096dc92013-09-03 08:27:38 +02001092 }
1093
Richard Henderson24666ba2014-05-22 11:14:10 -07001094 if (partmask == 0) {
Aurelien Jarnoeabb7b92016-04-21 10:48:49 +02001095 tcg_debug_assert(nb_oargs == 1);
Richard Hendersondc849882021-08-24 07:13:45 -07001096 tcg_opt_gen_movi(&ctx, op, op->args[0], 0);
Paolo Bonzini633f6502013-01-11 15:42:53 -08001097 continue;
1098 }
1099 if (affected == 0) {
Aurelien Jarnoeabb7b92016-04-21 10:48:49 +02001100 tcg_debug_assert(nb_oargs == 1);
Richard Hendersondc849882021-08-24 07:13:45 -07001101 tcg_opt_gen_mov(&ctx, op, op->args[0], op->args[1]);
Paolo Bonzini633f6502013-01-11 15:42:53 -08001102 continue;
1103 }
1104
Aurelien Jarno56e49432012-09-06 16:47:13 +02001105 /* Simplify expression for "op r, a, 0 => movi r, 0" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001106 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001107 CASE_OP_32_64_VEC(and):
1108 CASE_OP_32_64_VEC(mul):
Richard Henderson03271522013-08-14 14:35:56 -07001109 CASE_OP_32_64(muluh):
1110 CASE_OP_32_64(mulsh):
Richard Henderson63490392017-06-20 13:43:15 -07001111 if (arg_is_const(op->args[2])
1112 && arg_info(op->args[2])->val == 0) {
Richard Hendersondc849882021-08-24 07:13:45 -07001113 tcg_opt_gen_movi(&ctx, op, op->args[0], 0);
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001114 continue;
1115 }
1116 break;
Aurelien Jarno56e49432012-09-06 16:47:13 +02001117 default:
1118 break;
1119 }
1120
1121 /* Simplify expression for "op r, a, a => mov r, a" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001122 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001123 CASE_OP_32_64_VEC(or):
1124 CASE_OP_32_64_VEC(and):
Richard Henderson63490392017-06-20 13:43:15 -07001125 if (args_are_copies(op->args[1], op->args[2])) {
Richard Hendersondc849882021-08-24 07:13:45 -07001126 tcg_opt_gen_mov(&ctx, op, op->args[0], op->args[1]);
Kirill Batuzov9a810902011-07-07 16:37:15 +04001127 continue;
1128 }
1129 break;
Blue Swirlfe0de7a2011-07-30 19:18:32 +00001130 default:
1131 break;
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001132 }
1133
Aurelien Jarno3c941932012-09-18 19:12:36 +02001134 /* Simplify expression for "op r, a, a => movi r, 0" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001135 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001136 CASE_OP_32_64_VEC(andc):
1137 CASE_OP_32_64_VEC(sub):
1138 CASE_OP_32_64_VEC(xor):
Richard Henderson63490392017-06-20 13:43:15 -07001139 if (args_are_copies(op->args[1], op->args[2])) {
Richard Hendersondc849882021-08-24 07:13:45 -07001140 tcg_opt_gen_movi(&ctx, op, op->args[0], 0);
Aurelien Jarno3c941932012-09-18 19:12:36 +02001141 continue;
1142 }
1143 break;
1144 default:
1145 break;
1146 }
1147
Kirill Batuzov22613af2011-07-07 16:37:13 +04001148 /* Propagate constants through copy operations and do constant
1149 folding. Constants will be substituted to arguments by register
1150 allocator where needed and possible. Also detect copies. */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001151 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001152 CASE_OP_32_64_VEC(mov):
Richard Hendersondc849882021-08-24 07:13:45 -07001153 tcg_opt_gen_mov(&ctx, op, op->args[0], op->args[1]);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001154 continue;
Richard Henderson6e14e912012-10-02 11:32:24 -07001155
Richard Henderson170ba882017-11-22 09:07:11 +01001156 case INDEX_op_dup_vec:
1157 if (arg_is_const(op->args[1])) {
1158 tmp = arg_info(op->args[1])->val;
1159 tmp = dup_const(TCGOP_VECE(op), tmp);
Richard Hendersondc849882021-08-24 07:13:45 -07001160 tcg_opt_gen_movi(&ctx, op, op->args[0], tmp);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001161 continue;
Richard Henderson170ba882017-11-22 09:07:11 +01001162 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001163 break;
Richard Henderson170ba882017-11-22 09:07:11 +01001164
Richard Henderson1dc4fe72020-09-05 17:03:35 -07001165 case INDEX_op_dup2_vec:
1166 assert(TCG_TARGET_REG_BITS == 32);
1167 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
Richard Hendersondc849882021-08-24 07:13:45 -07001168 tcg_opt_gen_movi(&ctx, op, op->args[0],
Richard Henderson0b4286d2020-09-06 17:33:18 -07001169 deposit64(arg_info(op->args[1])->val, 32, 32,
1170 arg_info(op->args[2])->val));
Richard Hendersonb10f3832021-08-23 22:30:17 -07001171 continue;
Richard Henderson1dc4fe72020-09-05 17:03:35 -07001172 } else if (args_are_copies(op->args[1], op->args[2])) {
1173 op->opc = INDEX_op_dup_vec;
1174 TCGOP_VECE(op) = MO_32;
1175 nb_iargs = 1;
1176 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001177 break;
Richard Henderson1dc4fe72020-09-05 17:03:35 -07001178
Kirill Batuzova640f032011-07-07 16:37:17 +04001179 CASE_OP_32_64(not):
Richard Hendersoncb25c802011-08-17 14:11:47 -07001180 CASE_OP_32_64(neg):
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001181 CASE_OP_32_64(ext8s):
1182 CASE_OP_32_64(ext8u):
1183 CASE_OP_32_64(ext16s):
1184 CASE_OP_32_64(ext16u):
Richard Hendersona768e4e2016-11-21 11:13:39 +01001185 CASE_OP_32_64(ctpop):
Kirill Batuzova640f032011-07-07 16:37:17 +04001186 case INDEX_op_ext32s_i64:
1187 case INDEX_op_ext32u_i64:
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +02001188 case INDEX_op_ext_i32_i64:
1189 case INDEX_op_extu_i32_i64:
Richard Henderson609ad702015-07-24 07:16:00 -07001190 case INDEX_op_extrl_i64_i32:
1191 case INDEX_op_extrh_i64_i32:
Richard Henderson63490392017-06-20 13:43:15 -07001192 if (arg_is_const(op->args[1])) {
1193 tmp = do_constant_folding(opc, arg_info(op->args[1])->val, 0);
Richard Hendersondc849882021-08-24 07:13:45 -07001194 tcg_opt_gen_movi(&ctx, op, op->args[0], tmp);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001195 continue;
Kirill Batuzova640f032011-07-07 16:37:17 +04001196 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001197 break;
Richard Henderson6e14e912012-10-02 11:32:24 -07001198
Richard Henderson0b76ff82021-06-13 13:04:00 -07001199 CASE_OP_32_64(bswap16):
1200 CASE_OP_32_64(bswap32):
1201 case INDEX_op_bswap64_i64:
1202 if (arg_is_const(op->args[1])) {
1203 tmp = do_constant_folding(opc, arg_info(op->args[1])->val,
1204 op->args[2]);
Richard Hendersondc849882021-08-24 07:13:45 -07001205 tcg_opt_gen_movi(&ctx, op, op->args[0], tmp);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001206 continue;
Richard Henderson0b76ff82021-06-13 13:04:00 -07001207 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001208 break;
Richard Henderson0b76ff82021-06-13 13:04:00 -07001209
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001210 CASE_OP_32_64(add):
1211 CASE_OP_32_64(sub):
1212 CASE_OP_32_64(mul):
Kirill Batuzov9a810902011-07-07 16:37:15 +04001213 CASE_OP_32_64(or):
1214 CASE_OP_32_64(and):
1215 CASE_OP_32_64(xor):
Kirill Batuzov55c09752011-07-07 16:37:16 +04001216 CASE_OP_32_64(shl):
1217 CASE_OP_32_64(shr):
1218 CASE_OP_32_64(sar):
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001219 CASE_OP_32_64(rotl):
1220 CASE_OP_32_64(rotr):
Richard Hendersoncb25c802011-08-17 14:11:47 -07001221 CASE_OP_32_64(andc):
1222 CASE_OP_32_64(orc):
1223 CASE_OP_32_64(eqv):
1224 CASE_OP_32_64(nand):
1225 CASE_OP_32_64(nor):
Richard Henderson03271522013-08-14 14:35:56 -07001226 CASE_OP_32_64(muluh):
1227 CASE_OP_32_64(mulsh):
Richard Henderson01547f72013-08-14 15:22:46 -07001228 CASE_OP_32_64(div):
1229 CASE_OP_32_64(divu):
1230 CASE_OP_32_64(rem):
1231 CASE_OP_32_64(remu):
Richard Henderson63490392017-06-20 13:43:15 -07001232 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
1233 tmp = do_constant_folding(opc, arg_info(op->args[1])->val,
1234 arg_info(op->args[2])->val);
Richard Hendersondc849882021-08-24 07:13:45 -07001235 tcg_opt_gen_movi(&ctx, op, op->args[0], tmp);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001236 continue;
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001237 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001238 break;
Richard Henderson6e14e912012-10-02 11:32:24 -07001239
Richard Henderson0e28d002016-11-16 09:23:28 +01001240 CASE_OP_32_64(clz):
1241 CASE_OP_32_64(ctz):
Richard Henderson63490392017-06-20 13:43:15 -07001242 if (arg_is_const(op->args[1])) {
1243 TCGArg v = arg_info(op->args[1])->val;
Richard Henderson0e28d002016-11-16 09:23:28 +01001244 if (v != 0) {
1245 tmp = do_constant_folding(opc, v, 0);
Richard Hendersondc849882021-08-24 07:13:45 -07001246 tcg_opt_gen_movi(&ctx, op, op->args[0], tmp);
Richard Henderson0e28d002016-11-16 09:23:28 +01001247 } else {
Richard Hendersondc849882021-08-24 07:13:45 -07001248 tcg_opt_gen_mov(&ctx, op, op->args[0], op->args[2]);
Richard Henderson0e28d002016-11-16 09:23:28 +01001249 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001250 continue;
Richard Henderson0e28d002016-11-16 09:23:28 +01001251 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001252 break;
Richard Henderson0e28d002016-11-16 09:23:28 +01001253
Aurelien Jarno7ef55fc2012-09-21 11:07:29 +02001254 CASE_OP_32_64(deposit):
Richard Henderson63490392017-06-20 13:43:15 -07001255 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
1256 tmp = deposit64(arg_info(op->args[1])->val,
1257 op->args[3], op->args[4],
1258 arg_info(op->args[2])->val);
Richard Hendersondc849882021-08-24 07:13:45 -07001259 tcg_opt_gen_movi(&ctx, op, op->args[0], tmp);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001260 continue;
Aurelien Jarno7ef55fc2012-09-21 11:07:29 +02001261 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001262 break;
Richard Henderson6e14e912012-10-02 11:32:24 -07001263
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001264 CASE_OP_32_64(extract):
Richard Henderson63490392017-06-20 13:43:15 -07001265 if (arg_is_const(op->args[1])) {
1266 tmp = extract64(arg_info(op->args[1])->val,
Richard Hendersonacd93702016-12-08 12:28:42 -08001267 op->args[2], op->args[3]);
Richard Hendersondc849882021-08-24 07:13:45 -07001268 tcg_opt_gen_movi(&ctx, op, op->args[0], tmp);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001269 continue;
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001270 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001271 break;
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001272
1273 CASE_OP_32_64(sextract):
Richard Henderson63490392017-06-20 13:43:15 -07001274 if (arg_is_const(op->args[1])) {
1275 tmp = sextract64(arg_info(op->args[1])->val,
Richard Hendersonacd93702016-12-08 12:28:42 -08001276 op->args[2], op->args[3]);
Richard Hendersondc849882021-08-24 07:13:45 -07001277 tcg_opt_gen_movi(&ctx, op, op->args[0], tmp);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001278 continue;
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001279 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001280 break;
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001281
Richard Hendersonfce12962019-02-25 10:29:25 -08001282 CASE_OP_32_64(extract2):
1283 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
Richard Henderson54795542020-09-06 16:21:32 -07001284 uint64_t v1 = arg_info(op->args[1])->val;
1285 uint64_t v2 = arg_info(op->args[2])->val;
1286 int shr = op->args[3];
Richard Hendersonfce12962019-02-25 10:29:25 -08001287
1288 if (opc == INDEX_op_extract2_i64) {
Richard Henderson54795542020-09-06 16:21:32 -07001289 tmp = (v1 >> shr) | (v2 << (64 - shr));
Richard Hendersonfce12962019-02-25 10:29:25 -08001290 } else {
Richard Henderson54795542020-09-06 16:21:32 -07001291 tmp = (int32_t)(((uint32_t)v1 >> shr) |
1292 ((uint32_t)v2 << (32 - shr)));
Richard Hendersonfce12962019-02-25 10:29:25 -08001293 }
Richard Hendersondc849882021-08-24 07:13:45 -07001294 tcg_opt_gen_movi(&ctx, op, op->args[0], tmp);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001295 continue;
Richard Hendersonfce12962019-02-25 10:29:25 -08001296 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001297 break;
Richard Hendersonfce12962019-02-25 10:29:25 -08001298
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +02001299 CASE_OP_32_64(setcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001300 tmp = do_constant_folding_cond(opc, op->args[1],
1301 op->args[2], op->args[3]);
Aurelien Jarnob336ceb2012-09-18 19:37:00 +02001302 if (tmp != 2) {
Richard Hendersondc849882021-08-24 07:13:45 -07001303 tcg_opt_gen_movi(&ctx, op, op->args[0], tmp);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001304 continue;
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +02001305 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001306 break;
Richard Henderson6e14e912012-10-02 11:32:24 -07001307
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001308 CASE_OP_32_64(brcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001309 tmp = do_constant_folding_cond(opc, op->args[0],
1310 op->args[1], op->args[2]);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001311 switch (tmp) {
1312 case 0:
1313 tcg_op_remove(s, op);
1314 continue;
1315 case 1:
1316 memset(&ctx.temps_used, 0, sizeof(ctx.temps_used));
1317 op->opc = opc = INDEX_op_br;
1318 op->args[0] = op->args[3];
Richard Henderson6e14e912012-10-02 11:32:24 -07001319 break;
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001320 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001321 break;
Richard Henderson6e14e912012-10-02 11:32:24 -07001322
Richard Hendersonfa01a202012-09-21 10:13:37 -07001323 CASE_OP_32_64(movcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001324 tmp = do_constant_folding_cond(opc, op->args[1],
1325 op->args[2], op->args[5]);
Aurelien Jarnob336ceb2012-09-18 19:37:00 +02001326 if (tmp != 2) {
Richard Hendersondc849882021-08-24 07:13:45 -07001327 tcg_opt_gen_mov(&ctx, op, op->args[0], op->args[4-tmp]);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001328 continue;
Richard Hendersonfa01a202012-09-21 10:13:37 -07001329 }
Richard Henderson63490392017-06-20 13:43:15 -07001330 if (arg_is_const(op->args[3]) && arg_is_const(op->args[4])) {
Richard Henderson54795542020-09-06 16:21:32 -07001331 uint64_t tv = arg_info(op->args[3])->val;
1332 uint64_t fv = arg_info(op->args[4])->val;
Richard Hendersonacd93702016-12-08 12:28:42 -08001333 TCGCond cond = op->args[5];
Richard Henderson54795542020-09-06 16:21:32 -07001334
Richard Henderson333b21b2016-10-23 20:44:32 -07001335 if (fv == 1 && tv == 0) {
1336 cond = tcg_invert_cond(cond);
1337 } else if (!(tv == 1 && fv == 0)) {
Richard Hendersonb10f3832021-08-23 22:30:17 -07001338 break;
Richard Henderson333b21b2016-10-23 20:44:32 -07001339 }
Richard Hendersonacd93702016-12-08 12:28:42 -08001340 op->args[3] = cond;
Richard Henderson333b21b2016-10-23 20:44:32 -07001341 op->opc = opc = (opc == INDEX_op_movcond_i32
1342 ? INDEX_op_setcond_i32
1343 : INDEX_op_setcond_i64);
1344 nb_iargs = 2;
1345 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001346 break;
Richard Henderson6e14e912012-10-02 11:32:24 -07001347
Richard Henderson212c3282012-10-02 11:32:28 -07001348 case INDEX_op_add2_i32:
1349 case INDEX_op_sub2_i32:
Richard Henderson63490392017-06-20 13:43:15 -07001350 if (arg_is_const(op->args[2]) && arg_is_const(op->args[3])
1351 && arg_is_const(op->args[4]) && arg_is_const(op->args[5])) {
1352 uint32_t al = arg_info(op->args[2])->val;
1353 uint32_t ah = arg_info(op->args[3])->val;
1354 uint32_t bl = arg_info(op->args[4])->val;
1355 uint32_t bh = arg_info(op->args[5])->val;
Richard Henderson212c3282012-10-02 11:32:28 -07001356 uint64_t a = ((uint64_t)ah << 32) | al;
1357 uint64_t b = ((uint64_t)bh << 32) | bl;
1358 TCGArg rl, rh;
Richard Henderson8fe35e02020-03-30 20:42:43 -07001359 TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_mov_i32);
Richard Henderson212c3282012-10-02 11:32:28 -07001360
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001361 if (opc == INDEX_op_add2_i32) {
Richard Henderson212c3282012-10-02 11:32:28 -07001362 a += b;
1363 } else {
1364 a -= b;
1365 }
1366
Richard Hendersonacd93702016-12-08 12:28:42 -08001367 rl = op->args[0];
1368 rh = op->args[1];
Richard Hendersondc849882021-08-24 07:13:45 -07001369 tcg_opt_gen_movi(&ctx, op, rl, (int32_t)a);
1370 tcg_opt_gen_movi(&ctx, op2, rh, (int32_t)(a >> 32));
Richard Hendersonb10f3832021-08-23 22:30:17 -07001371 continue;
Richard Henderson212c3282012-10-02 11:32:28 -07001372 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001373 break;
Richard Henderson212c3282012-10-02 11:32:28 -07001374
Richard Henderson14149682012-10-02 11:32:30 -07001375 case INDEX_op_mulu2_i32:
Richard Henderson63490392017-06-20 13:43:15 -07001376 if (arg_is_const(op->args[2]) && arg_is_const(op->args[3])) {
1377 uint32_t a = arg_info(op->args[2])->val;
1378 uint32_t b = arg_info(op->args[3])->val;
Richard Henderson14149682012-10-02 11:32:30 -07001379 uint64_t r = (uint64_t)a * b;
1380 TCGArg rl, rh;
Richard Henderson8fe35e02020-03-30 20:42:43 -07001381 TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_mov_i32);
Richard Henderson14149682012-10-02 11:32:30 -07001382
Richard Hendersonacd93702016-12-08 12:28:42 -08001383 rl = op->args[0];
1384 rh = op->args[1];
Richard Hendersondc849882021-08-24 07:13:45 -07001385 tcg_opt_gen_movi(&ctx, op, rl, (int32_t)r);
1386 tcg_opt_gen_movi(&ctx, op2, rh, (int32_t)(r >> 32));
Richard Hendersonb10f3832021-08-23 22:30:17 -07001387 continue;
Richard Henderson14149682012-10-02 11:32:30 -07001388 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001389 break;
Richard Henderson14149682012-10-02 11:32:30 -07001390
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001391 case INDEX_op_brcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -08001392 tmp = do_constant_folding_cond2(&op->args[0], &op->args[2],
1393 op->args[4]);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001394 if (tmp == 0) {
Richard Hendersona7635512014-04-23 22:18:30 -07001395 do_brcond_false:
Richard Hendersonb10f3832021-08-23 22:30:17 -07001396 tcg_op_remove(s, op);
1397 continue;
1398 }
1399 if (tmp == 1) {
1400 do_brcond_true:
1401 op->opc = opc = INDEX_op_br;
1402 op->args[0] = op->args[5];
1403 break;
1404 }
1405 if ((op->args[4] == TCG_COND_LT || op->args[4] == TCG_COND_GE)
1406 && arg_is_const(op->args[2])
1407 && arg_info(op->args[2])->val == 0
1408 && arg_is_const(op->args[3])
1409 && arg_info(op->args[3])->val == 0) {
Richard Henderson6c4382f2012-10-02 11:32:27 -07001410 /* Simplify LT/GE comparisons vs zero to a single compare
1411 vs the high word of the input. */
Richard Hendersona7635512014-04-23 22:18:30 -07001412 do_brcond_high:
Richard Hendersonb10f3832021-08-23 22:30:17 -07001413 op->opc = opc = INDEX_op_brcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001414 op->args[0] = op->args[1];
1415 op->args[1] = op->args[3];
1416 op->args[2] = op->args[4];
1417 op->args[3] = op->args[5];
Richard Hendersonb10f3832021-08-23 22:30:17 -07001418 break;
1419 }
1420 if (op->args[4] == TCG_COND_EQ) {
Richard Hendersona7635512014-04-23 22:18:30 -07001421 /* Simplify EQ comparisons where one of the pairs
1422 can be simplified. */
1423 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001424 op->args[0], op->args[2],
1425 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001426 if (tmp == 0) {
1427 goto do_brcond_false;
1428 } else if (tmp == 1) {
1429 goto do_brcond_high;
1430 }
1431 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001432 op->args[1], op->args[3],
1433 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001434 if (tmp == 0) {
1435 goto do_brcond_false;
1436 } else if (tmp != 1) {
Richard Hendersonb10f3832021-08-23 22:30:17 -07001437 break;
Richard Hendersona7635512014-04-23 22:18:30 -07001438 }
1439 do_brcond_low:
Richard Henderson3b3f8472021-08-23 22:06:31 -07001440 memset(&ctx.temps_used, 0, sizeof(ctx.temps_used));
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001441 op->opc = INDEX_op_brcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001442 op->args[1] = op->args[2];
1443 op->args[2] = op->args[4];
1444 op->args[3] = op->args[5];
Richard Hendersonb10f3832021-08-23 22:30:17 -07001445 break;
1446 }
1447 if (op->args[4] == TCG_COND_NE) {
Richard Hendersona7635512014-04-23 22:18:30 -07001448 /* Simplify NE comparisons where one of the pairs
1449 can be simplified. */
1450 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001451 op->args[0], op->args[2],
1452 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001453 if (tmp == 0) {
1454 goto do_brcond_high;
1455 } else if (tmp == 1) {
1456 goto do_brcond_true;
1457 }
1458 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001459 op->args[1], op->args[3],
1460 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001461 if (tmp == 0) {
1462 goto do_brcond_low;
1463 } else if (tmp == 1) {
1464 goto do_brcond_true;
1465 }
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001466 }
Richard Henderson6c4382f2012-10-02 11:32:27 -07001467 break;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001468
1469 case INDEX_op_setcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -08001470 tmp = do_constant_folding_cond2(&op->args[1], &op->args[3],
1471 op->args[5]);
Richard Henderson6c4382f2012-10-02 11:32:27 -07001472 if (tmp != 2) {
Richard Hendersona7635512014-04-23 22:18:30 -07001473 do_setcond_const:
Richard Hendersondc849882021-08-24 07:13:45 -07001474 tcg_opt_gen_movi(&ctx, op, op->args[0], tmp);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001475 continue;
1476 }
1477 if ((op->args[5] == TCG_COND_LT || op->args[5] == TCG_COND_GE)
1478 && arg_is_const(op->args[3])
1479 && arg_info(op->args[3])->val == 0
1480 && arg_is_const(op->args[4])
1481 && arg_info(op->args[4])->val == 0) {
Richard Henderson6c4382f2012-10-02 11:32:27 -07001482 /* Simplify LT/GE comparisons vs zero to a single compare
1483 vs the high word of the input. */
Richard Hendersona7635512014-04-23 22:18:30 -07001484 do_setcond_high:
Richard Hendersonacd93702016-12-08 12:28:42 -08001485 reset_temp(op->args[0]);
Richard Hendersonb1fde412021-08-23 13:07:49 -07001486 arg_info(op->args[0])->z_mask = 1;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001487 op->opc = INDEX_op_setcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001488 op->args[1] = op->args[2];
1489 op->args[2] = op->args[4];
1490 op->args[3] = op->args[5];
Richard Hendersonb10f3832021-08-23 22:30:17 -07001491 break;
1492 }
1493 if (op->args[5] == TCG_COND_EQ) {
Richard Hendersona7635512014-04-23 22:18:30 -07001494 /* Simplify EQ comparisons where one of the pairs
1495 can be simplified. */
1496 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001497 op->args[1], op->args[3],
1498 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001499 if (tmp == 0) {
1500 goto do_setcond_const;
1501 } else if (tmp == 1) {
1502 goto do_setcond_high;
1503 }
1504 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001505 op->args[2], op->args[4],
1506 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001507 if (tmp == 0) {
1508 goto do_setcond_high;
1509 } else if (tmp != 1) {
Richard Hendersonb10f3832021-08-23 22:30:17 -07001510 break;
Richard Hendersona7635512014-04-23 22:18:30 -07001511 }
1512 do_setcond_low:
Richard Hendersonacd93702016-12-08 12:28:42 -08001513 reset_temp(op->args[0]);
Richard Hendersonb1fde412021-08-23 13:07:49 -07001514 arg_info(op->args[0])->z_mask = 1;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001515 op->opc = INDEX_op_setcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001516 op->args[2] = op->args[3];
1517 op->args[3] = op->args[5];
Richard Hendersonb10f3832021-08-23 22:30:17 -07001518 break;
1519 }
1520 if (op->args[5] == TCG_COND_NE) {
Richard Hendersona7635512014-04-23 22:18:30 -07001521 /* Simplify NE comparisons where one of the pairs
1522 can be simplified. */
1523 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001524 op->args[1], op->args[3],
1525 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001526 if (tmp == 0) {
1527 goto do_setcond_high;
1528 } else if (tmp == 1) {
1529 goto do_setcond_const;
1530 }
1531 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001532 op->args[2], op->args[4],
1533 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001534 if (tmp == 0) {
1535 goto do_setcond_low;
1536 } else if (tmp == 1) {
1537 goto do_setcond_const;
1538 }
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001539 }
Richard Henderson6c4382f2012-10-02 11:32:27 -07001540 break;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001541
Richard Hendersonb10f3832021-08-23 22:30:17 -07001542 default:
1543 break;
1544 }
1545
1546 /* Some of the folding above can change opc. */
1547 opc = op->opc;
1548 def = &tcg_op_defs[opc];
1549 if (def->flags & TCG_OPF_BB_END) {
1550 memset(&ctx.temps_used, 0, sizeof(ctx.temps_used));
1551 } else {
1552 if (opc == INDEX_op_call &&
1553 !(tcg_call_flags(op)
Richard Hendersoncf066672014-03-22 20:06:52 -07001554 & (TCG_CALL_NO_READ_GLOBALS | TCG_CALL_NO_WRITE_GLOBALS))) {
Kirill Batuzov22613af2011-07-07 16:37:13 +04001555 for (i = 0; i < nb_globals; i++) {
Richard Henderson3b3f8472021-08-23 22:06:31 -07001556 if (test_bit(i, ctx.temps_used.l)) {
Richard Henderson63490392017-06-20 13:43:15 -07001557 reset_ts(&s->temps[i]);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +02001558 }
Kirill Batuzov22613af2011-07-07 16:37:13 +04001559 }
1560 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001561
Richard Hendersonb10f3832021-08-23 22:30:17 -07001562 for (i = 0; i < nb_oargs; i++) {
1563 reset_temp(op->args[i]);
1564 /* Save the corresponding known-zero bits mask for the
1565 first output argument (only one supported so far). */
1566 if (i == 0) {
1567 arg_info(op->args[i])->z_mask = z_mask;
Aurelien Jarnoa2550662012-09-19 21:40:30 +02001568 }
Kirill Batuzov22613af2011-07-07 16:37:13 +04001569 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001570 }
Pranith Kumar34f93922016-08-23 09:48:25 -04001571
1572 /* Eliminate duplicate and redundant fence instructions. */
Richard Hendersond0ed5152021-08-24 07:38:39 -07001573 if (ctx.prev_mb) {
Pranith Kumar34f93922016-08-23 09:48:25 -04001574 switch (opc) {
1575 case INDEX_op_mb:
1576 /* Merge two barriers of the same type into one,
1577 * or a weaker barrier into a stronger one,
1578 * or two weaker barriers into a stronger one.
1579 * mb X; mb Y => mb X|Y
1580 * mb; strl => mb; st
1581 * ldaq; mb => ld; mb
1582 * ldaq; strl => ld; mb; st
1583 * Other combinations are also merged into a strong
1584 * barrier. This is stricter than specified but for
1585 * the purposes of TCG is better than not optimizing.
1586 */
Richard Hendersond0ed5152021-08-24 07:38:39 -07001587 ctx.prev_mb->args[0] |= op->args[0];
Pranith Kumar34f93922016-08-23 09:48:25 -04001588 tcg_op_remove(s, op);
1589 break;
1590
1591 default:
1592 /* Opcodes that end the block stop the optimization. */
1593 if ((def->flags & TCG_OPF_BB_END) == 0) {
1594 break;
1595 }
1596 /* fallthru */
1597 case INDEX_op_qemu_ld_i32:
1598 case INDEX_op_qemu_ld_i64:
1599 case INDEX_op_qemu_st_i32:
Richard Henderson07ce0b02020-12-09 13:58:39 -06001600 case INDEX_op_qemu_st8_i32:
Pranith Kumar34f93922016-08-23 09:48:25 -04001601 case INDEX_op_qemu_st_i64:
1602 case INDEX_op_call:
1603 /* Opcodes that touch guest memory stop the optimization. */
Richard Hendersond0ed5152021-08-24 07:38:39 -07001604 ctx.prev_mb = NULL;
Pranith Kumar34f93922016-08-23 09:48:25 -04001605 break;
1606 }
1607 } else if (opc == INDEX_op_mb) {
Richard Hendersond0ed5152021-08-24 07:38:39 -07001608 ctx.prev_mb = op;
Pranith Kumar34f93922016-08-23 09:48:25 -04001609 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001610 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001611}