blob: bda727d5ed38c34b02c526f85ec202a309b952a8 [file] [log] [blame]
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001/*
2 * Optimizations for Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2010 Samsung Electronics.
5 * Contributed by Kirill Batuzov <batuzovk@ispras.ru>
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25
Peter Maydell757e7252016-01-26 18:17:08 +000026#include "qemu/osdep.h"
Philippe Mathieu-Daudédcb32f12020-01-01 12:23:00 +010027#include "tcg/tcg-op.h"
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040028
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040029#define CASE_OP_32_64(x) \
30 glue(glue(case INDEX_op_, x), _i32): \
31 glue(glue(case INDEX_op_, x), _i64)
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040032
Richard Henderson170ba882017-11-22 09:07:11 +010033#define CASE_OP_32_64_VEC(x) \
34 glue(glue(case INDEX_op_, x), _i32): \
35 glue(glue(case INDEX_op_, x), _i64): \
36 glue(glue(case INDEX_op_, x), _vec)
37
Richard Henderson6fcb98e2020-03-30 17:44:30 -070038typedef struct TempOptInfo {
Aurelien Jarnob41059d2015-07-27 12:41:44 +020039 bool is_const;
Richard Henderson63490392017-06-20 13:43:15 -070040 TCGTemp *prev_copy;
41 TCGTemp *next_copy;
Richard Henderson54795542020-09-06 16:21:32 -070042 uint64_t val;
43 uint64_t mask;
Richard Henderson6fcb98e2020-03-30 17:44:30 -070044} TempOptInfo;
Kirill Batuzov22613af2011-07-07 16:37:13 +040045
Richard Henderson6fcb98e2020-03-30 17:44:30 -070046static inline TempOptInfo *ts_info(TCGTemp *ts)
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020047{
Richard Henderson63490392017-06-20 13:43:15 -070048 return ts->state_ptr;
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020049}
50
Richard Henderson6fcb98e2020-03-30 17:44:30 -070051static inline TempOptInfo *arg_info(TCGArg arg)
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020052{
Richard Henderson63490392017-06-20 13:43:15 -070053 return ts_info(arg_temp(arg));
54}
55
56static inline bool ts_is_const(TCGTemp *ts)
57{
58 return ts_info(ts)->is_const;
59}
60
61static inline bool arg_is_const(TCGArg arg)
62{
63 return ts_is_const(arg_temp(arg));
64}
65
66static inline bool ts_is_copy(TCGTemp *ts)
67{
68 return ts_info(ts)->next_copy != ts;
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020069}
70
Aurelien Jarnob41059d2015-07-27 12:41:44 +020071/* Reset TEMP's state, possibly removing the temp for the list of copies. */
Richard Henderson63490392017-06-20 13:43:15 -070072static void reset_ts(TCGTemp *ts)
Kirill Batuzov22613af2011-07-07 16:37:13 +040073{
Richard Henderson6fcb98e2020-03-30 17:44:30 -070074 TempOptInfo *ti = ts_info(ts);
75 TempOptInfo *pi = ts_info(ti->prev_copy);
76 TempOptInfo *ni = ts_info(ti->next_copy);
Richard Henderson63490392017-06-20 13:43:15 -070077
78 ni->prev_copy = ti->prev_copy;
79 pi->next_copy = ti->next_copy;
80 ti->next_copy = ts;
81 ti->prev_copy = ts;
82 ti->is_const = false;
83 ti->mask = -1;
84}
85
86static void reset_temp(TCGArg arg)
87{
88 reset_ts(arg_temp(arg));
Kirill Batuzov22613af2011-07-07 16:37:13 +040089}
90
Aurelien Jarno1208d7d2015-07-27 12:41:44 +020091/* Initialize and activate a temporary. */
Richard Henderson8f17a972020-03-30 19:52:02 -070092static void init_ts_info(TCGTempSet *temps_used, TCGTemp *ts)
Aurelien Jarno1208d7d2015-07-27 12:41:44 +020093{
Richard Henderson63490392017-06-20 13:43:15 -070094 size_t idx = temp_idx(ts);
Richard Henderson8f17a972020-03-30 19:52:02 -070095 TempOptInfo *ti;
Richard Henderson63490392017-06-20 13:43:15 -070096
Richard Henderson8f17a972020-03-30 19:52:02 -070097 if (test_bit(idx, temps_used->l)) {
98 return;
99 }
100 set_bit(idx, temps_used->l);
101
102 ti = ts->state_ptr;
103 if (ti == NULL) {
104 ti = tcg_malloc(sizeof(TempOptInfo));
Richard Henderson63490392017-06-20 13:43:15 -0700105 ts->state_ptr = ti;
Richard Henderson8f17a972020-03-30 19:52:02 -0700106 }
107
108 ti->next_copy = ts;
109 ti->prev_copy = ts;
110 if (ts->kind == TEMP_CONST) {
111 ti->is_const = true;
112 ti->val = ts->val;
113 ti->mask = ts->val;
114 if (TCG_TARGET_REG_BITS > 32 && ts->type == TCG_TYPE_I32) {
115 /* High bits of a 32-bit quantity are garbage. */
116 ti->mask |= ~0xffffffffull;
Richard Hendersonc0522132020-03-29 18:55:52 -0700117 }
Richard Henderson8f17a972020-03-30 19:52:02 -0700118 } else {
119 ti->is_const = false;
120 ti->mask = -1;
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200121 }
122}
123
Richard Henderson8f17a972020-03-30 19:52:02 -0700124static void init_arg_info(TCGTempSet *temps_used, TCGArg arg)
Richard Henderson63490392017-06-20 13:43:15 -0700125{
Richard Henderson8f17a972020-03-30 19:52:02 -0700126 init_ts_info(temps_used, arg_temp(arg));
Richard Henderson63490392017-06-20 13:43:15 -0700127}
128
Richard Henderson63490392017-06-20 13:43:15 -0700129static TCGTemp *find_better_copy(TCGContext *s, TCGTemp *ts)
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200130{
Richard Henderson4c868ce2020-04-23 09:02:23 -0700131 TCGTemp *i, *g, *l;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200132
Richard Henderson4c868ce2020-04-23 09:02:23 -0700133 /* If this is already readonly, we can't do better. */
134 if (temp_readonly(ts)) {
Richard Henderson63490392017-06-20 13:43:15 -0700135 return ts;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200136 }
137
Richard Henderson4c868ce2020-04-23 09:02:23 -0700138 g = l = NULL;
Richard Henderson63490392017-06-20 13:43:15 -0700139 for (i = ts_info(ts)->next_copy; i != ts; i = ts_info(i)->next_copy) {
Richard Henderson4c868ce2020-04-23 09:02:23 -0700140 if (temp_readonly(i)) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200141 return i;
Richard Henderson4c868ce2020-04-23 09:02:23 -0700142 } else if (i->kind > ts->kind) {
143 if (i->kind == TEMP_GLOBAL) {
144 g = i;
145 } else if (i->kind == TEMP_LOCAL) {
146 l = i;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200147 }
148 }
149 }
150
Richard Henderson4c868ce2020-04-23 09:02:23 -0700151 /* If we didn't find a better representation, return the same temp. */
152 return g ? g : l ? l : ts;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200153}
154
Richard Henderson63490392017-06-20 13:43:15 -0700155static bool ts_are_copies(TCGTemp *ts1, TCGTemp *ts2)
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200156{
Richard Henderson63490392017-06-20 13:43:15 -0700157 TCGTemp *i;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200158
Richard Henderson63490392017-06-20 13:43:15 -0700159 if (ts1 == ts2) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200160 return true;
161 }
162
Richard Henderson63490392017-06-20 13:43:15 -0700163 if (!ts_is_copy(ts1) || !ts_is_copy(ts2)) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200164 return false;
165 }
166
Richard Henderson63490392017-06-20 13:43:15 -0700167 for (i = ts_info(ts1)->next_copy; i != ts1; i = ts_info(i)->next_copy) {
168 if (i == ts2) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200169 return true;
170 }
171 }
172
173 return false;
174}
175
Richard Henderson63490392017-06-20 13:43:15 -0700176static bool args_are_copies(TCGArg arg1, TCGArg arg2)
177{
178 return ts_are_copies(arg_temp(arg1), arg_temp(arg2));
179}
180
Richard Hendersonacd93702016-12-08 12:28:42 -0800181static void tcg_opt_gen_mov(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg src)
Kirill Batuzov22613af2011-07-07 16:37:13 +0400182{
Richard Henderson63490392017-06-20 13:43:15 -0700183 TCGTemp *dst_ts = arg_temp(dst);
184 TCGTemp *src_ts = arg_temp(src);
Richard Henderson170ba882017-11-22 09:07:11 +0100185 const TCGOpDef *def;
Richard Henderson6fcb98e2020-03-30 17:44:30 -0700186 TempOptInfo *di;
187 TempOptInfo *si;
Richard Henderson54795542020-09-06 16:21:32 -0700188 uint64_t mask;
Richard Henderson63490392017-06-20 13:43:15 -0700189 TCGOpcode new_op;
190
191 if (ts_are_copies(dst_ts, src_ts)) {
Aurelien Jarno53657182015-06-04 21:53:25 +0200192 tcg_op_remove(s, op);
193 return;
194 }
195
Richard Henderson63490392017-06-20 13:43:15 -0700196 reset_ts(dst_ts);
197 di = ts_info(dst_ts);
198 si = ts_info(src_ts);
Richard Henderson170ba882017-11-22 09:07:11 +0100199 def = &tcg_op_defs[op->opc];
200 if (def->flags & TCG_OPF_VECTOR) {
201 new_op = INDEX_op_mov_vec;
202 } else if (def->flags & TCG_OPF_64BIT) {
203 new_op = INDEX_op_mov_i64;
204 } else {
205 new_op = INDEX_op_mov_i32;
206 }
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700207 op->opc = new_op;
Richard Henderson170ba882017-11-22 09:07:11 +0100208 /* TCGOP_VECL and TCGOP_VECE remain unchanged. */
Richard Henderson63490392017-06-20 13:43:15 -0700209 op->args[0] = dst;
210 op->args[1] = src;
Richard Hendersona62f6f52014-05-22 10:59:12 -0700211
Richard Henderson63490392017-06-20 13:43:15 -0700212 mask = si->mask;
Richard Henderson24666ba2014-05-22 11:14:10 -0700213 if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_mov_i32) {
214 /* High bits of the destination are now garbage. */
215 mask |= ~0xffffffffull;
216 }
Richard Henderson63490392017-06-20 13:43:15 -0700217 di->mask = mask;
Richard Henderson24666ba2014-05-22 11:14:10 -0700218
Richard Henderson63490392017-06-20 13:43:15 -0700219 if (src_ts->type == dst_ts->type) {
Richard Henderson6fcb98e2020-03-30 17:44:30 -0700220 TempOptInfo *ni = ts_info(si->next_copy);
Richard Henderson63490392017-06-20 13:43:15 -0700221
222 di->next_copy = si->next_copy;
223 di->prev_copy = src_ts;
224 ni->prev_copy = dst_ts;
225 si->next_copy = dst_ts;
226 di->is_const = si->is_const;
227 di->val = si->val;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800228 }
Kirill Batuzov22613af2011-07-07 16:37:13 +0400229}
230
Richard Henderson8fe35e02020-03-30 20:42:43 -0700231static void tcg_opt_gen_movi(TCGContext *s, TCGTempSet *temps_used,
232 TCGOp *op, TCGArg dst, uint64_t val)
233{
234 const TCGOpDef *def = &tcg_op_defs[op->opc];
235 TCGType type;
236 TCGTemp *tv;
237
238 if (def->flags & TCG_OPF_VECTOR) {
239 type = TCGOP_VECL(op) + TCG_TYPE_V64;
240 } else if (def->flags & TCG_OPF_64BIT) {
241 type = TCG_TYPE_I64;
242 } else {
243 type = TCG_TYPE_I32;
244 }
245
246 /* Convert movi to mov with constant temp. */
247 tv = tcg_constant_internal(type, val);
248 init_ts_info(temps_used, tv);
249 tcg_opt_gen_mov(s, op, dst, temp_arg(tv));
250}
251
Richard Henderson54795542020-09-06 16:21:32 -0700252static uint64_t do_constant_folding_2(TCGOpcode op, uint64_t x, uint64_t y)
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400253{
Richard Henderson03271522013-08-14 14:35:56 -0700254 uint64_t l64, h64;
255
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400256 switch (op) {
257 CASE_OP_32_64(add):
258 return x + y;
259
260 CASE_OP_32_64(sub):
261 return x - y;
262
263 CASE_OP_32_64(mul):
264 return x * y;
265
Kirill Batuzov9a810902011-07-07 16:37:15 +0400266 CASE_OP_32_64(and):
267 return x & y;
268
269 CASE_OP_32_64(or):
270 return x | y;
271
272 CASE_OP_32_64(xor):
273 return x ^ y;
274
Kirill Batuzov55c09752011-07-07 16:37:16 +0400275 case INDEX_op_shl_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700276 return (uint32_t)x << (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400277
Kirill Batuzov55c09752011-07-07 16:37:16 +0400278 case INDEX_op_shl_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700279 return (uint64_t)x << (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400280
281 case INDEX_op_shr_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700282 return (uint32_t)x >> (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400283
Kirill Batuzov55c09752011-07-07 16:37:16 +0400284 case INDEX_op_shr_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700285 return (uint64_t)x >> (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400286
287 case INDEX_op_sar_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700288 return (int32_t)x >> (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400289
Kirill Batuzov55c09752011-07-07 16:37:16 +0400290 case INDEX_op_sar_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700291 return (int64_t)x >> (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400292
293 case INDEX_op_rotr_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700294 return ror32(x, y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400295
Kirill Batuzov55c09752011-07-07 16:37:16 +0400296 case INDEX_op_rotr_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700297 return ror64(x, y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400298
299 case INDEX_op_rotl_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700300 return rol32(x, y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400301
Kirill Batuzov55c09752011-07-07 16:37:16 +0400302 case INDEX_op_rotl_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700303 return rol64(x, y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400304
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700305 CASE_OP_32_64(not):
Kirill Batuzova640f032011-07-07 16:37:17 +0400306 return ~x;
307
Richard Hendersoncb25c802011-08-17 14:11:47 -0700308 CASE_OP_32_64(neg):
309 return -x;
310
311 CASE_OP_32_64(andc):
312 return x & ~y;
313
314 CASE_OP_32_64(orc):
315 return x | ~y;
316
317 CASE_OP_32_64(eqv):
318 return ~(x ^ y);
319
320 CASE_OP_32_64(nand):
321 return ~(x & y);
322
323 CASE_OP_32_64(nor):
324 return ~(x | y);
325
Richard Henderson0e28d002016-11-16 09:23:28 +0100326 case INDEX_op_clz_i32:
327 return (uint32_t)x ? clz32(x) : y;
328
329 case INDEX_op_clz_i64:
330 return x ? clz64(x) : y;
331
332 case INDEX_op_ctz_i32:
333 return (uint32_t)x ? ctz32(x) : y;
334
335 case INDEX_op_ctz_i64:
336 return x ? ctz64(x) : y;
337
Richard Hendersona768e4e2016-11-21 11:13:39 +0100338 case INDEX_op_ctpop_i32:
339 return ctpop32(x);
340
341 case INDEX_op_ctpop_i64:
342 return ctpop64(x);
343
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700344 CASE_OP_32_64(ext8s):
Kirill Batuzova640f032011-07-07 16:37:17 +0400345 return (int8_t)x;
346
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700347 CASE_OP_32_64(ext16s):
Kirill Batuzova640f032011-07-07 16:37:17 +0400348 return (int16_t)x;
349
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700350 CASE_OP_32_64(ext8u):
Kirill Batuzova640f032011-07-07 16:37:17 +0400351 return (uint8_t)x;
352
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700353 CASE_OP_32_64(ext16u):
Kirill Batuzova640f032011-07-07 16:37:17 +0400354 return (uint16_t)x;
355
Richard Henderson64985942018-11-20 08:53:34 +0100356 CASE_OP_32_64(bswap16):
357 return bswap16(x);
358
359 CASE_OP_32_64(bswap32):
360 return bswap32(x);
361
362 case INDEX_op_bswap64_i64:
363 return bswap64(x);
364
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200365 case INDEX_op_ext_i32_i64:
Kirill Batuzova640f032011-07-07 16:37:17 +0400366 case INDEX_op_ext32s_i64:
367 return (int32_t)x;
368
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200369 case INDEX_op_extu_i32_i64:
Richard Henderson609ad702015-07-24 07:16:00 -0700370 case INDEX_op_extrl_i64_i32:
Kirill Batuzova640f032011-07-07 16:37:17 +0400371 case INDEX_op_ext32u_i64:
372 return (uint32_t)x;
Kirill Batuzova640f032011-07-07 16:37:17 +0400373
Richard Henderson609ad702015-07-24 07:16:00 -0700374 case INDEX_op_extrh_i64_i32:
375 return (uint64_t)x >> 32;
376
Richard Henderson03271522013-08-14 14:35:56 -0700377 case INDEX_op_muluh_i32:
378 return ((uint64_t)(uint32_t)x * (uint32_t)y) >> 32;
379 case INDEX_op_mulsh_i32:
380 return ((int64_t)(int32_t)x * (int32_t)y) >> 32;
381
382 case INDEX_op_muluh_i64:
383 mulu64(&l64, &h64, x, y);
384 return h64;
385 case INDEX_op_mulsh_i64:
386 muls64(&l64, &h64, x, y);
387 return h64;
388
Richard Henderson01547f72013-08-14 15:22:46 -0700389 case INDEX_op_div_i32:
390 /* Avoid crashing on divide by zero, otherwise undefined. */
391 return (int32_t)x / ((int32_t)y ? : 1);
392 case INDEX_op_divu_i32:
393 return (uint32_t)x / ((uint32_t)y ? : 1);
394 case INDEX_op_div_i64:
395 return (int64_t)x / ((int64_t)y ? : 1);
396 case INDEX_op_divu_i64:
397 return (uint64_t)x / ((uint64_t)y ? : 1);
398
399 case INDEX_op_rem_i32:
400 return (int32_t)x % ((int32_t)y ? : 1);
401 case INDEX_op_remu_i32:
402 return (uint32_t)x % ((uint32_t)y ? : 1);
403 case INDEX_op_rem_i64:
404 return (int64_t)x % ((int64_t)y ? : 1);
405 case INDEX_op_remu_i64:
406 return (uint64_t)x % ((uint64_t)y ? : 1);
407
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400408 default:
409 fprintf(stderr,
410 "Unrecognized operation %d in do_constant_folding.\n", op);
411 tcg_abort();
412 }
413}
414
Richard Henderson54795542020-09-06 16:21:32 -0700415static uint64_t do_constant_folding(TCGOpcode op, uint64_t x, uint64_t y)
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400416{
Richard Henderson170ba882017-11-22 09:07:11 +0100417 const TCGOpDef *def = &tcg_op_defs[op];
Richard Henderson54795542020-09-06 16:21:32 -0700418 uint64_t res = do_constant_folding_2(op, x, y);
Richard Henderson170ba882017-11-22 09:07:11 +0100419 if (!(def->flags & TCG_OPF_64BIT)) {
Aurelien Jarno29f3ff82015-07-10 18:03:31 +0200420 res = (int32_t)res;
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400421 }
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400422 return res;
423}
424
Richard Henderson9519da72012-10-02 11:32:26 -0700425static bool do_constant_folding_cond_32(uint32_t x, uint32_t y, TCGCond c)
426{
427 switch (c) {
428 case TCG_COND_EQ:
429 return x == y;
430 case TCG_COND_NE:
431 return x != y;
432 case TCG_COND_LT:
433 return (int32_t)x < (int32_t)y;
434 case TCG_COND_GE:
435 return (int32_t)x >= (int32_t)y;
436 case TCG_COND_LE:
437 return (int32_t)x <= (int32_t)y;
438 case TCG_COND_GT:
439 return (int32_t)x > (int32_t)y;
440 case TCG_COND_LTU:
441 return x < y;
442 case TCG_COND_GEU:
443 return x >= y;
444 case TCG_COND_LEU:
445 return x <= y;
446 case TCG_COND_GTU:
447 return x > y;
448 default:
449 tcg_abort();
450 }
451}
452
453static bool do_constant_folding_cond_64(uint64_t x, uint64_t y, TCGCond c)
454{
455 switch (c) {
456 case TCG_COND_EQ:
457 return x == y;
458 case TCG_COND_NE:
459 return x != y;
460 case TCG_COND_LT:
461 return (int64_t)x < (int64_t)y;
462 case TCG_COND_GE:
463 return (int64_t)x >= (int64_t)y;
464 case TCG_COND_LE:
465 return (int64_t)x <= (int64_t)y;
466 case TCG_COND_GT:
467 return (int64_t)x > (int64_t)y;
468 case TCG_COND_LTU:
469 return x < y;
470 case TCG_COND_GEU:
471 return x >= y;
472 case TCG_COND_LEU:
473 return x <= y;
474 case TCG_COND_GTU:
475 return x > y;
476 default:
477 tcg_abort();
478 }
479}
480
481static bool do_constant_folding_cond_eq(TCGCond c)
482{
483 switch (c) {
484 case TCG_COND_GT:
485 case TCG_COND_LTU:
486 case TCG_COND_LT:
487 case TCG_COND_GTU:
488 case TCG_COND_NE:
489 return 0;
490 case TCG_COND_GE:
491 case TCG_COND_GEU:
492 case TCG_COND_LE:
493 case TCG_COND_LEU:
494 case TCG_COND_EQ:
495 return 1;
496 default:
497 tcg_abort();
498 }
499}
500
Aurelien Jarnob336ceb2012-09-18 19:37:00 +0200501/* Return 2 if the condition can't be simplified, and the result
502 of the condition (0 or 1) if it can */
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200503static TCGArg do_constant_folding_cond(TCGOpcode op, TCGArg x,
504 TCGArg y, TCGCond c)
505{
Richard Henderson54795542020-09-06 16:21:32 -0700506 uint64_t xv = arg_info(x)->val;
507 uint64_t yv = arg_info(y)->val;
508
Richard Henderson63490392017-06-20 13:43:15 -0700509 if (arg_is_const(x) && arg_is_const(y)) {
Richard Henderson170ba882017-11-22 09:07:11 +0100510 const TCGOpDef *def = &tcg_op_defs[op];
511 tcg_debug_assert(!(def->flags & TCG_OPF_VECTOR));
512 if (def->flags & TCG_OPF_64BIT) {
Richard Henderson63490392017-06-20 13:43:15 -0700513 return do_constant_folding_cond_64(xv, yv, c);
Richard Henderson170ba882017-11-22 09:07:11 +0100514 } else {
515 return do_constant_folding_cond_32(xv, yv, c);
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200516 }
Richard Henderson63490392017-06-20 13:43:15 -0700517 } else if (args_are_copies(x, y)) {
Richard Henderson9519da72012-10-02 11:32:26 -0700518 return do_constant_folding_cond_eq(c);
Richard Henderson63490392017-06-20 13:43:15 -0700519 } else if (arg_is_const(y) && yv == 0) {
Aurelien Jarnob336ceb2012-09-18 19:37:00 +0200520 switch (c) {
521 case TCG_COND_LTU:
522 return 0;
523 case TCG_COND_GEU:
524 return 1;
525 default:
526 return 2;
527 }
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200528 }
Alex Bennée550276a2016-09-30 22:30:55 +0100529 return 2;
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200530}
531
Richard Henderson6c4382f2012-10-02 11:32:27 -0700532/* Return 2 if the condition can't be simplified, and the result
533 of the condition (0 or 1) if it can */
534static TCGArg do_constant_folding_cond2(TCGArg *p1, TCGArg *p2, TCGCond c)
535{
536 TCGArg al = p1[0], ah = p1[1];
537 TCGArg bl = p2[0], bh = p2[1];
538
Richard Henderson63490392017-06-20 13:43:15 -0700539 if (arg_is_const(bl) && arg_is_const(bh)) {
540 tcg_target_ulong blv = arg_info(bl)->val;
541 tcg_target_ulong bhv = arg_info(bh)->val;
542 uint64_t b = deposit64(blv, 32, 32, bhv);
Richard Henderson6c4382f2012-10-02 11:32:27 -0700543
Richard Henderson63490392017-06-20 13:43:15 -0700544 if (arg_is_const(al) && arg_is_const(ah)) {
545 tcg_target_ulong alv = arg_info(al)->val;
546 tcg_target_ulong ahv = arg_info(ah)->val;
547 uint64_t a = deposit64(alv, 32, 32, ahv);
Richard Henderson6c4382f2012-10-02 11:32:27 -0700548 return do_constant_folding_cond_64(a, b, c);
549 }
550 if (b == 0) {
551 switch (c) {
552 case TCG_COND_LTU:
553 return 0;
554 case TCG_COND_GEU:
555 return 1;
556 default:
557 break;
558 }
559 }
560 }
Richard Henderson63490392017-06-20 13:43:15 -0700561 if (args_are_copies(al, bl) && args_are_copies(ah, bh)) {
Richard Henderson6c4382f2012-10-02 11:32:27 -0700562 return do_constant_folding_cond_eq(c);
563 }
564 return 2;
565}
566
Richard Henderson24c9ae42012-10-02 11:32:21 -0700567static bool swap_commutative(TCGArg dest, TCGArg *p1, TCGArg *p2)
568{
569 TCGArg a1 = *p1, a2 = *p2;
570 int sum = 0;
Richard Henderson63490392017-06-20 13:43:15 -0700571 sum += arg_is_const(a1);
572 sum -= arg_is_const(a2);
Richard Henderson24c9ae42012-10-02 11:32:21 -0700573
574 /* Prefer the constant in second argument, and then the form
575 op a, a, b, which is better handled on non-RISC hosts. */
576 if (sum > 0 || (sum == 0 && dest == a2)) {
577 *p1 = a2;
578 *p2 = a1;
579 return true;
580 }
581 return false;
582}
583
Richard Henderson0bfcb862012-10-02 11:32:23 -0700584static bool swap_commutative2(TCGArg *p1, TCGArg *p2)
585{
586 int sum = 0;
Richard Henderson63490392017-06-20 13:43:15 -0700587 sum += arg_is_const(p1[0]);
588 sum += arg_is_const(p1[1]);
589 sum -= arg_is_const(p2[0]);
590 sum -= arg_is_const(p2[1]);
Richard Henderson0bfcb862012-10-02 11:32:23 -0700591 if (sum > 0) {
592 TCGArg t;
593 t = p1[0], p1[0] = p2[0], p2[0] = t;
594 t = p1[1], p1[1] = p2[1], p2[1] = t;
595 return true;
596 }
597 return false;
598}
599
Kirill Batuzov22613af2011-07-07 16:37:13 +0400600/* Propagate constants and copies, fold constant expressions. */
Aurelien Jarno36e60ef2015-06-04 21:53:27 +0200601void tcg_optimize(TCGContext *s)
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +0400602{
Richard Henderson8f17a972020-03-30 19:52:02 -0700603 int nb_temps, nb_globals, i;
Richard Henderson15fa08f2017-11-02 15:19:14 +0100604 TCGOp *op, *op_next, *prev_mb = NULL;
Emilio G. Cota34184b02017-07-19 14:32:24 -0400605 TCGTempSet temps_used;
Richard Henderson5d8f5362012-09-21 10:13:38 -0700606
Kirill Batuzov22613af2011-07-07 16:37:13 +0400607 /* Array VALS has an element for each temp.
608 If this temp holds a constant then its value is kept in VALS' element.
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200609 If this temp is a copy of other ones then the other copies are
610 available through the doubly linked circular list. */
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +0400611
612 nb_temps = s->nb_temps;
613 nb_globals = s->nb_globals;
Richard Henderson8f17a972020-03-30 19:52:02 -0700614
Richard Henderson8fe35e02020-03-30 20:42:43 -0700615 memset(&temps_used, 0, sizeof(temps_used));
Richard Henderson8f17a972020-03-30 19:52:02 -0700616 for (i = 0; i < nb_temps; ++i) {
617 s->temps[i].state_ptr = NULL;
618 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +0400619
Richard Henderson15fa08f2017-11-02 15:19:14 +0100620 QTAILQ_FOREACH_SAFE(op, &s->ops, link, op_next) {
Richard Henderson54795542020-09-06 16:21:32 -0700621 uint64_t mask, partmask, affected, tmp;
Richard Henderson8f17a972020-03-30 19:52:02 -0700622 int nb_oargs, nb_iargs;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700623 TCGOpcode opc = op->opc;
624 const TCGOpDef *def = &tcg_op_defs[opc];
625
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200626 /* Count the arguments, and initialize the temps that are
627 going to be used */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700628 if (opc == INDEX_op_call) {
Richard Hendersoncd9090a2017-11-14 13:02:51 +0100629 nb_oargs = TCGOP_CALLO(op);
630 nb_iargs = TCGOP_CALLI(op);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200631 for (i = 0; i < nb_oargs + nb_iargs; i++) {
Richard Henderson63490392017-06-20 13:43:15 -0700632 TCGTemp *ts = arg_temp(op->args[i]);
633 if (ts) {
Richard Henderson8f17a972020-03-30 19:52:02 -0700634 init_ts_info(&temps_used, ts);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200635 }
636 }
Aurelien Jarno1ff8c542012-09-11 16:18:49 +0200637 } else {
Richard Hendersoncf066672014-03-22 20:06:52 -0700638 nb_oargs = def->nb_oargs;
639 nb_iargs = def->nb_iargs;
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200640 for (i = 0; i < nb_oargs + nb_iargs; i++) {
Richard Henderson8f17a972020-03-30 19:52:02 -0700641 init_arg_info(&temps_used, op->args[i]);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200642 }
Richard Hendersoncf066672014-03-22 20:06:52 -0700643 }
644
645 /* Do copy propagation */
646 for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
Richard Henderson63490392017-06-20 13:43:15 -0700647 TCGTemp *ts = arg_temp(op->args[i]);
648 if (ts && ts_is_copy(ts)) {
649 op->args[i] = temp_arg(find_better_copy(s, ts));
Kirill Batuzov22613af2011-07-07 16:37:13 +0400650 }
651 }
652
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400653 /* For commutative operations make constant second argument */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700654 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +0100655 CASE_OP_32_64_VEC(add):
656 CASE_OP_32_64_VEC(mul):
657 CASE_OP_32_64_VEC(and):
658 CASE_OP_32_64_VEC(or):
659 CASE_OP_32_64_VEC(xor):
Richard Hendersoncb25c802011-08-17 14:11:47 -0700660 CASE_OP_32_64(eqv):
661 CASE_OP_32_64(nand):
662 CASE_OP_32_64(nor):
Richard Henderson03271522013-08-14 14:35:56 -0700663 CASE_OP_32_64(muluh):
664 CASE_OP_32_64(mulsh):
Richard Hendersonacd93702016-12-08 12:28:42 -0800665 swap_commutative(op->args[0], &op->args[1], &op->args[2]);
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400666 break;
Aurelien Jarno65a7cce2012-09-06 16:47:14 +0200667 CASE_OP_32_64(brcond):
Richard Hendersonacd93702016-12-08 12:28:42 -0800668 if (swap_commutative(-1, &op->args[0], &op->args[1])) {
669 op->args[2] = tcg_swap_cond(op->args[2]);
Aurelien Jarno65a7cce2012-09-06 16:47:14 +0200670 }
671 break;
672 CASE_OP_32_64(setcond):
Richard Hendersonacd93702016-12-08 12:28:42 -0800673 if (swap_commutative(op->args[0], &op->args[1], &op->args[2])) {
674 op->args[3] = tcg_swap_cond(op->args[3]);
Aurelien Jarno65a7cce2012-09-06 16:47:14 +0200675 }
676 break;
Richard Hendersonfa01a202012-09-21 10:13:37 -0700677 CASE_OP_32_64(movcond):
Richard Hendersonacd93702016-12-08 12:28:42 -0800678 if (swap_commutative(-1, &op->args[1], &op->args[2])) {
679 op->args[5] = tcg_swap_cond(op->args[5]);
Richard Hendersonfa01a202012-09-21 10:13:37 -0700680 }
Richard Henderson5d8f5362012-09-21 10:13:38 -0700681 /* For movcond, we canonicalize the "false" input reg to match
682 the destination reg so that the tcg backend can implement
683 a "move if true" operation. */
Richard Hendersonacd93702016-12-08 12:28:42 -0800684 if (swap_commutative(op->args[0], &op->args[4], &op->args[3])) {
685 op->args[5] = tcg_invert_cond(op->args[5]);
Richard Henderson5d8f5362012-09-21 10:13:38 -0700686 }
Richard Henderson1e484e62012-10-02 11:32:22 -0700687 break;
Richard Hendersond7156f72013-02-19 23:51:52 -0800688 CASE_OP_32_64(add2):
Richard Hendersonacd93702016-12-08 12:28:42 -0800689 swap_commutative(op->args[0], &op->args[2], &op->args[4]);
690 swap_commutative(op->args[1], &op->args[3], &op->args[5]);
Richard Henderson1e484e62012-10-02 11:32:22 -0700691 break;
Richard Hendersond7156f72013-02-19 23:51:52 -0800692 CASE_OP_32_64(mulu2):
Richard Henderson4d3203f2013-02-19 23:51:53 -0800693 CASE_OP_32_64(muls2):
Richard Hendersonacd93702016-12-08 12:28:42 -0800694 swap_commutative(op->args[0], &op->args[2], &op->args[3]);
Richard Henderson14149682012-10-02 11:32:30 -0700695 break;
Richard Henderson0bfcb862012-10-02 11:32:23 -0700696 case INDEX_op_brcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -0800697 if (swap_commutative2(&op->args[0], &op->args[2])) {
698 op->args[4] = tcg_swap_cond(op->args[4]);
Richard Henderson0bfcb862012-10-02 11:32:23 -0700699 }
700 break;
701 case INDEX_op_setcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -0800702 if (swap_commutative2(&op->args[1], &op->args[3])) {
703 op->args[5] = tcg_swap_cond(op->args[5]);
Richard Henderson0bfcb862012-10-02 11:32:23 -0700704 }
705 break;
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400706 default:
707 break;
708 }
709
Richard Henderson2d497542013-03-21 09:13:33 -0700710 /* Simplify expressions for "shift/rot r, 0, a => movi r, 0",
711 and "sub r, 0, a => neg r, a" case. */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700712 switch (opc) {
Aurelien Jarno01ee5282012-09-06 16:47:14 +0200713 CASE_OP_32_64(shl):
714 CASE_OP_32_64(shr):
715 CASE_OP_32_64(sar):
716 CASE_OP_32_64(rotl):
717 CASE_OP_32_64(rotr):
Richard Henderson63490392017-06-20 13:43:15 -0700718 if (arg_is_const(op->args[1])
719 && arg_info(op->args[1])->val == 0) {
Richard Henderson8fe35e02020-03-30 20:42:43 -0700720 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], 0);
Aurelien Jarno01ee5282012-09-06 16:47:14 +0200721 continue;
722 }
723 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100724 CASE_OP_32_64_VEC(sub):
Richard Henderson2d497542013-03-21 09:13:33 -0700725 {
726 TCGOpcode neg_op;
727 bool have_neg;
728
Richard Henderson63490392017-06-20 13:43:15 -0700729 if (arg_is_const(op->args[2])) {
Richard Henderson2d497542013-03-21 09:13:33 -0700730 /* Proceed with possible constant folding. */
731 break;
732 }
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700733 if (opc == INDEX_op_sub_i32) {
Richard Henderson2d497542013-03-21 09:13:33 -0700734 neg_op = INDEX_op_neg_i32;
735 have_neg = TCG_TARGET_HAS_neg_i32;
Richard Henderson170ba882017-11-22 09:07:11 +0100736 } else if (opc == INDEX_op_sub_i64) {
Richard Henderson2d497542013-03-21 09:13:33 -0700737 neg_op = INDEX_op_neg_i64;
738 have_neg = TCG_TARGET_HAS_neg_i64;
Richard Hendersonac383dde2019-04-20 00:27:24 +0000739 } else if (TCG_TARGET_HAS_neg_vec) {
740 TCGType type = TCGOP_VECL(op) + TCG_TYPE_V64;
741 unsigned vece = TCGOP_VECE(op);
Richard Henderson170ba882017-11-22 09:07:11 +0100742 neg_op = INDEX_op_neg_vec;
Richard Hendersonac383dde2019-04-20 00:27:24 +0000743 have_neg = tcg_can_emit_vec_op(neg_op, type, vece) > 0;
744 } else {
745 break;
Richard Henderson2d497542013-03-21 09:13:33 -0700746 }
747 if (!have_neg) {
748 break;
749 }
Richard Henderson63490392017-06-20 13:43:15 -0700750 if (arg_is_const(op->args[1])
751 && arg_info(op->args[1])->val == 0) {
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700752 op->opc = neg_op;
Richard Hendersonacd93702016-12-08 12:28:42 -0800753 reset_temp(op->args[0]);
754 op->args[1] = op->args[2];
Richard Henderson2d497542013-03-21 09:13:33 -0700755 continue;
756 }
757 }
758 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100759 CASE_OP_32_64_VEC(xor):
Richard Hendersone201b562014-01-28 13:15:38 -0800760 CASE_OP_32_64(nand):
Richard Henderson63490392017-06-20 13:43:15 -0700761 if (!arg_is_const(op->args[1])
762 && arg_is_const(op->args[2])
763 && arg_info(op->args[2])->val == -1) {
Richard Hendersone201b562014-01-28 13:15:38 -0800764 i = 1;
765 goto try_not;
766 }
767 break;
768 CASE_OP_32_64(nor):
Richard Henderson63490392017-06-20 13:43:15 -0700769 if (!arg_is_const(op->args[1])
770 && arg_is_const(op->args[2])
771 && arg_info(op->args[2])->val == 0) {
Richard Hendersone201b562014-01-28 13:15:38 -0800772 i = 1;
773 goto try_not;
774 }
775 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100776 CASE_OP_32_64_VEC(andc):
Richard Henderson63490392017-06-20 13:43:15 -0700777 if (!arg_is_const(op->args[2])
778 && arg_is_const(op->args[1])
779 && arg_info(op->args[1])->val == -1) {
Richard Hendersone201b562014-01-28 13:15:38 -0800780 i = 2;
781 goto try_not;
782 }
783 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100784 CASE_OP_32_64_VEC(orc):
Richard Hendersone201b562014-01-28 13:15:38 -0800785 CASE_OP_32_64(eqv):
Richard Henderson63490392017-06-20 13:43:15 -0700786 if (!arg_is_const(op->args[2])
787 && arg_is_const(op->args[1])
788 && arg_info(op->args[1])->val == 0) {
Richard Hendersone201b562014-01-28 13:15:38 -0800789 i = 2;
790 goto try_not;
791 }
792 break;
793 try_not:
794 {
795 TCGOpcode not_op;
796 bool have_not;
797
Richard Henderson170ba882017-11-22 09:07:11 +0100798 if (def->flags & TCG_OPF_VECTOR) {
799 not_op = INDEX_op_not_vec;
800 have_not = TCG_TARGET_HAS_not_vec;
801 } else if (def->flags & TCG_OPF_64BIT) {
Richard Hendersone201b562014-01-28 13:15:38 -0800802 not_op = INDEX_op_not_i64;
803 have_not = TCG_TARGET_HAS_not_i64;
804 } else {
805 not_op = INDEX_op_not_i32;
806 have_not = TCG_TARGET_HAS_not_i32;
807 }
808 if (!have_not) {
809 break;
810 }
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700811 op->opc = not_op;
Richard Hendersonacd93702016-12-08 12:28:42 -0800812 reset_temp(op->args[0]);
813 op->args[1] = op->args[i];
Richard Hendersone201b562014-01-28 13:15:38 -0800814 continue;
815 }
Aurelien Jarno01ee5282012-09-06 16:47:14 +0200816 default:
817 break;
818 }
819
Richard Henderson464a1442014-01-31 07:42:11 -0600820 /* Simplify expression for "op r, a, const => mov r, a" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700821 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +0100822 CASE_OP_32_64_VEC(add):
823 CASE_OP_32_64_VEC(sub):
824 CASE_OP_32_64_VEC(or):
825 CASE_OP_32_64_VEC(xor):
826 CASE_OP_32_64_VEC(andc):
Kirill Batuzov55c09752011-07-07 16:37:16 +0400827 CASE_OP_32_64(shl):
828 CASE_OP_32_64(shr):
829 CASE_OP_32_64(sar):
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700830 CASE_OP_32_64(rotl):
831 CASE_OP_32_64(rotr):
Richard Henderson63490392017-06-20 13:43:15 -0700832 if (!arg_is_const(op->args[1])
833 && arg_is_const(op->args[2])
834 && arg_info(op->args[2])->val == 0) {
Richard Hendersonacd93702016-12-08 12:28:42 -0800835 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200836 continue;
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400837 }
838 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100839 CASE_OP_32_64_VEC(and):
840 CASE_OP_32_64_VEC(orc):
Richard Henderson464a1442014-01-31 07:42:11 -0600841 CASE_OP_32_64(eqv):
Richard Henderson63490392017-06-20 13:43:15 -0700842 if (!arg_is_const(op->args[1])
843 && arg_is_const(op->args[2])
844 && arg_info(op->args[2])->val == -1) {
Richard Hendersonacd93702016-12-08 12:28:42 -0800845 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200846 continue;
Richard Henderson464a1442014-01-31 07:42:11 -0600847 }
848 break;
Aurelien Jarno56e49432012-09-06 16:47:13 +0200849 default:
850 break;
851 }
852
Aurelien Jarno30312442013-09-03 08:27:38 +0200853 /* Simplify using known-zero bits. Currently only ops with a single
854 output argument is supported. */
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800855 mask = -1;
Paolo Bonzini633f6502013-01-11 15:42:53 -0800856 affected = -1;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700857 switch (opc) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800858 CASE_OP_32_64(ext8s):
Richard Henderson63490392017-06-20 13:43:15 -0700859 if ((arg_info(op->args[1])->mask & 0x80) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800860 break;
861 }
Thomas Huthd84568b2020-12-11 16:24:24 +0100862 QEMU_FALLTHROUGH;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800863 CASE_OP_32_64(ext8u):
864 mask = 0xff;
865 goto and_const;
866 CASE_OP_32_64(ext16s):
Richard Henderson63490392017-06-20 13:43:15 -0700867 if ((arg_info(op->args[1])->mask & 0x8000) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800868 break;
869 }
Thomas Huthd84568b2020-12-11 16:24:24 +0100870 QEMU_FALLTHROUGH;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800871 CASE_OP_32_64(ext16u):
872 mask = 0xffff;
873 goto and_const;
874 case INDEX_op_ext32s_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700875 if ((arg_info(op->args[1])->mask & 0x80000000) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800876 break;
877 }
Thomas Huthd84568b2020-12-11 16:24:24 +0100878 QEMU_FALLTHROUGH;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800879 case INDEX_op_ext32u_i64:
880 mask = 0xffffffffU;
881 goto and_const;
882
883 CASE_OP_32_64(and):
Richard Henderson63490392017-06-20 13:43:15 -0700884 mask = arg_info(op->args[2])->mask;
885 if (arg_is_const(op->args[2])) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800886 and_const:
Richard Henderson63490392017-06-20 13:43:15 -0700887 affected = arg_info(op->args[1])->mask & ~mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800888 }
Richard Henderson63490392017-06-20 13:43:15 -0700889 mask = arg_info(op->args[1])->mask & mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800890 break;
891
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200892 case INDEX_op_ext_i32_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700893 if ((arg_info(op->args[1])->mask & 0x80000000) != 0) {
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200894 break;
895 }
Thomas Huthd84568b2020-12-11 16:24:24 +0100896 QEMU_FALLTHROUGH;
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200897 case INDEX_op_extu_i32_i64:
898 /* We do not compute affected as it is a size changing op. */
Richard Henderson63490392017-06-20 13:43:15 -0700899 mask = (uint32_t)arg_info(op->args[1])->mask;
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200900 break;
901
Richard Henderson23ec69ed2014-01-28 12:03:24 -0800902 CASE_OP_32_64(andc):
903 /* Known-zeros does not imply known-ones. Therefore unless
Richard Hendersonacd93702016-12-08 12:28:42 -0800904 op->args[2] is constant, we can't infer anything from it. */
Richard Henderson63490392017-06-20 13:43:15 -0700905 if (arg_is_const(op->args[2])) {
906 mask = ~arg_info(op->args[2])->mask;
Richard Henderson23ec69ed2014-01-28 12:03:24 -0800907 goto and_const;
908 }
Richard Henderson63490392017-06-20 13:43:15 -0700909 /* But we certainly know nothing outside args[1] may be set. */
910 mask = arg_info(op->args[1])->mask;
Richard Henderson23ec69ed2014-01-28 12:03:24 -0800911 break;
912
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200913 case INDEX_op_sar_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700914 if (arg_is_const(op->args[2])) {
915 tmp = arg_info(op->args[2])->val & 31;
916 mask = (int32_t)arg_info(op->args[1])->mask >> tmp;
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200917 }
918 break;
919 case INDEX_op_sar_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700920 if (arg_is_const(op->args[2])) {
921 tmp = arg_info(op->args[2])->val & 63;
922 mask = (int64_t)arg_info(op->args[1])->mask >> tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800923 }
924 break;
925
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200926 case INDEX_op_shr_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700927 if (arg_is_const(op->args[2])) {
928 tmp = arg_info(op->args[2])->val & 31;
929 mask = (uint32_t)arg_info(op->args[1])->mask >> tmp;
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200930 }
931 break;
932 case INDEX_op_shr_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700933 if (arg_is_const(op->args[2])) {
934 tmp = arg_info(op->args[2])->val & 63;
935 mask = (uint64_t)arg_info(op->args[1])->mask >> tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800936 }
937 break;
938
Richard Henderson609ad702015-07-24 07:16:00 -0700939 case INDEX_op_extrl_i64_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700940 mask = (uint32_t)arg_info(op->args[1])->mask;
Richard Henderson609ad702015-07-24 07:16:00 -0700941 break;
942 case INDEX_op_extrh_i64_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700943 mask = (uint64_t)arg_info(op->args[1])->mask >> 32;
Richard Henderson4bb7a412013-09-09 17:03:24 -0700944 break;
945
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800946 CASE_OP_32_64(shl):
Richard Henderson63490392017-06-20 13:43:15 -0700947 if (arg_is_const(op->args[2])) {
948 tmp = arg_info(op->args[2])->val & (TCG_TARGET_REG_BITS - 1);
949 mask = arg_info(op->args[1])->mask << tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800950 }
951 break;
952
953 CASE_OP_32_64(neg):
954 /* Set to 1 all bits to the left of the rightmost. */
Richard Henderson63490392017-06-20 13:43:15 -0700955 mask = -(arg_info(op->args[1])->mask
956 & -arg_info(op->args[1])->mask);
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800957 break;
958
959 CASE_OP_32_64(deposit):
Richard Henderson63490392017-06-20 13:43:15 -0700960 mask = deposit64(arg_info(op->args[1])->mask,
961 op->args[3], op->args[4],
962 arg_info(op->args[2])->mask);
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800963 break;
964
Richard Henderson7ec8bab2016-10-14 12:04:32 -0500965 CASE_OP_32_64(extract):
Richard Henderson63490392017-06-20 13:43:15 -0700966 mask = extract64(arg_info(op->args[1])->mask,
967 op->args[2], op->args[3]);
Richard Hendersonacd93702016-12-08 12:28:42 -0800968 if (op->args[2] == 0) {
Richard Henderson63490392017-06-20 13:43:15 -0700969 affected = arg_info(op->args[1])->mask & ~mask;
Richard Henderson7ec8bab2016-10-14 12:04:32 -0500970 }
971 break;
972 CASE_OP_32_64(sextract):
Richard Henderson63490392017-06-20 13:43:15 -0700973 mask = sextract64(arg_info(op->args[1])->mask,
Richard Hendersonacd93702016-12-08 12:28:42 -0800974 op->args[2], op->args[3]);
975 if (op->args[2] == 0 && (tcg_target_long)mask >= 0) {
Richard Henderson63490392017-06-20 13:43:15 -0700976 affected = arg_info(op->args[1])->mask & ~mask;
Richard Henderson7ec8bab2016-10-14 12:04:32 -0500977 }
978 break;
979
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800980 CASE_OP_32_64(or):
981 CASE_OP_32_64(xor):
Richard Henderson63490392017-06-20 13:43:15 -0700982 mask = arg_info(op->args[1])->mask | arg_info(op->args[2])->mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800983 break;
984
Richard Henderson0e28d002016-11-16 09:23:28 +0100985 case INDEX_op_clz_i32:
986 case INDEX_op_ctz_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700987 mask = arg_info(op->args[2])->mask | 31;
Richard Henderson0e28d002016-11-16 09:23:28 +0100988 break;
989
990 case INDEX_op_clz_i64:
991 case INDEX_op_ctz_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700992 mask = arg_info(op->args[2])->mask | 63;
Richard Henderson0e28d002016-11-16 09:23:28 +0100993 break;
994
Richard Hendersona768e4e2016-11-21 11:13:39 +0100995 case INDEX_op_ctpop_i32:
996 mask = 32 | 31;
997 break;
998 case INDEX_op_ctpop_i64:
999 mask = 64 | 63;
1000 break;
1001
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001002 CASE_OP_32_64(setcond):
Richard Hendersona7635512014-04-23 22:18:30 -07001003 case INDEX_op_setcond2_i32:
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001004 mask = 1;
1005 break;
1006
1007 CASE_OP_32_64(movcond):
Richard Henderson63490392017-06-20 13:43:15 -07001008 mask = arg_info(op->args[3])->mask | arg_info(op->args[4])->mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001009 break;
1010
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001011 CASE_OP_32_64(ld8u):
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001012 mask = 0xff;
1013 break;
1014 CASE_OP_32_64(ld16u):
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001015 mask = 0xffff;
1016 break;
1017 case INDEX_op_ld32u_i64:
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001018 mask = 0xffffffffu;
1019 break;
1020
1021 CASE_OP_32_64(qemu_ld):
1022 {
Richard Hendersonacd93702016-12-08 12:28:42 -08001023 TCGMemOpIdx oi = op->args[nb_oargs + nb_iargs];
Tony Nguyen14776ab2019-08-24 04:10:58 +10001024 MemOp mop = get_memop(oi);
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001025 if (!(mop & MO_SIGN)) {
1026 mask = (2ULL << ((8 << (mop & MO_SIZE)) - 1)) - 1;
1027 }
1028 }
1029 break;
1030
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001031 default:
1032 break;
1033 }
1034
Richard Hendersonbc8d6882014-06-08 18:24:14 -07001035 /* 32-bit ops generate 32-bit results. For the result is zero test
1036 below, we can ignore high bits, but for further optimizations we
1037 need to record that the high bits contain garbage. */
Richard Henderson24666ba2014-05-22 11:14:10 -07001038 partmask = mask;
Richard Hendersonbc8d6882014-06-08 18:24:14 -07001039 if (!(def->flags & TCG_OPF_64BIT)) {
Richard Henderson24666ba2014-05-22 11:14:10 -07001040 mask |= ~(tcg_target_ulong)0xffffffffu;
1041 partmask &= 0xffffffffu;
1042 affected &= 0xffffffffu;
Aurelien Jarnof096dc92013-09-03 08:27:38 +02001043 }
1044
Richard Henderson24666ba2014-05-22 11:14:10 -07001045 if (partmask == 0) {
Aurelien Jarnoeabb7b92016-04-21 10:48:49 +02001046 tcg_debug_assert(nb_oargs == 1);
Richard Henderson8fe35e02020-03-30 20:42:43 -07001047 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], 0);
Paolo Bonzini633f6502013-01-11 15:42:53 -08001048 continue;
1049 }
1050 if (affected == 0) {
Aurelien Jarnoeabb7b92016-04-21 10:48:49 +02001051 tcg_debug_assert(nb_oargs == 1);
Richard Hendersonacd93702016-12-08 12:28:42 -08001052 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Paolo Bonzini633f6502013-01-11 15:42:53 -08001053 continue;
1054 }
1055
Aurelien Jarno56e49432012-09-06 16:47:13 +02001056 /* Simplify expression for "op r, a, 0 => movi r, 0" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001057 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001058 CASE_OP_32_64_VEC(and):
1059 CASE_OP_32_64_VEC(mul):
Richard Henderson03271522013-08-14 14:35:56 -07001060 CASE_OP_32_64(muluh):
1061 CASE_OP_32_64(mulsh):
Richard Henderson63490392017-06-20 13:43:15 -07001062 if (arg_is_const(op->args[2])
1063 && arg_info(op->args[2])->val == 0) {
Richard Henderson8fe35e02020-03-30 20:42:43 -07001064 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], 0);
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001065 continue;
1066 }
1067 break;
Aurelien Jarno56e49432012-09-06 16:47:13 +02001068 default:
1069 break;
1070 }
1071
1072 /* Simplify expression for "op r, a, a => mov r, a" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001073 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001074 CASE_OP_32_64_VEC(or):
1075 CASE_OP_32_64_VEC(and):
Richard Henderson63490392017-06-20 13:43:15 -07001076 if (args_are_copies(op->args[1], op->args[2])) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001077 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Kirill Batuzov9a810902011-07-07 16:37:15 +04001078 continue;
1079 }
1080 break;
Blue Swirlfe0de7a2011-07-30 19:18:32 +00001081 default:
1082 break;
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001083 }
1084
Aurelien Jarno3c941932012-09-18 19:12:36 +02001085 /* Simplify expression for "op r, a, a => movi r, 0" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001086 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001087 CASE_OP_32_64_VEC(andc):
1088 CASE_OP_32_64_VEC(sub):
1089 CASE_OP_32_64_VEC(xor):
Richard Henderson63490392017-06-20 13:43:15 -07001090 if (args_are_copies(op->args[1], op->args[2])) {
Richard Henderson8fe35e02020-03-30 20:42:43 -07001091 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], 0);
Aurelien Jarno3c941932012-09-18 19:12:36 +02001092 continue;
1093 }
1094 break;
1095 default:
1096 break;
1097 }
1098
Kirill Batuzov22613af2011-07-07 16:37:13 +04001099 /* Propagate constants through copy operations and do constant
1100 folding. Constants will be substituted to arguments by register
1101 allocator where needed and possible. Also detect copies. */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001102 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001103 CASE_OP_32_64_VEC(mov):
Richard Hendersonacd93702016-12-08 12:28:42 -08001104 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +02001105 break;
Kirill Batuzov22613af2011-07-07 16:37:13 +04001106 CASE_OP_32_64(movi):
Richard Henderson170ba882017-11-22 09:07:11 +01001107 case INDEX_op_dupi_vec:
Richard Henderson8fe35e02020-03-30 20:42:43 -07001108 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], op->args[1]);
Kirill Batuzov22613af2011-07-07 16:37:13 +04001109 break;
Richard Henderson6e14e912012-10-02 11:32:24 -07001110
Richard Henderson170ba882017-11-22 09:07:11 +01001111 case INDEX_op_dup_vec:
1112 if (arg_is_const(op->args[1])) {
1113 tmp = arg_info(op->args[1])->val;
1114 tmp = dup_const(TCGOP_VECE(op), tmp);
Richard Henderson8fe35e02020-03-30 20:42:43 -07001115 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
Richard Henderson1fb57da72018-08-05 16:32:58 -07001116 break;
Richard Henderson170ba882017-11-22 09:07:11 +01001117 }
Richard Henderson1fb57da72018-08-05 16:32:58 -07001118 goto do_default;
Richard Henderson170ba882017-11-22 09:07:11 +01001119
Richard Henderson1dc4fe72020-09-05 17:03:35 -07001120 case INDEX_op_dup2_vec:
1121 assert(TCG_TARGET_REG_BITS == 32);
1122 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
1123 tmp = arg_info(op->args[1])->val;
1124 if (tmp == arg_info(op->args[2])->val) {
Richard Henderson8fe35e02020-03-30 20:42:43 -07001125 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
Richard Henderson1dc4fe72020-09-05 17:03:35 -07001126 break;
1127 }
1128 } else if (args_are_copies(op->args[1], op->args[2])) {
1129 op->opc = INDEX_op_dup_vec;
1130 TCGOP_VECE(op) = MO_32;
1131 nb_iargs = 1;
1132 }
1133 goto do_default;
1134
Kirill Batuzova640f032011-07-07 16:37:17 +04001135 CASE_OP_32_64(not):
Richard Hendersoncb25c802011-08-17 14:11:47 -07001136 CASE_OP_32_64(neg):
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001137 CASE_OP_32_64(ext8s):
1138 CASE_OP_32_64(ext8u):
1139 CASE_OP_32_64(ext16s):
1140 CASE_OP_32_64(ext16u):
Richard Hendersona768e4e2016-11-21 11:13:39 +01001141 CASE_OP_32_64(ctpop):
Richard Henderson64985942018-11-20 08:53:34 +01001142 CASE_OP_32_64(bswap16):
1143 CASE_OP_32_64(bswap32):
1144 case INDEX_op_bswap64_i64:
Kirill Batuzova640f032011-07-07 16:37:17 +04001145 case INDEX_op_ext32s_i64:
1146 case INDEX_op_ext32u_i64:
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +02001147 case INDEX_op_ext_i32_i64:
1148 case INDEX_op_extu_i32_i64:
Richard Henderson609ad702015-07-24 07:16:00 -07001149 case INDEX_op_extrl_i64_i32:
1150 case INDEX_op_extrh_i64_i32:
Richard Henderson63490392017-06-20 13:43:15 -07001151 if (arg_is_const(op->args[1])) {
1152 tmp = do_constant_folding(opc, arg_info(op->args[1])->val, 0);
Richard Henderson8fe35e02020-03-30 20:42:43 -07001153 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
Richard Henderson6e14e912012-10-02 11:32:24 -07001154 break;
Kirill Batuzova640f032011-07-07 16:37:17 +04001155 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001156 goto do_default;
1157
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001158 CASE_OP_32_64(add):
1159 CASE_OP_32_64(sub):
1160 CASE_OP_32_64(mul):
Kirill Batuzov9a810902011-07-07 16:37:15 +04001161 CASE_OP_32_64(or):
1162 CASE_OP_32_64(and):
1163 CASE_OP_32_64(xor):
Kirill Batuzov55c09752011-07-07 16:37:16 +04001164 CASE_OP_32_64(shl):
1165 CASE_OP_32_64(shr):
1166 CASE_OP_32_64(sar):
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001167 CASE_OP_32_64(rotl):
1168 CASE_OP_32_64(rotr):
Richard Hendersoncb25c802011-08-17 14:11:47 -07001169 CASE_OP_32_64(andc):
1170 CASE_OP_32_64(orc):
1171 CASE_OP_32_64(eqv):
1172 CASE_OP_32_64(nand):
1173 CASE_OP_32_64(nor):
Richard Henderson03271522013-08-14 14:35:56 -07001174 CASE_OP_32_64(muluh):
1175 CASE_OP_32_64(mulsh):
Richard Henderson01547f72013-08-14 15:22:46 -07001176 CASE_OP_32_64(div):
1177 CASE_OP_32_64(divu):
1178 CASE_OP_32_64(rem):
1179 CASE_OP_32_64(remu):
Richard Henderson63490392017-06-20 13:43:15 -07001180 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
1181 tmp = do_constant_folding(opc, arg_info(op->args[1])->val,
1182 arg_info(op->args[2])->val);
Richard Henderson8fe35e02020-03-30 20:42:43 -07001183 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
Richard Henderson6e14e912012-10-02 11:32:24 -07001184 break;
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001185 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001186 goto do_default;
1187
Richard Henderson0e28d002016-11-16 09:23:28 +01001188 CASE_OP_32_64(clz):
1189 CASE_OP_32_64(ctz):
Richard Henderson63490392017-06-20 13:43:15 -07001190 if (arg_is_const(op->args[1])) {
1191 TCGArg v = arg_info(op->args[1])->val;
Richard Henderson0e28d002016-11-16 09:23:28 +01001192 if (v != 0) {
1193 tmp = do_constant_folding(opc, v, 0);
Richard Henderson8fe35e02020-03-30 20:42:43 -07001194 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
Richard Henderson0e28d002016-11-16 09:23:28 +01001195 } else {
Richard Hendersonacd93702016-12-08 12:28:42 -08001196 tcg_opt_gen_mov(s, op, op->args[0], op->args[2]);
Richard Henderson0e28d002016-11-16 09:23:28 +01001197 }
1198 break;
1199 }
1200 goto do_default;
1201
Aurelien Jarno7ef55fc2012-09-21 11:07:29 +02001202 CASE_OP_32_64(deposit):
Richard Henderson63490392017-06-20 13:43:15 -07001203 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
1204 tmp = deposit64(arg_info(op->args[1])->val,
1205 op->args[3], op->args[4],
1206 arg_info(op->args[2])->val);
Richard Henderson8fe35e02020-03-30 20:42:43 -07001207 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
Richard Henderson6e14e912012-10-02 11:32:24 -07001208 break;
Aurelien Jarno7ef55fc2012-09-21 11:07:29 +02001209 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001210 goto do_default;
1211
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001212 CASE_OP_32_64(extract):
Richard Henderson63490392017-06-20 13:43:15 -07001213 if (arg_is_const(op->args[1])) {
1214 tmp = extract64(arg_info(op->args[1])->val,
Richard Hendersonacd93702016-12-08 12:28:42 -08001215 op->args[2], op->args[3]);
Richard Henderson8fe35e02020-03-30 20:42:43 -07001216 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001217 break;
1218 }
1219 goto do_default;
1220
1221 CASE_OP_32_64(sextract):
Richard Henderson63490392017-06-20 13:43:15 -07001222 if (arg_is_const(op->args[1])) {
1223 tmp = sextract64(arg_info(op->args[1])->val,
Richard Hendersonacd93702016-12-08 12:28:42 -08001224 op->args[2], op->args[3]);
Richard Henderson8fe35e02020-03-30 20:42:43 -07001225 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001226 break;
1227 }
1228 goto do_default;
1229
Richard Hendersonfce12962019-02-25 10:29:25 -08001230 CASE_OP_32_64(extract2):
1231 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
Richard Henderson54795542020-09-06 16:21:32 -07001232 uint64_t v1 = arg_info(op->args[1])->val;
1233 uint64_t v2 = arg_info(op->args[2])->val;
1234 int shr = op->args[3];
Richard Hendersonfce12962019-02-25 10:29:25 -08001235
1236 if (opc == INDEX_op_extract2_i64) {
Richard Henderson54795542020-09-06 16:21:32 -07001237 tmp = (v1 >> shr) | (v2 << (64 - shr));
Richard Hendersonfce12962019-02-25 10:29:25 -08001238 } else {
Richard Henderson54795542020-09-06 16:21:32 -07001239 tmp = (int32_t)(((uint32_t)v1 >> shr) |
1240 ((uint32_t)v2 << (32 - shr)));
Richard Hendersonfce12962019-02-25 10:29:25 -08001241 }
Richard Henderson8fe35e02020-03-30 20:42:43 -07001242 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
Richard Hendersonfce12962019-02-25 10:29:25 -08001243 break;
1244 }
1245 goto do_default;
1246
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +02001247 CASE_OP_32_64(setcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001248 tmp = do_constant_folding_cond(opc, op->args[1],
1249 op->args[2], op->args[3]);
Aurelien Jarnob336ceb2012-09-18 19:37:00 +02001250 if (tmp != 2) {
Richard Henderson8fe35e02020-03-30 20:42:43 -07001251 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
Richard Henderson6e14e912012-10-02 11:32:24 -07001252 break;
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +02001253 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001254 goto do_default;
1255
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001256 CASE_OP_32_64(brcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001257 tmp = do_constant_folding_cond(opc, op->args[0],
1258 op->args[1], op->args[2]);
Aurelien Jarnob336ceb2012-09-18 19:37:00 +02001259 if (tmp != 2) {
1260 if (tmp) {
Richard Henderson8fe35e02020-03-30 20:42:43 -07001261 memset(&temps_used, 0, sizeof(temps_used));
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001262 op->opc = INDEX_op_br;
Richard Hendersonacd93702016-12-08 12:28:42 -08001263 op->args[0] = op->args[3];
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001264 } else {
Richard Henderson0c627cd2014-03-30 16:51:54 -07001265 tcg_op_remove(s, op);
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001266 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001267 break;
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001268 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001269 goto do_default;
1270
Richard Hendersonfa01a202012-09-21 10:13:37 -07001271 CASE_OP_32_64(movcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001272 tmp = do_constant_folding_cond(opc, op->args[1],
1273 op->args[2], op->args[5]);
Aurelien Jarnob336ceb2012-09-18 19:37:00 +02001274 if (tmp != 2) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001275 tcg_opt_gen_mov(s, op, op->args[0], op->args[4-tmp]);
Richard Henderson6e14e912012-10-02 11:32:24 -07001276 break;
Richard Hendersonfa01a202012-09-21 10:13:37 -07001277 }
Richard Henderson63490392017-06-20 13:43:15 -07001278 if (arg_is_const(op->args[3]) && arg_is_const(op->args[4])) {
Richard Henderson54795542020-09-06 16:21:32 -07001279 uint64_t tv = arg_info(op->args[3])->val;
1280 uint64_t fv = arg_info(op->args[4])->val;
Richard Hendersonacd93702016-12-08 12:28:42 -08001281 TCGCond cond = op->args[5];
Richard Henderson54795542020-09-06 16:21:32 -07001282
Richard Henderson333b21b2016-10-23 20:44:32 -07001283 if (fv == 1 && tv == 0) {
1284 cond = tcg_invert_cond(cond);
1285 } else if (!(tv == 1 && fv == 0)) {
1286 goto do_default;
1287 }
Richard Hendersonacd93702016-12-08 12:28:42 -08001288 op->args[3] = cond;
Richard Henderson333b21b2016-10-23 20:44:32 -07001289 op->opc = opc = (opc == INDEX_op_movcond_i32
1290 ? INDEX_op_setcond_i32
1291 : INDEX_op_setcond_i64);
1292 nb_iargs = 2;
1293 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001294 goto do_default;
1295
Richard Henderson212c3282012-10-02 11:32:28 -07001296 case INDEX_op_add2_i32:
1297 case INDEX_op_sub2_i32:
Richard Henderson63490392017-06-20 13:43:15 -07001298 if (arg_is_const(op->args[2]) && arg_is_const(op->args[3])
1299 && arg_is_const(op->args[4]) && arg_is_const(op->args[5])) {
1300 uint32_t al = arg_info(op->args[2])->val;
1301 uint32_t ah = arg_info(op->args[3])->val;
1302 uint32_t bl = arg_info(op->args[4])->val;
1303 uint32_t bh = arg_info(op->args[5])->val;
Richard Henderson212c3282012-10-02 11:32:28 -07001304 uint64_t a = ((uint64_t)ah << 32) | al;
1305 uint64_t b = ((uint64_t)bh << 32) | bl;
1306 TCGArg rl, rh;
Richard Henderson8fe35e02020-03-30 20:42:43 -07001307 TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_mov_i32);
Richard Henderson212c3282012-10-02 11:32:28 -07001308
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001309 if (opc == INDEX_op_add2_i32) {
Richard Henderson212c3282012-10-02 11:32:28 -07001310 a += b;
1311 } else {
1312 a -= b;
1313 }
1314
Richard Hendersonacd93702016-12-08 12:28:42 -08001315 rl = op->args[0];
1316 rh = op->args[1];
Richard Henderson8fe35e02020-03-30 20:42:43 -07001317 tcg_opt_gen_movi(s, &temps_used, op, rl, (int32_t)a);
1318 tcg_opt_gen_movi(s, &temps_used, op2, rh, (int32_t)(a >> 32));
Richard Henderson212c3282012-10-02 11:32:28 -07001319 break;
1320 }
1321 goto do_default;
1322
Richard Henderson14149682012-10-02 11:32:30 -07001323 case INDEX_op_mulu2_i32:
Richard Henderson63490392017-06-20 13:43:15 -07001324 if (arg_is_const(op->args[2]) && arg_is_const(op->args[3])) {
1325 uint32_t a = arg_info(op->args[2])->val;
1326 uint32_t b = arg_info(op->args[3])->val;
Richard Henderson14149682012-10-02 11:32:30 -07001327 uint64_t r = (uint64_t)a * b;
1328 TCGArg rl, rh;
Richard Henderson8fe35e02020-03-30 20:42:43 -07001329 TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_mov_i32);
Richard Henderson14149682012-10-02 11:32:30 -07001330
Richard Hendersonacd93702016-12-08 12:28:42 -08001331 rl = op->args[0];
1332 rh = op->args[1];
Richard Henderson8fe35e02020-03-30 20:42:43 -07001333 tcg_opt_gen_movi(s, &temps_used, op, rl, (int32_t)r);
1334 tcg_opt_gen_movi(s, &temps_used, op2, rh, (int32_t)(r >> 32));
Richard Henderson14149682012-10-02 11:32:30 -07001335 break;
1336 }
1337 goto do_default;
1338
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001339 case INDEX_op_brcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -08001340 tmp = do_constant_folding_cond2(&op->args[0], &op->args[2],
1341 op->args[4]);
Richard Henderson6c4382f2012-10-02 11:32:27 -07001342 if (tmp != 2) {
1343 if (tmp) {
Richard Hendersona7635512014-04-23 22:18:30 -07001344 do_brcond_true:
Richard Henderson8fe35e02020-03-30 20:42:43 -07001345 memset(&temps_used, 0, sizeof(temps_used));
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001346 op->opc = INDEX_op_br;
Richard Hendersonacd93702016-12-08 12:28:42 -08001347 op->args[0] = op->args[5];
Richard Henderson6c4382f2012-10-02 11:32:27 -07001348 } else {
Richard Hendersona7635512014-04-23 22:18:30 -07001349 do_brcond_false:
Richard Henderson0c627cd2014-03-30 16:51:54 -07001350 tcg_op_remove(s, op);
Richard Henderson6c4382f2012-10-02 11:32:27 -07001351 }
Richard Hendersonacd93702016-12-08 12:28:42 -08001352 } else if ((op->args[4] == TCG_COND_LT
1353 || op->args[4] == TCG_COND_GE)
Richard Henderson63490392017-06-20 13:43:15 -07001354 && arg_is_const(op->args[2])
1355 && arg_info(op->args[2])->val == 0
1356 && arg_is_const(op->args[3])
1357 && arg_info(op->args[3])->val == 0) {
Richard Henderson6c4382f2012-10-02 11:32:27 -07001358 /* Simplify LT/GE comparisons vs zero to a single compare
1359 vs the high word of the input. */
Richard Hendersona7635512014-04-23 22:18:30 -07001360 do_brcond_high:
Richard Henderson8fe35e02020-03-30 20:42:43 -07001361 memset(&temps_used, 0, sizeof(temps_used));
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001362 op->opc = INDEX_op_brcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001363 op->args[0] = op->args[1];
1364 op->args[1] = op->args[3];
1365 op->args[2] = op->args[4];
1366 op->args[3] = op->args[5];
1367 } else if (op->args[4] == TCG_COND_EQ) {
Richard Hendersona7635512014-04-23 22:18:30 -07001368 /* Simplify EQ comparisons where one of the pairs
1369 can be simplified. */
1370 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001371 op->args[0], op->args[2],
1372 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001373 if (tmp == 0) {
1374 goto do_brcond_false;
1375 } else if (tmp == 1) {
1376 goto do_brcond_high;
1377 }
1378 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001379 op->args[1], op->args[3],
1380 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001381 if (tmp == 0) {
1382 goto do_brcond_false;
1383 } else if (tmp != 1) {
1384 goto do_default;
1385 }
1386 do_brcond_low:
Richard Henderson8fe35e02020-03-30 20:42:43 -07001387 memset(&temps_used, 0, sizeof(temps_used));
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001388 op->opc = INDEX_op_brcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001389 op->args[1] = op->args[2];
1390 op->args[2] = op->args[4];
1391 op->args[3] = op->args[5];
1392 } else if (op->args[4] == TCG_COND_NE) {
Richard Hendersona7635512014-04-23 22:18:30 -07001393 /* Simplify NE comparisons where one of the pairs
1394 can be simplified. */
1395 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001396 op->args[0], op->args[2],
1397 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001398 if (tmp == 0) {
1399 goto do_brcond_high;
1400 } else if (tmp == 1) {
1401 goto do_brcond_true;
1402 }
1403 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001404 op->args[1], op->args[3],
1405 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001406 if (tmp == 0) {
1407 goto do_brcond_low;
1408 } else if (tmp == 1) {
1409 goto do_brcond_true;
1410 }
1411 goto do_default;
Richard Henderson6c4382f2012-10-02 11:32:27 -07001412 } else {
1413 goto do_default;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001414 }
Richard Henderson6c4382f2012-10-02 11:32:27 -07001415 break;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001416
1417 case INDEX_op_setcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -08001418 tmp = do_constant_folding_cond2(&op->args[1], &op->args[3],
1419 op->args[5]);
Richard Henderson6c4382f2012-10-02 11:32:27 -07001420 if (tmp != 2) {
Richard Hendersona7635512014-04-23 22:18:30 -07001421 do_setcond_const:
Richard Henderson8fe35e02020-03-30 20:42:43 -07001422 tcg_opt_gen_movi(s, &temps_used, op, op->args[0], tmp);
Richard Hendersonacd93702016-12-08 12:28:42 -08001423 } else if ((op->args[5] == TCG_COND_LT
1424 || op->args[5] == TCG_COND_GE)
Richard Henderson63490392017-06-20 13:43:15 -07001425 && arg_is_const(op->args[3])
1426 && arg_info(op->args[3])->val == 0
1427 && arg_is_const(op->args[4])
1428 && arg_info(op->args[4])->val == 0) {
Richard Henderson6c4382f2012-10-02 11:32:27 -07001429 /* Simplify LT/GE comparisons vs zero to a single compare
1430 vs the high word of the input. */
Richard Hendersona7635512014-04-23 22:18:30 -07001431 do_setcond_high:
Richard Hendersonacd93702016-12-08 12:28:42 -08001432 reset_temp(op->args[0]);
Richard Henderson63490392017-06-20 13:43:15 -07001433 arg_info(op->args[0])->mask = 1;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001434 op->opc = INDEX_op_setcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001435 op->args[1] = op->args[2];
1436 op->args[2] = op->args[4];
1437 op->args[3] = op->args[5];
1438 } else if (op->args[5] == TCG_COND_EQ) {
Richard Hendersona7635512014-04-23 22:18:30 -07001439 /* Simplify EQ comparisons where one of the pairs
1440 can be simplified. */
1441 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001442 op->args[1], op->args[3],
1443 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001444 if (tmp == 0) {
1445 goto do_setcond_const;
1446 } else if (tmp == 1) {
1447 goto do_setcond_high;
1448 }
1449 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001450 op->args[2], op->args[4],
1451 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001452 if (tmp == 0) {
1453 goto do_setcond_high;
1454 } else if (tmp != 1) {
1455 goto do_default;
1456 }
1457 do_setcond_low:
Richard Hendersonacd93702016-12-08 12:28:42 -08001458 reset_temp(op->args[0]);
Richard Henderson63490392017-06-20 13:43:15 -07001459 arg_info(op->args[0])->mask = 1;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001460 op->opc = INDEX_op_setcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001461 op->args[2] = op->args[3];
1462 op->args[3] = op->args[5];
1463 } else if (op->args[5] == TCG_COND_NE) {
Richard Hendersona7635512014-04-23 22:18:30 -07001464 /* Simplify NE comparisons where one of the pairs
1465 can be simplified. */
1466 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001467 op->args[1], op->args[3],
1468 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001469 if (tmp == 0) {
1470 goto do_setcond_high;
1471 } else if (tmp == 1) {
1472 goto do_setcond_const;
1473 }
1474 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001475 op->args[2], op->args[4],
1476 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001477 if (tmp == 0) {
1478 goto do_setcond_low;
1479 } else if (tmp == 1) {
1480 goto do_setcond_const;
1481 }
1482 goto do_default;
Richard Henderson6c4382f2012-10-02 11:32:27 -07001483 } else {
1484 goto do_default;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001485 }
Richard Henderson6c4382f2012-10-02 11:32:27 -07001486 break;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001487
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001488 case INDEX_op_call:
Richard Hendersonacd93702016-12-08 12:28:42 -08001489 if (!(op->args[nb_oargs + nb_iargs + 1]
Richard Hendersoncf066672014-03-22 20:06:52 -07001490 & (TCG_CALL_NO_READ_GLOBALS | TCG_CALL_NO_WRITE_GLOBALS))) {
Kirill Batuzov22613af2011-07-07 16:37:13 +04001491 for (i = 0; i < nb_globals; i++) {
Aurelien Jarno1208d7d2015-07-27 12:41:44 +02001492 if (test_bit(i, temps_used.l)) {
Richard Henderson63490392017-06-20 13:43:15 -07001493 reset_ts(&s->temps[i]);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +02001494 }
Kirill Batuzov22613af2011-07-07 16:37:13 +04001495 }
1496 }
Richard Hendersonc56caea2020-11-03 13:20:21 -08001497 goto do_reset_output;
Richard Henderson6e14e912012-10-02 11:32:24 -07001498
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001499 default:
Richard Henderson6e14e912012-10-02 11:32:24 -07001500 do_default:
Richard Hendersonc56caea2020-11-03 13:20:21 -08001501 /* Default case: we know nothing about operation (or were unable
1502 to compute the operation result) so no propagation is done.
1503 We trash everything if the operation is the end of a basic
1504 block, otherwise we only trash the output args. "mask" is
1505 the non-zero bits mask for the first output arg. */
1506 if (def->flags & TCG_OPF_BB_END) {
Richard Henderson8fe35e02020-03-30 20:42:43 -07001507 memset(&temps_used, 0, sizeof(temps_used));
Richard Hendersonc56caea2020-11-03 13:20:21 -08001508 } else {
1509 do_reset_output:
1510 for (i = 0; i < nb_oargs; i++) {
1511 reset_temp(op->args[i]);
1512 /* Save the corresponding known-zero bits mask for the
1513 first output argument (only one supported so far). */
1514 if (i == 0) {
1515 arg_info(op->args[i])->mask = mask;
1516 }
Aurelien Jarnoa2550662012-09-19 21:40:30 +02001517 }
Kirill Batuzov22613af2011-07-07 16:37:13 +04001518 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001519 break;
1520 }
Pranith Kumar34f93922016-08-23 09:48:25 -04001521
1522 /* Eliminate duplicate and redundant fence instructions. */
Richard Hendersonacd93702016-12-08 12:28:42 -08001523 if (prev_mb) {
Pranith Kumar34f93922016-08-23 09:48:25 -04001524 switch (opc) {
1525 case INDEX_op_mb:
1526 /* Merge two barriers of the same type into one,
1527 * or a weaker barrier into a stronger one,
1528 * or two weaker barriers into a stronger one.
1529 * mb X; mb Y => mb X|Y
1530 * mb; strl => mb; st
1531 * ldaq; mb => ld; mb
1532 * ldaq; strl => ld; mb; st
1533 * Other combinations are also merged into a strong
1534 * barrier. This is stricter than specified but for
1535 * the purposes of TCG is better than not optimizing.
1536 */
Richard Hendersonacd93702016-12-08 12:28:42 -08001537 prev_mb->args[0] |= op->args[0];
Pranith Kumar34f93922016-08-23 09:48:25 -04001538 tcg_op_remove(s, op);
1539 break;
1540
1541 default:
1542 /* Opcodes that end the block stop the optimization. */
1543 if ((def->flags & TCG_OPF_BB_END) == 0) {
1544 break;
1545 }
1546 /* fallthru */
1547 case INDEX_op_qemu_ld_i32:
1548 case INDEX_op_qemu_ld_i64:
1549 case INDEX_op_qemu_st_i32:
Richard Henderson07ce0b02020-12-09 13:58:39 -06001550 case INDEX_op_qemu_st8_i32:
Pranith Kumar34f93922016-08-23 09:48:25 -04001551 case INDEX_op_qemu_st_i64:
1552 case INDEX_op_call:
1553 /* Opcodes that touch guest memory stop the optimization. */
Richard Hendersonacd93702016-12-08 12:28:42 -08001554 prev_mb = NULL;
Pranith Kumar34f93922016-08-23 09:48:25 -04001555 break;
1556 }
1557 } else if (opc == INDEX_op_mb) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001558 prev_mb = op;
Pranith Kumar34f93922016-08-23 09:48:25 -04001559 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001560 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001561}