blob: 627a5b39f69e45346333b6bcb7769fa7d7ca7dc5 [file] [log] [blame]
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001/*
2 * Optimizations for Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2010 Samsung Electronics.
5 * Contributed by Kirill Batuzov <batuzovk@ispras.ru>
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25
Peter Maydell757e7252016-01-26 18:17:08 +000026#include "qemu/osdep.h"
Philippe Mathieu-Daudédcb32f12020-01-01 12:23:00 +010027#include "tcg/tcg-op.h"
Richard Henderson90163902021-03-18 10:21:45 -060028#include "tcg-internal.h"
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040029
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040030#define CASE_OP_32_64(x) \
31 glue(glue(case INDEX_op_, x), _i32): \
32 glue(glue(case INDEX_op_, x), _i64)
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040033
Richard Henderson170ba882017-11-22 09:07:11 +010034#define CASE_OP_32_64_VEC(x) \
35 glue(glue(case INDEX_op_, x), _i32): \
36 glue(glue(case INDEX_op_, x), _i64): \
37 glue(glue(case INDEX_op_, x), _vec)
38
Richard Henderson6fcb98e2020-03-30 17:44:30 -070039typedef struct TempOptInfo {
Aurelien Jarnob41059d2015-07-27 12:41:44 +020040 bool is_const;
Richard Henderson63490392017-06-20 13:43:15 -070041 TCGTemp *prev_copy;
42 TCGTemp *next_copy;
Richard Henderson54795542020-09-06 16:21:32 -070043 uint64_t val;
Richard Hendersonb1fde412021-08-23 13:07:49 -070044 uint64_t z_mask; /* mask bit is 0 if and only if value bit is 0 */
Richard Henderson6fcb98e2020-03-30 17:44:30 -070045} TempOptInfo;
Kirill Batuzov22613af2011-07-07 16:37:13 +040046
Richard Henderson3b3f8472021-08-23 22:06:31 -070047typedef struct OptContext {
Richard Hendersondc849882021-08-24 07:13:45 -070048 TCGContext *tcg;
Richard Henderson3b3f8472021-08-23 22:06:31 -070049 TCGTempSet temps_used;
50} OptContext;
51
Richard Henderson6fcb98e2020-03-30 17:44:30 -070052static inline TempOptInfo *ts_info(TCGTemp *ts)
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020053{
Richard Henderson63490392017-06-20 13:43:15 -070054 return ts->state_ptr;
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020055}
56
Richard Henderson6fcb98e2020-03-30 17:44:30 -070057static inline TempOptInfo *arg_info(TCGArg arg)
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020058{
Richard Henderson63490392017-06-20 13:43:15 -070059 return ts_info(arg_temp(arg));
60}
61
62static inline bool ts_is_const(TCGTemp *ts)
63{
64 return ts_info(ts)->is_const;
65}
66
67static inline bool arg_is_const(TCGArg arg)
68{
69 return ts_is_const(arg_temp(arg));
70}
71
72static inline bool ts_is_copy(TCGTemp *ts)
73{
74 return ts_info(ts)->next_copy != ts;
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020075}
76
Aurelien Jarnob41059d2015-07-27 12:41:44 +020077/* Reset TEMP's state, possibly removing the temp for the list of copies. */
Richard Henderson63490392017-06-20 13:43:15 -070078static void reset_ts(TCGTemp *ts)
Kirill Batuzov22613af2011-07-07 16:37:13 +040079{
Richard Henderson6fcb98e2020-03-30 17:44:30 -070080 TempOptInfo *ti = ts_info(ts);
81 TempOptInfo *pi = ts_info(ti->prev_copy);
82 TempOptInfo *ni = ts_info(ti->next_copy);
Richard Henderson63490392017-06-20 13:43:15 -070083
84 ni->prev_copy = ti->prev_copy;
85 pi->next_copy = ti->next_copy;
86 ti->next_copy = ts;
87 ti->prev_copy = ts;
88 ti->is_const = false;
Richard Hendersonb1fde412021-08-23 13:07:49 -070089 ti->z_mask = -1;
Richard Henderson63490392017-06-20 13:43:15 -070090}
91
92static void reset_temp(TCGArg arg)
93{
94 reset_ts(arg_temp(arg));
Kirill Batuzov22613af2011-07-07 16:37:13 +040095}
96
Aurelien Jarno1208d7d2015-07-27 12:41:44 +020097/* Initialize and activate a temporary. */
Richard Henderson3b3f8472021-08-23 22:06:31 -070098static void init_ts_info(OptContext *ctx, TCGTemp *ts)
Aurelien Jarno1208d7d2015-07-27 12:41:44 +020099{
Richard Henderson63490392017-06-20 13:43:15 -0700100 size_t idx = temp_idx(ts);
Richard Henderson8f17a972020-03-30 19:52:02 -0700101 TempOptInfo *ti;
Richard Henderson63490392017-06-20 13:43:15 -0700102
Richard Henderson3b3f8472021-08-23 22:06:31 -0700103 if (test_bit(idx, ctx->temps_used.l)) {
Richard Henderson8f17a972020-03-30 19:52:02 -0700104 return;
105 }
Richard Henderson3b3f8472021-08-23 22:06:31 -0700106 set_bit(idx, ctx->temps_used.l);
Richard Henderson8f17a972020-03-30 19:52:02 -0700107
108 ti = ts->state_ptr;
109 if (ti == NULL) {
110 ti = tcg_malloc(sizeof(TempOptInfo));
Richard Henderson63490392017-06-20 13:43:15 -0700111 ts->state_ptr = ti;
Richard Henderson8f17a972020-03-30 19:52:02 -0700112 }
113
114 ti->next_copy = ts;
115 ti->prev_copy = ts;
116 if (ts->kind == TEMP_CONST) {
117 ti->is_const = true;
118 ti->val = ts->val;
Richard Hendersonb1fde412021-08-23 13:07:49 -0700119 ti->z_mask = ts->val;
Richard Henderson8f17a972020-03-30 19:52:02 -0700120 if (TCG_TARGET_REG_BITS > 32 && ts->type == TCG_TYPE_I32) {
121 /* High bits of a 32-bit quantity are garbage. */
Richard Hendersonb1fde412021-08-23 13:07:49 -0700122 ti->z_mask |= ~0xffffffffull;
Richard Hendersonc0522132020-03-29 18:55:52 -0700123 }
Richard Henderson8f17a972020-03-30 19:52:02 -0700124 } else {
125 ti->is_const = false;
Richard Hendersonb1fde412021-08-23 13:07:49 -0700126 ti->z_mask = -1;
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200127 }
128}
129
Richard Henderson3b3f8472021-08-23 22:06:31 -0700130static void init_arg_info(OptContext *ctx, TCGArg arg)
Richard Henderson63490392017-06-20 13:43:15 -0700131{
Richard Henderson3b3f8472021-08-23 22:06:31 -0700132 init_ts_info(ctx, arg_temp(arg));
Richard Henderson63490392017-06-20 13:43:15 -0700133}
134
Richard Henderson63490392017-06-20 13:43:15 -0700135static TCGTemp *find_better_copy(TCGContext *s, TCGTemp *ts)
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200136{
Richard Henderson4c868ce2020-04-23 09:02:23 -0700137 TCGTemp *i, *g, *l;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200138
Richard Henderson4c868ce2020-04-23 09:02:23 -0700139 /* If this is already readonly, we can't do better. */
140 if (temp_readonly(ts)) {
Richard Henderson63490392017-06-20 13:43:15 -0700141 return ts;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200142 }
143
Richard Henderson4c868ce2020-04-23 09:02:23 -0700144 g = l = NULL;
Richard Henderson63490392017-06-20 13:43:15 -0700145 for (i = ts_info(ts)->next_copy; i != ts; i = ts_info(i)->next_copy) {
Richard Henderson4c868ce2020-04-23 09:02:23 -0700146 if (temp_readonly(i)) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200147 return i;
Richard Henderson4c868ce2020-04-23 09:02:23 -0700148 } else if (i->kind > ts->kind) {
149 if (i->kind == TEMP_GLOBAL) {
150 g = i;
151 } else if (i->kind == TEMP_LOCAL) {
152 l = i;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200153 }
154 }
155 }
156
Richard Henderson4c868ce2020-04-23 09:02:23 -0700157 /* If we didn't find a better representation, return the same temp. */
158 return g ? g : l ? l : ts;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200159}
160
Richard Henderson63490392017-06-20 13:43:15 -0700161static bool ts_are_copies(TCGTemp *ts1, TCGTemp *ts2)
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200162{
Richard Henderson63490392017-06-20 13:43:15 -0700163 TCGTemp *i;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200164
Richard Henderson63490392017-06-20 13:43:15 -0700165 if (ts1 == ts2) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200166 return true;
167 }
168
Richard Henderson63490392017-06-20 13:43:15 -0700169 if (!ts_is_copy(ts1) || !ts_is_copy(ts2)) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200170 return false;
171 }
172
Richard Henderson63490392017-06-20 13:43:15 -0700173 for (i = ts_info(ts1)->next_copy; i != ts1; i = ts_info(i)->next_copy) {
174 if (i == ts2) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200175 return true;
176 }
177 }
178
179 return false;
180}
181
Richard Henderson63490392017-06-20 13:43:15 -0700182static bool args_are_copies(TCGArg arg1, TCGArg arg2)
183{
184 return ts_are_copies(arg_temp(arg1), arg_temp(arg2));
185}
186
Richard Hendersondc849882021-08-24 07:13:45 -0700187static void tcg_opt_gen_mov(OptContext *ctx, TCGOp *op, TCGArg dst, TCGArg src)
Kirill Batuzov22613af2011-07-07 16:37:13 +0400188{
Richard Henderson63490392017-06-20 13:43:15 -0700189 TCGTemp *dst_ts = arg_temp(dst);
190 TCGTemp *src_ts = arg_temp(src);
Richard Henderson170ba882017-11-22 09:07:11 +0100191 const TCGOpDef *def;
Richard Henderson6fcb98e2020-03-30 17:44:30 -0700192 TempOptInfo *di;
193 TempOptInfo *si;
Richard Hendersonb1fde412021-08-23 13:07:49 -0700194 uint64_t z_mask;
Richard Henderson63490392017-06-20 13:43:15 -0700195 TCGOpcode new_op;
196
197 if (ts_are_copies(dst_ts, src_ts)) {
Richard Hendersondc849882021-08-24 07:13:45 -0700198 tcg_op_remove(ctx->tcg, op);
Aurelien Jarno53657182015-06-04 21:53:25 +0200199 return;
200 }
201
Richard Henderson63490392017-06-20 13:43:15 -0700202 reset_ts(dst_ts);
203 di = ts_info(dst_ts);
204 si = ts_info(src_ts);
Richard Henderson170ba882017-11-22 09:07:11 +0100205 def = &tcg_op_defs[op->opc];
206 if (def->flags & TCG_OPF_VECTOR) {
207 new_op = INDEX_op_mov_vec;
208 } else if (def->flags & TCG_OPF_64BIT) {
209 new_op = INDEX_op_mov_i64;
210 } else {
211 new_op = INDEX_op_mov_i32;
212 }
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700213 op->opc = new_op;
Richard Henderson170ba882017-11-22 09:07:11 +0100214 /* TCGOP_VECL and TCGOP_VECE remain unchanged. */
Richard Henderson63490392017-06-20 13:43:15 -0700215 op->args[0] = dst;
216 op->args[1] = src;
Richard Hendersona62f6f52014-05-22 10:59:12 -0700217
Richard Hendersonb1fde412021-08-23 13:07:49 -0700218 z_mask = si->z_mask;
Richard Henderson24666ba2014-05-22 11:14:10 -0700219 if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_mov_i32) {
220 /* High bits of the destination are now garbage. */
Richard Hendersonb1fde412021-08-23 13:07:49 -0700221 z_mask |= ~0xffffffffull;
Richard Henderson24666ba2014-05-22 11:14:10 -0700222 }
Richard Hendersonb1fde412021-08-23 13:07:49 -0700223 di->z_mask = z_mask;
Richard Henderson24666ba2014-05-22 11:14:10 -0700224
Richard Henderson63490392017-06-20 13:43:15 -0700225 if (src_ts->type == dst_ts->type) {
Richard Henderson6fcb98e2020-03-30 17:44:30 -0700226 TempOptInfo *ni = ts_info(si->next_copy);
Richard Henderson63490392017-06-20 13:43:15 -0700227
228 di->next_copy = si->next_copy;
229 di->prev_copy = src_ts;
230 ni->prev_copy = dst_ts;
231 si->next_copy = dst_ts;
232 di->is_const = si->is_const;
233 di->val = si->val;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800234 }
Kirill Batuzov22613af2011-07-07 16:37:13 +0400235}
236
Richard Hendersondc849882021-08-24 07:13:45 -0700237static void tcg_opt_gen_movi(OptContext *ctx, TCGOp *op,
238 TCGArg dst, uint64_t val)
Richard Henderson8fe35e02020-03-30 20:42:43 -0700239{
240 const TCGOpDef *def = &tcg_op_defs[op->opc];
241 TCGType type;
242 TCGTemp *tv;
243
244 if (def->flags & TCG_OPF_VECTOR) {
245 type = TCGOP_VECL(op) + TCG_TYPE_V64;
246 } else if (def->flags & TCG_OPF_64BIT) {
247 type = TCG_TYPE_I64;
248 } else {
249 type = TCG_TYPE_I32;
250 }
251
252 /* Convert movi to mov with constant temp. */
253 tv = tcg_constant_internal(type, val);
Richard Henderson3b3f8472021-08-23 22:06:31 -0700254 init_ts_info(ctx, tv);
Richard Hendersondc849882021-08-24 07:13:45 -0700255 tcg_opt_gen_mov(ctx, op, dst, temp_arg(tv));
Richard Henderson8fe35e02020-03-30 20:42:43 -0700256}
257
Richard Henderson54795542020-09-06 16:21:32 -0700258static uint64_t do_constant_folding_2(TCGOpcode op, uint64_t x, uint64_t y)
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400259{
Richard Henderson03271522013-08-14 14:35:56 -0700260 uint64_t l64, h64;
261
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400262 switch (op) {
263 CASE_OP_32_64(add):
264 return x + y;
265
266 CASE_OP_32_64(sub):
267 return x - y;
268
269 CASE_OP_32_64(mul):
270 return x * y;
271
Kirill Batuzov9a810902011-07-07 16:37:15 +0400272 CASE_OP_32_64(and):
273 return x & y;
274
275 CASE_OP_32_64(or):
276 return x | y;
277
278 CASE_OP_32_64(xor):
279 return x ^ y;
280
Kirill Batuzov55c09752011-07-07 16:37:16 +0400281 case INDEX_op_shl_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700282 return (uint32_t)x << (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400283
Kirill Batuzov55c09752011-07-07 16:37:16 +0400284 case INDEX_op_shl_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700285 return (uint64_t)x << (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400286
287 case INDEX_op_shr_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700288 return (uint32_t)x >> (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400289
Kirill Batuzov55c09752011-07-07 16:37:16 +0400290 case INDEX_op_shr_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700291 return (uint64_t)x >> (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400292
293 case INDEX_op_sar_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700294 return (int32_t)x >> (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400295
Kirill Batuzov55c09752011-07-07 16:37:16 +0400296 case INDEX_op_sar_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700297 return (int64_t)x >> (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400298
299 case INDEX_op_rotr_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700300 return ror32(x, y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400301
Kirill Batuzov55c09752011-07-07 16:37:16 +0400302 case INDEX_op_rotr_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700303 return ror64(x, y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400304
305 case INDEX_op_rotl_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700306 return rol32(x, y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400307
Kirill Batuzov55c09752011-07-07 16:37:16 +0400308 case INDEX_op_rotl_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700309 return rol64(x, y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400310
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700311 CASE_OP_32_64(not):
Kirill Batuzova640f032011-07-07 16:37:17 +0400312 return ~x;
313
Richard Hendersoncb25c802011-08-17 14:11:47 -0700314 CASE_OP_32_64(neg):
315 return -x;
316
317 CASE_OP_32_64(andc):
318 return x & ~y;
319
320 CASE_OP_32_64(orc):
321 return x | ~y;
322
323 CASE_OP_32_64(eqv):
324 return ~(x ^ y);
325
326 CASE_OP_32_64(nand):
327 return ~(x & y);
328
329 CASE_OP_32_64(nor):
330 return ~(x | y);
331
Richard Henderson0e28d002016-11-16 09:23:28 +0100332 case INDEX_op_clz_i32:
333 return (uint32_t)x ? clz32(x) : y;
334
335 case INDEX_op_clz_i64:
336 return x ? clz64(x) : y;
337
338 case INDEX_op_ctz_i32:
339 return (uint32_t)x ? ctz32(x) : y;
340
341 case INDEX_op_ctz_i64:
342 return x ? ctz64(x) : y;
343
Richard Hendersona768e4e2016-11-21 11:13:39 +0100344 case INDEX_op_ctpop_i32:
345 return ctpop32(x);
346
347 case INDEX_op_ctpop_i64:
348 return ctpop64(x);
349
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700350 CASE_OP_32_64(ext8s):
Kirill Batuzova640f032011-07-07 16:37:17 +0400351 return (int8_t)x;
352
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700353 CASE_OP_32_64(ext16s):
Kirill Batuzova640f032011-07-07 16:37:17 +0400354 return (int16_t)x;
355
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700356 CASE_OP_32_64(ext8u):
Kirill Batuzova640f032011-07-07 16:37:17 +0400357 return (uint8_t)x;
358
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700359 CASE_OP_32_64(ext16u):
Kirill Batuzova640f032011-07-07 16:37:17 +0400360 return (uint16_t)x;
361
Richard Henderson64985942018-11-20 08:53:34 +0100362 CASE_OP_32_64(bswap16):
Richard Henderson0b76ff82021-06-13 13:04:00 -0700363 x = bswap16(x);
364 return y & TCG_BSWAP_OS ? (int16_t)x : x;
Richard Henderson64985942018-11-20 08:53:34 +0100365
366 CASE_OP_32_64(bswap32):
Richard Henderson0b76ff82021-06-13 13:04:00 -0700367 x = bswap32(x);
368 return y & TCG_BSWAP_OS ? (int32_t)x : x;
Richard Henderson64985942018-11-20 08:53:34 +0100369
370 case INDEX_op_bswap64_i64:
371 return bswap64(x);
372
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200373 case INDEX_op_ext_i32_i64:
Kirill Batuzova640f032011-07-07 16:37:17 +0400374 case INDEX_op_ext32s_i64:
375 return (int32_t)x;
376
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200377 case INDEX_op_extu_i32_i64:
Richard Henderson609ad702015-07-24 07:16:00 -0700378 case INDEX_op_extrl_i64_i32:
Kirill Batuzova640f032011-07-07 16:37:17 +0400379 case INDEX_op_ext32u_i64:
380 return (uint32_t)x;
Kirill Batuzova640f032011-07-07 16:37:17 +0400381
Richard Henderson609ad702015-07-24 07:16:00 -0700382 case INDEX_op_extrh_i64_i32:
383 return (uint64_t)x >> 32;
384
Richard Henderson03271522013-08-14 14:35:56 -0700385 case INDEX_op_muluh_i32:
386 return ((uint64_t)(uint32_t)x * (uint32_t)y) >> 32;
387 case INDEX_op_mulsh_i32:
388 return ((int64_t)(int32_t)x * (int32_t)y) >> 32;
389
390 case INDEX_op_muluh_i64:
391 mulu64(&l64, &h64, x, y);
392 return h64;
393 case INDEX_op_mulsh_i64:
394 muls64(&l64, &h64, x, y);
395 return h64;
396
Richard Henderson01547f72013-08-14 15:22:46 -0700397 case INDEX_op_div_i32:
398 /* Avoid crashing on divide by zero, otherwise undefined. */
399 return (int32_t)x / ((int32_t)y ? : 1);
400 case INDEX_op_divu_i32:
401 return (uint32_t)x / ((uint32_t)y ? : 1);
402 case INDEX_op_div_i64:
403 return (int64_t)x / ((int64_t)y ? : 1);
404 case INDEX_op_divu_i64:
405 return (uint64_t)x / ((uint64_t)y ? : 1);
406
407 case INDEX_op_rem_i32:
408 return (int32_t)x % ((int32_t)y ? : 1);
409 case INDEX_op_remu_i32:
410 return (uint32_t)x % ((uint32_t)y ? : 1);
411 case INDEX_op_rem_i64:
412 return (int64_t)x % ((int64_t)y ? : 1);
413 case INDEX_op_remu_i64:
414 return (uint64_t)x % ((uint64_t)y ? : 1);
415
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400416 default:
417 fprintf(stderr,
418 "Unrecognized operation %d in do_constant_folding.\n", op);
419 tcg_abort();
420 }
421}
422
Richard Henderson54795542020-09-06 16:21:32 -0700423static uint64_t do_constant_folding(TCGOpcode op, uint64_t x, uint64_t y)
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400424{
Richard Henderson170ba882017-11-22 09:07:11 +0100425 const TCGOpDef *def = &tcg_op_defs[op];
Richard Henderson54795542020-09-06 16:21:32 -0700426 uint64_t res = do_constant_folding_2(op, x, y);
Richard Henderson170ba882017-11-22 09:07:11 +0100427 if (!(def->flags & TCG_OPF_64BIT)) {
Aurelien Jarno29f3ff82015-07-10 18:03:31 +0200428 res = (int32_t)res;
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400429 }
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400430 return res;
431}
432
Richard Henderson9519da72012-10-02 11:32:26 -0700433static bool do_constant_folding_cond_32(uint32_t x, uint32_t y, TCGCond c)
434{
435 switch (c) {
436 case TCG_COND_EQ:
437 return x == y;
438 case TCG_COND_NE:
439 return x != y;
440 case TCG_COND_LT:
441 return (int32_t)x < (int32_t)y;
442 case TCG_COND_GE:
443 return (int32_t)x >= (int32_t)y;
444 case TCG_COND_LE:
445 return (int32_t)x <= (int32_t)y;
446 case TCG_COND_GT:
447 return (int32_t)x > (int32_t)y;
448 case TCG_COND_LTU:
449 return x < y;
450 case TCG_COND_GEU:
451 return x >= y;
452 case TCG_COND_LEU:
453 return x <= y;
454 case TCG_COND_GTU:
455 return x > y;
456 default:
457 tcg_abort();
458 }
459}
460
461static bool do_constant_folding_cond_64(uint64_t x, uint64_t y, TCGCond c)
462{
463 switch (c) {
464 case TCG_COND_EQ:
465 return x == y;
466 case TCG_COND_NE:
467 return x != y;
468 case TCG_COND_LT:
469 return (int64_t)x < (int64_t)y;
470 case TCG_COND_GE:
471 return (int64_t)x >= (int64_t)y;
472 case TCG_COND_LE:
473 return (int64_t)x <= (int64_t)y;
474 case TCG_COND_GT:
475 return (int64_t)x > (int64_t)y;
476 case TCG_COND_LTU:
477 return x < y;
478 case TCG_COND_GEU:
479 return x >= y;
480 case TCG_COND_LEU:
481 return x <= y;
482 case TCG_COND_GTU:
483 return x > y;
484 default:
485 tcg_abort();
486 }
487}
488
489static bool do_constant_folding_cond_eq(TCGCond c)
490{
491 switch (c) {
492 case TCG_COND_GT:
493 case TCG_COND_LTU:
494 case TCG_COND_LT:
495 case TCG_COND_GTU:
496 case TCG_COND_NE:
497 return 0;
498 case TCG_COND_GE:
499 case TCG_COND_GEU:
500 case TCG_COND_LE:
501 case TCG_COND_LEU:
502 case TCG_COND_EQ:
503 return 1;
504 default:
505 tcg_abort();
506 }
507}
508
Aurelien Jarnob336ceb2012-09-18 19:37:00 +0200509/* Return 2 if the condition can't be simplified, and the result
510 of the condition (0 or 1) if it can */
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200511static TCGArg do_constant_folding_cond(TCGOpcode op, TCGArg x,
512 TCGArg y, TCGCond c)
513{
Richard Henderson54795542020-09-06 16:21:32 -0700514 uint64_t xv = arg_info(x)->val;
515 uint64_t yv = arg_info(y)->val;
516
Richard Henderson63490392017-06-20 13:43:15 -0700517 if (arg_is_const(x) && arg_is_const(y)) {
Richard Henderson170ba882017-11-22 09:07:11 +0100518 const TCGOpDef *def = &tcg_op_defs[op];
519 tcg_debug_assert(!(def->flags & TCG_OPF_VECTOR));
520 if (def->flags & TCG_OPF_64BIT) {
Richard Henderson63490392017-06-20 13:43:15 -0700521 return do_constant_folding_cond_64(xv, yv, c);
Richard Henderson170ba882017-11-22 09:07:11 +0100522 } else {
523 return do_constant_folding_cond_32(xv, yv, c);
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200524 }
Richard Henderson63490392017-06-20 13:43:15 -0700525 } else if (args_are_copies(x, y)) {
Richard Henderson9519da72012-10-02 11:32:26 -0700526 return do_constant_folding_cond_eq(c);
Richard Henderson63490392017-06-20 13:43:15 -0700527 } else if (arg_is_const(y) && yv == 0) {
Aurelien Jarnob336ceb2012-09-18 19:37:00 +0200528 switch (c) {
529 case TCG_COND_LTU:
530 return 0;
531 case TCG_COND_GEU:
532 return 1;
533 default:
534 return 2;
535 }
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200536 }
Alex Bennée550276a2016-09-30 22:30:55 +0100537 return 2;
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200538}
539
Richard Henderson6c4382f2012-10-02 11:32:27 -0700540/* Return 2 if the condition can't be simplified, and the result
541 of the condition (0 or 1) if it can */
542static TCGArg do_constant_folding_cond2(TCGArg *p1, TCGArg *p2, TCGCond c)
543{
544 TCGArg al = p1[0], ah = p1[1];
545 TCGArg bl = p2[0], bh = p2[1];
546
Richard Henderson63490392017-06-20 13:43:15 -0700547 if (arg_is_const(bl) && arg_is_const(bh)) {
548 tcg_target_ulong blv = arg_info(bl)->val;
549 tcg_target_ulong bhv = arg_info(bh)->val;
550 uint64_t b = deposit64(blv, 32, 32, bhv);
Richard Henderson6c4382f2012-10-02 11:32:27 -0700551
Richard Henderson63490392017-06-20 13:43:15 -0700552 if (arg_is_const(al) && arg_is_const(ah)) {
553 tcg_target_ulong alv = arg_info(al)->val;
554 tcg_target_ulong ahv = arg_info(ah)->val;
555 uint64_t a = deposit64(alv, 32, 32, ahv);
Richard Henderson6c4382f2012-10-02 11:32:27 -0700556 return do_constant_folding_cond_64(a, b, c);
557 }
558 if (b == 0) {
559 switch (c) {
560 case TCG_COND_LTU:
561 return 0;
562 case TCG_COND_GEU:
563 return 1;
564 default:
565 break;
566 }
567 }
568 }
Richard Henderson63490392017-06-20 13:43:15 -0700569 if (args_are_copies(al, bl) && args_are_copies(ah, bh)) {
Richard Henderson6c4382f2012-10-02 11:32:27 -0700570 return do_constant_folding_cond_eq(c);
571 }
572 return 2;
573}
574
Richard Henderson24c9ae42012-10-02 11:32:21 -0700575static bool swap_commutative(TCGArg dest, TCGArg *p1, TCGArg *p2)
576{
577 TCGArg a1 = *p1, a2 = *p2;
578 int sum = 0;
Richard Henderson63490392017-06-20 13:43:15 -0700579 sum += arg_is_const(a1);
580 sum -= arg_is_const(a2);
Richard Henderson24c9ae42012-10-02 11:32:21 -0700581
582 /* Prefer the constant in second argument, and then the form
583 op a, a, b, which is better handled on non-RISC hosts. */
584 if (sum > 0 || (sum == 0 && dest == a2)) {
585 *p1 = a2;
586 *p2 = a1;
587 return true;
588 }
589 return false;
590}
591
Richard Henderson0bfcb862012-10-02 11:32:23 -0700592static bool swap_commutative2(TCGArg *p1, TCGArg *p2)
593{
594 int sum = 0;
Richard Henderson63490392017-06-20 13:43:15 -0700595 sum += arg_is_const(p1[0]);
596 sum += arg_is_const(p1[1]);
597 sum -= arg_is_const(p2[0]);
598 sum -= arg_is_const(p2[1]);
Richard Henderson0bfcb862012-10-02 11:32:23 -0700599 if (sum > 0) {
600 TCGArg t;
601 t = p1[0], p1[0] = p2[0], p2[0] = t;
602 t = p1[1], p1[1] = p2[1], p2[1] = t;
603 return true;
604 }
605 return false;
606}
607
Kirill Batuzov22613af2011-07-07 16:37:13 +0400608/* Propagate constants and copies, fold constant expressions. */
Aurelien Jarno36e60ef2015-06-04 21:53:27 +0200609void tcg_optimize(TCGContext *s)
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +0400610{
Richard Henderson8f17a972020-03-30 19:52:02 -0700611 int nb_temps, nb_globals, i;
Richard Henderson15fa08f2017-11-02 15:19:14 +0100612 TCGOp *op, *op_next, *prev_mb = NULL;
Richard Hendersondc849882021-08-24 07:13:45 -0700613 OptContext ctx = { .tcg = s };
Richard Henderson5d8f5362012-09-21 10:13:38 -0700614
Kirill Batuzov22613af2011-07-07 16:37:13 +0400615 /* Array VALS has an element for each temp.
616 If this temp holds a constant then its value is kept in VALS' element.
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200617 If this temp is a copy of other ones then the other copies are
618 available through the doubly linked circular list. */
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +0400619
620 nb_temps = s->nb_temps;
621 nb_globals = s->nb_globals;
Richard Henderson8f17a972020-03-30 19:52:02 -0700622
Richard Henderson8f17a972020-03-30 19:52:02 -0700623 for (i = 0; i < nb_temps; ++i) {
624 s->temps[i].state_ptr = NULL;
625 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +0400626
Richard Henderson15fa08f2017-11-02 15:19:14 +0100627 QTAILQ_FOREACH_SAFE(op, &s->ops, link, op_next) {
Richard Hendersonb1fde412021-08-23 13:07:49 -0700628 uint64_t z_mask, partmask, affected, tmp;
Richard Henderson8f17a972020-03-30 19:52:02 -0700629 int nb_oargs, nb_iargs;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700630 TCGOpcode opc = op->opc;
631 const TCGOpDef *def = &tcg_op_defs[opc];
632
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200633 /* Count the arguments, and initialize the temps that are
634 going to be used */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700635 if (opc == INDEX_op_call) {
Richard Hendersoncd9090a2017-11-14 13:02:51 +0100636 nb_oargs = TCGOP_CALLO(op);
637 nb_iargs = TCGOP_CALLI(op);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200638 for (i = 0; i < nb_oargs + nb_iargs; i++) {
Richard Henderson63490392017-06-20 13:43:15 -0700639 TCGTemp *ts = arg_temp(op->args[i]);
640 if (ts) {
Richard Henderson3b3f8472021-08-23 22:06:31 -0700641 init_ts_info(&ctx, ts);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200642 }
643 }
Aurelien Jarno1ff8c542012-09-11 16:18:49 +0200644 } else {
Richard Hendersoncf066672014-03-22 20:06:52 -0700645 nb_oargs = def->nb_oargs;
646 nb_iargs = def->nb_iargs;
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200647 for (i = 0; i < nb_oargs + nb_iargs; i++) {
Richard Henderson3b3f8472021-08-23 22:06:31 -0700648 init_arg_info(&ctx, op->args[i]);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200649 }
Richard Hendersoncf066672014-03-22 20:06:52 -0700650 }
651
652 /* Do copy propagation */
653 for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
Richard Henderson63490392017-06-20 13:43:15 -0700654 TCGTemp *ts = arg_temp(op->args[i]);
655 if (ts && ts_is_copy(ts)) {
656 op->args[i] = temp_arg(find_better_copy(s, ts));
Kirill Batuzov22613af2011-07-07 16:37:13 +0400657 }
658 }
659
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400660 /* For commutative operations make constant second argument */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700661 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +0100662 CASE_OP_32_64_VEC(add):
663 CASE_OP_32_64_VEC(mul):
664 CASE_OP_32_64_VEC(and):
665 CASE_OP_32_64_VEC(or):
666 CASE_OP_32_64_VEC(xor):
Richard Hendersoncb25c802011-08-17 14:11:47 -0700667 CASE_OP_32_64(eqv):
668 CASE_OP_32_64(nand):
669 CASE_OP_32_64(nor):
Richard Henderson03271522013-08-14 14:35:56 -0700670 CASE_OP_32_64(muluh):
671 CASE_OP_32_64(mulsh):
Richard Hendersonacd93702016-12-08 12:28:42 -0800672 swap_commutative(op->args[0], &op->args[1], &op->args[2]);
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400673 break;
Aurelien Jarno65a7cce2012-09-06 16:47:14 +0200674 CASE_OP_32_64(brcond):
Richard Hendersonacd93702016-12-08 12:28:42 -0800675 if (swap_commutative(-1, &op->args[0], &op->args[1])) {
676 op->args[2] = tcg_swap_cond(op->args[2]);
Aurelien Jarno65a7cce2012-09-06 16:47:14 +0200677 }
678 break;
679 CASE_OP_32_64(setcond):
Richard Hendersonacd93702016-12-08 12:28:42 -0800680 if (swap_commutative(op->args[0], &op->args[1], &op->args[2])) {
681 op->args[3] = tcg_swap_cond(op->args[3]);
Aurelien Jarno65a7cce2012-09-06 16:47:14 +0200682 }
683 break;
Richard Hendersonfa01a202012-09-21 10:13:37 -0700684 CASE_OP_32_64(movcond):
Richard Hendersonacd93702016-12-08 12:28:42 -0800685 if (swap_commutative(-1, &op->args[1], &op->args[2])) {
686 op->args[5] = tcg_swap_cond(op->args[5]);
Richard Hendersonfa01a202012-09-21 10:13:37 -0700687 }
Richard Henderson5d8f5362012-09-21 10:13:38 -0700688 /* For movcond, we canonicalize the "false" input reg to match
689 the destination reg so that the tcg backend can implement
690 a "move if true" operation. */
Richard Hendersonacd93702016-12-08 12:28:42 -0800691 if (swap_commutative(op->args[0], &op->args[4], &op->args[3])) {
692 op->args[5] = tcg_invert_cond(op->args[5]);
Richard Henderson5d8f5362012-09-21 10:13:38 -0700693 }
Richard Henderson1e484e62012-10-02 11:32:22 -0700694 break;
Richard Hendersond7156f72013-02-19 23:51:52 -0800695 CASE_OP_32_64(add2):
Richard Hendersonacd93702016-12-08 12:28:42 -0800696 swap_commutative(op->args[0], &op->args[2], &op->args[4]);
697 swap_commutative(op->args[1], &op->args[3], &op->args[5]);
Richard Henderson1e484e62012-10-02 11:32:22 -0700698 break;
Richard Hendersond7156f72013-02-19 23:51:52 -0800699 CASE_OP_32_64(mulu2):
Richard Henderson4d3203f2013-02-19 23:51:53 -0800700 CASE_OP_32_64(muls2):
Richard Hendersonacd93702016-12-08 12:28:42 -0800701 swap_commutative(op->args[0], &op->args[2], &op->args[3]);
Richard Henderson14149682012-10-02 11:32:30 -0700702 break;
Richard Henderson0bfcb862012-10-02 11:32:23 -0700703 case INDEX_op_brcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -0800704 if (swap_commutative2(&op->args[0], &op->args[2])) {
705 op->args[4] = tcg_swap_cond(op->args[4]);
Richard Henderson0bfcb862012-10-02 11:32:23 -0700706 }
707 break;
708 case INDEX_op_setcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -0800709 if (swap_commutative2(&op->args[1], &op->args[3])) {
710 op->args[5] = tcg_swap_cond(op->args[5]);
Richard Henderson0bfcb862012-10-02 11:32:23 -0700711 }
712 break;
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400713 default:
714 break;
715 }
716
Richard Henderson2d497542013-03-21 09:13:33 -0700717 /* Simplify expressions for "shift/rot r, 0, a => movi r, 0",
718 and "sub r, 0, a => neg r, a" case. */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700719 switch (opc) {
Aurelien Jarno01ee5282012-09-06 16:47:14 +0200720 CASE_OP_32_64(shl):
721 CASE_OP_32_64(shr):
722 CASE_OP_32_64(sar):
723 CASE_OP_32_64(rotl):
724 CASE_OP_32_64(rotr):
Richard Henderson63490392017-06-20 13:43:15 -0700725 if (arg_is_const(op->args[1])
726 && arg_info(op->args[1])->val == 0) {
Richard Hendersondc849882021-08-24 07:13:45 -0700727 tcg_opt_gen_movi(&ctx, op, op->args[0], 0);
Aurelien Jarno01ee5282012-09-06 16:47:14 +0200728 continue;
729 }
730 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100731 CASE_OP_32_64_VEC(sub):
Richard Henderson2d497542013-03-21 09:13:33 -0700732 {
733 TCGOpcode neg_op;
734 bool have_neg;
735
Richard Henderson63490392017-06-20 13:43:15 -0700736 if (arg_is_const(op->args[2])) {
Richard Henderson2d497542013-03-21 09:13:33 -0700737 /* Proceed with possible constant folding. */
738 break;
739 }
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700740 if (opc == INDEX_op_sub_i32) {
Richard Henderson2d497542013-03-21 09:13:33 -0700741 neg_op = INDEX_op_neg_i32;
742 have_neg = TCG_TARGET_HAS_neg_i32;
Richard Henderson170ba882017-11-22 09:07:11 +0100743 } else if (opc == INDEX_op_sub_i64) {
Richard Henderson2d497542013-03-21 09:13:33 -0700744 neg_op = INDEX_op_neg_i64;
745 have_neg = TCG_TARGET_HAS_neg_i64;
Richard Hendersonac383dde2019-04-20 00:27:24 +0000746 } else if (TCG_TARGET_HAS_neg_vec) {
747 TCGType type = TCGOP_VECL(op) + TCG_TYPE_V64;
748 unsigned vece = TCGOP_VECE(op);
Richard Henderson170ba882017-11-22 09:07:11 +0100749 neg_op = INDEX_op_neg_vec;
Richard Hendersonac383dde2019-04-20 00:27:24 +0000750 have_neg = tcg_can_emit_vec_op(neg_op, type, vece) > 0;
751 } else {
752 break;
Richard Henderson2d497542013-03-21 09:13:33 -0700753 }
754 if (!have_neg) {
755 break;
756 }
Richard Henderson63490392017-06-20 13:43:15 -0700757 if (arg_is_const(op->args[1])
758 && arg_info(op->args[1])->val == 0) {
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700759 op->opc = neg_op;
Richard Hendersonacd93702016-12-08 12:28:42 -0800760 reset_temp(op->args[0]);
761 op->args[1] = op->args[2];
Richard Henderson2d497542013-03-21 09:13:33 -0700762 continue;
763 }
764 }
765 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100766 CASE_OP_32_64_VEC(xor):
Richard Hendersone201b562014-01-28 13:15:38 -0800767 CASE_OP_32_64(nand):
Richard Henderson63490392017-06-20 13:43:15 -0700768 if (!arg_is_const(op->args[1])
769 && arg_is_const(op->args[2])
770 && arg_info(op->args[2])->val == -1) {
Richard Hendersone201b562014-01-28 13:15:38 -0800771 i = 1;
772 goto try_not;
773 }
774 break;
775 CASE_OP_32_64(nor):
Richard Henderson63490392017-06-20 13:43:15 -0700776 if (!arg_is_const(op->args[1])
777 && arg_is_const(op->args[2])
778 && arg_info(op->args[2])->val == 0) {
Richard Hendersone201b562014-01-28 13:15:38 -0800779 i = 1;
780 goto try_not;
781 }
782 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100783 CASE_OP_32_64_VEC(andc):
Richard Henderson63490392017-06-20 13:43:15 -0700784 if (!arg_is_const(op->args[2])
785 && arg_is_const(op->args[1])
786 && arg_info(op->args[1])->val == -1) {
Richard Hendersone201b562014-01-28 13:15:38 -0800787 i = 2;
788 goto try_not;
789 }
790 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100791 CASE_OP_32_64_VEC(orc):
Richard Hendersone201b562014-01-28 13:15:38 -0800792 CASE_OP_32_64(eqv):
Richard Henderson63490392017-06-20 13:43:15 -0700793 if (!arg_is_const(op->args[2])
794 && arg_is_const(op->args[1])
795 && arg_info(op->args[1])->val == 0) {
Richard Hendersone201b562014-01-28 13:15:38 -0800796 i = 2;
797 goto try_not;
798 }
799 break;
800 try_not:
801 {
802 TCGOpcode not_op;
803 bool have_not;
804
Richard Henderson170ba882017-11-22 09:07:11 +0100805 if (def->flags & TCG_OPF_VECTOR) {
806 not_op = INDEX_op_not_vec;
807 have_not = TCG_TARGET_HAS_not_vec;
808 } else if (def->flags & TCG_OPF_64BIT) {
Richard Hendersone201b562014-01-28 13:15:38 -0800809 not_op = INDEX_op_not_i64;
810 have_not = TCG_TARGET_HAS_not_i64;
811 } else {
812 not_op = INDEX_op_not_i32;
813 have_not = TCG_TARGET_HAS_not_i32;
814 }
815 if (!have_not) {
816 break;
817 }
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700818 op->opc = not_op;
Richard Hendersonacd93702016-12-08 12:28:42 -0800819 reset_temp(op->args[0]);
820 op->args[1] = op->args[i];
Richard Hendersone201b562014-01-28 13:15:38 -0800821 continue;
822 }
Aurelien Jarno01ee5282012-09-06 16:47:14 +0200823 default:
824 break;
825 }
826
Richard Henderson464a1442014-01-31 07:42:11 -0600827 /* Simplify expression for "op r, a, const => mov r, a" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700828 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +0100829 CASE_OP_32_64_VEC(add):
830 CASE_OP_32_64_VEC(sub):
831 CASE_OP_32_64_VEC(or):
832 CASE_OP_32_64_VEC(xor):
833 CASE_OP_32_64_VEC(andc):
Kirill Batuzov55c09752011-07-07 16:37:16 +0400834 CASE_OP_32_64(shl):
835 CASE_OP_32_64(shr):
836 CASE_OP_32_64(sar):
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700837 CASE_OP_32_64(rotl):
838 CASE_OP_32_64(rotr):
Richard Henderson63490392017-06-20 13:43:15 -0700839 if (!arg_is_const(op->args[1])
840 && arg_is_const(op->args[2])
841 && arg_info(op->args[2])->val == 0) {
Richard Hendersondc849882021-08-24 07:13:45 -0700842 tcg_opt_gen_mov(&ctx, op, op->args[0], op->args[1]);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200843 continue;
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400844 }
845 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100846 CASE_OP_32_64_VEC(and):
847 CASE_OP_32_64_VEC(orc):
Richard Henderson464a1442014-01-31 07:42:11 -0600848 CASE_OP_32_64(eqv):
Richard Henderson63490392017-06-20 13:43:15 -0700849 if (!arg_is_const(op->args[1])
850 && arg_is_const(op->args[2])
851 && arg_info(op->args[2])->val == -1) {
Richard Hendersondc849882021-08-24 07:13:45 -0700852 tcg_opt_gen_mov(&ctx, op, op->args[0], op->args[1]);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200853 continue;
Richard Henderson464a1442014-01-31 07:42:11 -0600854 }
855 break;
Aurelien Jarno56e49432012-09-06 16:47:13 +0200856 default:
857 break;
858 }
859
Aurelien Jarno30312442013-09-03 08:27:38 +0200860 /* Simplify using known-zero bits. Currently only ops with a single
861 output argument is supported. */
Richard Hendersonb1fde412021-08-23 13:07:49 -0700862 z_mask = -1;
Paolo Bonzini633f6502013-01-11 15:42:53 -0800863 affected = -1;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700864 switch (opc) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800865 CASE_OP_32_64(ext8s):
Richard Hendersonb1fde412021-08-23 13:07:49 -0700866 if ((arg_info(op->args[1])->z_mask & 0x80) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800867 break;
868 }
Thomas Huthd84568b2020-12-11 16:24:24 +0100869 QEMU_FALLTHROUGH;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800870 CASE_OP_32_64(ext8u):
Richard Hendersonb1fde412021-08-23 13:07:49 -0700871 z_mask = 0xff;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800872 goto and_const;
873 CASE_OP_32_64(ext16s):
Richard Hendersonb1fde412021-08-23 13:07:49 -0700874 if ((arg_info(op->args[1])->z_mask & 0x8000) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800875 break;
876 }
Thomas Huthd84568b2020-12-11 16:24:24 +0100877 QEMU_FALLTHROUGH;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800878 CASE_OP_32_64(ext16u):
Richard Hendersonb1fde412021-08-23 13:07:49 -0700879 z_mask = 0xffff;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800880 goto and_const;
881 case INDEX_op_ext32s_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -0700882 if ((arg_info(op->args[1])->z_mask & 0x80000000) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800883 break;
884 }
Thomas Huthd84568b2020-12-11 16:24:24 +0100885 QEMU_FALLTHROUGH;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800886 case INDEX_op_ext32u_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -0700887 z_mask = 0xffffffffU;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800888 goto and_const;
889
890 CASE_OP_32_64(and):
Richard Hendersonb1fde412021-08-23 13:07:49 -0700891 z_mask = arg_info(op->args[2])->z_mask;
Richard Henderson63490392017-06-20 13:43:15 -0700892 if (arg_is_const(op->args[2])) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800893 and_const:
Richard Hendersonb1fde412021-08-23 13:07:49 -0700894 affected = arg_info(op->args[1])->z_mask & ~z_mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800895 }
Richard Hendersonb1fde412021-08-23 13:07:49 -0700896 z_mask = arg_info(op->args[1])->z_mask & z_mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800897 break;
898
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200899 case INDEX_op_ext_i32_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -0700900 if ((arg_info(op->args[1])->z_mask & 0x80000000) != 0) {
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200901 break;
902 }
Thomas Huthd84568b2020-12-11 16:24:24 +0100903 QEMU_FALLTHROUGH;
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200904 case INDEX_op_extu_i32_i64:
905 /* We do not compute affected as it is a size changing op. */
Richard Hendersonb1fde412021-08-23 13:07:49 -0700906 z_mask = (uint32_t)arg_info(op->args[1])->z_mask;
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200907 break;
908
Richard Henderson23ec69ed2014-01-28 12:03:24 -0800909 CASE_OP_32_64(andc):
910 /* Known-zeros does not imply known-ones. Therefore unless
Richard Hendersonacd93702016-12-08 12:28:42 -0800911 op->args[2] is constant, we can't infer anything from it. */
Richard Henderson63490392017-06-20 13:43:15 -0700912 if (arg_is_const(op->args[2])) {
Richard Hendersonb1fde412021-08-23 13:07:49 -0700913 z_mask = ~arg_info(op->args[2])->z_mask;
Richard Henderson23ec69ed2014-01-28 12:03:24 -0800914 goto and_const;
915 }
Richard Henderson63490392017-06-20 13:43:15 -0700916 /* But we certainly know nothing outside args[1] may be set. */
Richard Hendersonb1fde412021-08-23 13:07:49 -0700917 z_mask = arg_info(op->args[1])->z_mask;
Richard Henderson23ec69ed2014-01-28 12:03:24 -0800918 break;
919
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200920 case INDEX_op_sar_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700921 if (arg_is_const(op->args[2])) {
922 tmp = arg_info(op->args[2])->val & 31;
Richard Hendersonb1fde412021-08-23 13:07:49 -0700923 z_mask = (int32_t)arg_info(op->args[1])->z_mask >> tmp;
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200924 }
925 break;
926 case INDEX_op_sar_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700927 if (arg_is_const(op->args[2])) {
928 tmp = arg_info(op->args[2])->val & 63;
Richard Hendersonb1fde412021-08-23 13:07:49 -0700929 z_mask = (int64_t)arg_info(op->args[1])->z_mask >> tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800930 }
931 break;
932
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200933 case INDEX_op_shr_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700934 if (arg_is_const(op->args[2])) {
935 tmp = arg_info(op->args[2])->val & 31;
Richard Hendersonb1fde412021-08-23 13:07:49 -0700936 z_mask = (uint32_t)arg_info(op->args[1])->z_mask >> tmp;
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200937 }
938 break;
939 case INDEX_op_shr_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700940 if (arg_is_const(op->args[2])) {
941 tmp = arg_info(op->args[2])->val & 63;
Richard Hendersonb1fde412021-08-23 13:07:49 -0700942 z_mask = (uint64_t)arg_info(op->args[1])->z_mask >> tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800943 }
944 break;
945
Richard Henderson609ad702015-07-24 07:16:00 -0700946 case INDEX_op_extrl_i64_i32:
Richard Hendersonb1fde412021-08-23 13:07:49 -0700947 z_mask = (uint32_t)arg_info(op->args[1])->z_mask;
Richard Henderson609ad702015-07-24 07:16:00 -0700948 break;
949 case INDEX_op_extrh_i64_i32:
Richard Hendersonb1fde412021-08-23 13:07:49 -0700950 z_mask = (uint64_t)arg_info(op->args[1])->z_mask >> 32;
Richard Henderson4bb7a412013-09-09 17:03:24 -0700951 break;
952
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800953 CASE_OP_32_64(shl):
Richard Henderson63490392017-06-20 13:43:15 -0700954 if (arg_is_const(op->args[2])) {
955 tmp = arg_info(op->args[2])->val & (TCG_TARGET_REG_BITS - 1);
Richard Hendersonb1fde412021-08-23 13:07:49 -0700956 z_mask = arg_info(op->args[1])->z_mask << tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800957 }
958 break;
959
960 CASE_OP_32_64(neg):
961 /* Set to 1 all bits to the left of the rightmost. */
Richard Hendersonb1fde412021-08-23 13:07:49 -0700962 z_mask = -(arg_info(op->args[1])->z_mask
963 & -arg_info(op->args[1])->z_mask);
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800964 break;
965
966 CASE_OP_32_64(deposit):
Richard Hendersonb1fde412021-08-23 13:07:49 -0700967 z_mask = deposit64(arg_info(op->args[1])->z_mask,
968 op->args[3], op->args[4],
969 arg_info(op->args[2])->z_mask);
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800970 break;
971
Richard Henderson7ec8bab2016-10-14 12:04:32 -0500972 CASE_OP_32_64(extract):
Richard Hendersonb1fde412021-08-23 13:07:49 -0700973 z_mask = extract64(arg_info(op->args[1])->z_mask,
974 op->args[2], op->args[3]);
Richard Hendersonacd93702016-12-08 12:28:42 -0800975 if (op->args[2] == 0) {
Richard Hendersonb1fde412021-08-23 13:07:49 -0700976 affected = arg_info(op->args[1])->z_mask & ~z_mask;
Richard Henderson7ec8bab2016-10-14 12:04:32 -0500977 }
978 break;
979 CASE_OP_32_64(sextract):
Richard Hendersonb1fde412021-08-23 13:07:49 -0700980 z_mask = sextract64(arg_info(op->args[1])->z_mask,
981 op->args[2], op->args[3]);
982 if (op->args[2] == 0 && (tcg_target_long)z_mask >= 0) {
983 affected = arg_info(op->args[1])->z_mask & ~z_mask;
Richard Henderson7ec8bab2016-10-14 12:04:32 -0500984 }
985 break;
986
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800987 CASE_OP_32_64(or):
988 CASE_OP_32_64(xor):
Richard Hendersonb1fde412021-08-23 13:07:49 -0700989 z_mask = arg_info(op->args[1])->z_mask
990 | arg_info(op->args[2])->z_mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800991 break;
992
Richard Henderson0e28d002016-11-16 09:23:28 +0100993 case INDEX_op_clz_i32:
994 case INDEX_op_ctz_i32:
Richard Hendersonb1fde412021-08-23 13:07:49 -0700995 z_mask = arg_info(op->args[2])->z_mask | 31;
Richard Henderson0e28d002016-11-16 09:23:28 +0100996 break;
997
998 case INDEX_op_clz_i64:
999 case INDEX_op_ctz_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001000 z_mask = arg_info(op->args[2])->z_mask | 63;
Richard Henderson0e28d002016-11-16 09:23:28 +01001001 break;
1002
Richard Hendersona768e4e2016-11-21 11:13:39 +01001003 case INDEX_op_ctpop_i32:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001004 z_mask = 32 | 31;
Richard Hendersona768e4e2016-11-21 11:13:39 +01001005 break;
1006 case INDEX_op_ctpop_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001007 z_mask = 64 | 63;
Richard Hendersona768e4e2016-11-21 11:13:39 +01001008 break;
1009
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001010 CASE_OP_32_64(setcond):
Richard Hendersona7635512014-04-23 22:18:30 -07001011 case INDEX_op_setcond2_i32:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001012 z_mask = 1;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001013 break;
1014
1015 CASE_OP_32_64(movcond):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001016 z_mask = arg_info(op->args[3])->z_mask
1017 | arg_info(op->args[4])->z_mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001018 break;
1019
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001020 CASE_OP_32_64(ld8u):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001021 z_mask = 0xff;
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001022 break;
1023 CASE_OP_32_64(ld16u):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001024 z_mask = 0xffff;
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001025 break;
1026 case INDEX_op_ld32u_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001027 z_mask = 0xffffffffu;
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001028 break;
1029
1030 CASE_OP_32_64(qemu_ld):
1031 {
Richard Henderson9002ffc2021-07-25 12:06:49 -10001032 MemOpIdx oi = op->args[nb_oargs + nb_iargs];
Tony Nguyen14776ab2019-08-24 04:10:58 +10001033 MemOp mop = get_memop(oi);
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001034 if (!(mop & MO_SIGN)) {
Richard Hendersonb1fde412021-08-23 13:07:49 -07001035 z_mask = (2ULL << ((8 << (mop & MO_SIZE)) - 1)) - 1;
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001036 }
1037 }
1038 break;
1039
Richard Henderson0b76ff82021-06-13 13:04:00 -07001040 CASE_OP_32_64(bswap16):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001041 z_mask = arg_info(op->args[1])->z_mask;
1042 if (z_mask <= 0xffff) {
Richard Henderson0b76ff82021-06-13 13:04:00 -07001043 op->args[2] |= TCG_BSWAP_IZ;
1044 }
Richard Hendersonb1fde412021-08-23 13:07:49 -07001045 z_mask = bswap16(z_mask);
Richard Henderson0b76ff82021-06-13 13:04:00 -07001046 switch (op->args[2] & (TCG_BSWAP_OZ | TCG_BSWAP_OS)) {
1047 case TCG_BSWAP_OZ:
1048 break;
1049 case TCG_BSWAP_OS:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001050 z_mask = (int16_t)z_mask;
Richard Henderson0b76ff82021-06-13 13:04:00 -07001051 break;
1052 default: /* undefined high bits */
Richard Hendersonb1fde412021-08-23 13:07:49 -07001053 z_mask |= MAKE_64BIT_MASK(16, 48);
Richard Henderson0b76ff82021-06-13 13:04:00 -07001054 break;
1055 }
1056 break;
1057
1058 case INDEX_op_bswap32_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001059 z_mask = arg_info(op->args[1])->z_mask;
1060 if (z_mask <= 0xffffffffu) {
Richard Henderson0b76ff82021-06-13 13:04:00 -07001061 op->args[2] |= TCG_BSWAP_IZ;
1062 }
Richard Hendersonb1fde412021-08-23 13:07:49 -07001063 z_mask = bswap32(z_mask);
Richard Henderson0b76ff82021-06-13 13:04:00 -07001064 switch (op->args[2] & (TCG_BSWAP_OZ | TCG_BSWAP_OS)) {
1065 case TCG_BSWAP_OZ:
1066 break;
1067 case TCG_BSWAP_OS:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001068 z_mask = (int32_t)z_mask;
Richard Henderson0b76ff82021-06-13 13:04:00 -07001069 break;
1070 default: /* undefined high bits */
Richard Hendersonb1fde412021-08-23 13:07:49 -07001071 z_mask |= MAKE_64BIT_MASK(32, 32);
Richard Henderson0b76ff82021-06-13 13:04:00 -07001072 break;
1073 }
1074 break;
1075
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001076 default:
1077 break;
1078 }
1079
Richard Hendersonbc8d6882014-06-08 18:24:14 -07001080 /* 32-bit ops generate 32-bit results. For the result is zero test
1081 below, we can ignore high bits, but for further optimizations we
1082 need to record that the high bits contain garbage. */
Richard Hendersonb1fde412021-08-23 13:07:49 -07001083 partmask = z_mask;
Richard Hendersonbc8d6882014-06-08 18:24:14 -07001084 if (!(def->flags & TCG_OPF_64BIT)) {
Richard Hendersonb1fde412021-08-23 13:07:49 -07001085 z_mask |= ~(tcg_target_ulong)0xffffffffu;
Richard Henderson24666ba2014-05-22 11:14:10 -07001086 partmask &= 0xffffffffu;
1087 affected &= 0xffffffffu;
Aurelien Jarnof096dc92013-09-03 08:27:38 +02001088 }
1089
Richard Henderson24666ba2014-05-22 11:14:10 -07001090 if (partmask == 0) {
Aurelien Jarnoeabb7b92016-04-21 10:48:49 +02001091 tcg_debug_assert(nb_oargs == 1);
Richard Hendersondc849882021-08-24 07:13:45 -07001092 tcg_opt_gen_movi(&ctx, op, op->args[0], 0);
Paolo Bonzini633f6502013-01-11 15:42:53 -08001093 continue;
1094 }
1095 if (affected == 0) {
Aurelien Jarnoeabb7b92016-04-21 10:48:49 +02001096 tcg_debug_assert(nb_oargs == 1);
Richard Hendersondc849882021-08-24 07:13:45 -07001097 tcg_opt_gen_mov(&ctx, op, op->args[0], op->args[1]);
Paolo Bonzini633f6502013-01-11 15:42:53 -08001098 continue;
1099 }
1100
Aurelien Jarno56e49432012-09-06 16:47:13 +02001101 /* Simplify expression for "op r, a, 0 => movi r, 0" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001102 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001103 CASE_OP_32_64_VEC(and):
1104 CASE_OP_32_64_VEC(mul):
Richard Henderson03271522013-08-14 14:35:56 -07001105 CASE_OP_32_64(muluh):
1106 CASE_OP_32_64(mulsh):
Richard Henderson63490392017-06-20 13:43:15 -07001107 if (arg_is_const(op->args[2])
1108 && arg_info(op->args[2])->val == 0) {
Richard Hendersondc849882021-08-24 07:13:45 -07001109 tcg_opt_gen_movi(&ctx, op, op->args[0], 0);
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001110 continue;
1111 }
1112 break;
Aurelien Jarno56e49432012-09-06 16:47:13 +02001113 default:
1114 break;
1115 }
1116
1117 /* Simplify expression for "op r, a, a => mov r, a" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001118 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001119 CASE_OP_32_64_VEC(or):
1120 CASE_OP_32_64_VEC(and):
Richard Henderson63490392017-06-20 13:43:15 -07001121 if (args_are_copies(op->args[1], op->args[2])) {
Richard Hendersondc849882021-08-24 07:13:45 -07001122 tcg_opt_gen_mov(&ctx, op, op->args[0], op->args[1]);
Kirill Batuzov9a810902011-07-07 16:37:15 +04001123 continue;
1124 }
1125 break;
Blue Swirlfe0de7a2011-07-30 19:18:32 +00001126 default:
1127 break;
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001128 }
1129
Aurelien Jarno3c941932012-09-18 19:12:36 +02001130 /* Simplify expression for "op r, a, a => movi r, 0" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001131 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001132 CASE_OP_32_64_VEC(andc):
1133 CASE_OP_32_64_VEC(sub):
1134 CASE_OP_32_64_VEC(xor):
Richard Henderson63490392017-06-20 13:43:15 -07001135 if (args_are_copies(op->args[1], op->args[2])) {
Richard Hendersondc849882021-08-24 07:13:45 -07001136 tcg_opt_gen_movi(&ctx, op, op->args[0], 0);
Aurelien Jarno3c941932012-09-18 19:12:36 +02001137 continue;
1138 }
1139 break;
1140 default:
1141 break;
1142 }
1143
Kirill Batuzov22613af2011-07-07 16:37:13 +04001144 /* Propagate constants through copy operations and do constant
1145 folding. Constants will be substituted to arguments by register
1146 allocator where needed and possible. Also detect copies. */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001147 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001148 CASE_OP_32_64_VEC(mov):
Richard Hendersondc849882021-08-24 07:13:45 -07001149 tcg_opt_gen_mov(&ctx, op, op->args[0], op->args[1]);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001150 continue;
Richard Henderson6e14e912012-10-02 11:32:24 -07001151
Richard Henderson170ba882017-11-22 09:07:11 +01001152 case INDEX_op_dup_vec:
1153 if (arg_is_const(op->args[1])) {
1154 tmp = arg_info(op->args[1])->val;
1155 tmp = dup_const(TCGOP_VECE(op), tmp);
Richard Hendersondc849882021-08-24 07:13:45 -07001156 tcg_opt_gen_movi(&ctx, op, op->args[0], tmp);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001157 continue;
Richard Henderson170ba882017-11-22 09:07:11 +01001158 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001159 break;
Richard Henderson170ba882017-11-22 09:07:11 +01001160
Richard Henderson1dc4fe72020-09-05 17:03:35 -07001161 case INDEX_op_dup2_vec:
1162 assert(TCG_TARGET_REG_BITS == 32);
1163 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
Richard Hendersondc849882021-08-24 07:13:45 -07001164 tcg_opt_gen_movi(&ctx, op, op->args[0],
Richard Henderson0b4286d2020-09-06 17:33:18 -07001165 deposit64(arg_info(op->args[1])->val, 32, 32,
1166 arg_info(op->args[2])->val));
Richard Hendersonb10f3832021-08-23 22:30:17 -07001167 continue;
Richard Henderson1dc4fe72020-09-05 17:03:35 -07001168 } else if (args_are_copies(op->args[1], op->args[2])) {
1169 op->opc = INDEX_op_dup_vec;
1170 TCGOP_VECE(op) = MO_32;
1171 nb_iargs = 1;
1172 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001173 break;
Richard Henderson1dc4fe72020-09-05 17:03:35 -07001174
Kirill Batuzova640f032011-07-07 16:37:17 +04001175 CASE_OP_32_64(not):
Richard Hendersoncb25c802011-08-17 14:11:47 -07001176 CASE_OP_32_64(neg):
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001177 CASE_OP_32_64(ext8s):
1178 CASE_OP_32_64(ext8u):
1179 CASE_OP_32_64(ext16s):
1180 CASE_OP_32_64(ext16u):
Richard Hendersona768e4e2016-11-21 11:13:39 +01001181 CASE_OP_32_64(ctpop):
Kirill Batuzova640f032011-07-07 16:37:17 +04001182 case INDEX_op_ext32s_i64:
1183 case INDEX_op_ext32u_i64:
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +02001184 case INDEX_op_ext_i32_i64:
1185 case INDEX_op_extu_i32_i64:
Richard Henderson609ad702015-07-24 07:16:00 -07001186 case INDEX_op_extrl_i64_i32:
1187 case INDEX_op_extrh_i64_i32:
Richard Henderson63490392017-06-20 13:43:15 -07001188 if (arg_is_const(op->args[1])) {
1189 tmp = do_constant_folding(opc, arg_info(op->args[1])->val, 0);
Richard Hendersondc849882021-08-24 07:13:45 -07001190 tcg_opt_gen_movi(&ctx, op, op->args[0], tmp);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001191 continue;
Kirill Batuzova640f032011-07-07 16:37:17 +04001192 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001193 break;
Richard Henderson6e14e912012-10-02 11:32:24 -07001194
Richard Henderson0b76ff82021-06-13 13:04:00 -07001195 CASE_OP_32_64(bswap16):
1196 CASE_OP_32_64(bswap32):
1197 case INDEX_op_bswap64_i64:
1198 if (arg_is_const(op->args[1])) {
1199 tmp = do_constant_folding(opc, arg_info(op->args[1])->val,
1200 op->args[2]);
Richard Hendersondc849882021-08-24 07:13:45 -07001201 tcg_opt_gen_movi(&ctx, op, op->args[0], tmp);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001202 continue;
Richard Henderson0b76ff82021-06-13 13:04:00 -07001203 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001204 break;
Richard Henderson0b76ff82021-06-13 13:04:00 -07001205
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001206 CASE_OP_32_64(add):
1207 CASE_OP_32_64(sub):
1208 CASE_OP_32_64(mul):
Kirill Batuzov9a810902011-07-07 16:37:15 +04001209 CASE_OP_32_64(or):
1210 CASE_OP_32_64(and):
1211 CASE_OP_32_64(xor):
Kirill Batuzov55c09752011-07-07 16:37:16 +04001212 CASE_OP_32_64(shl):
1213 CASE_OP_32_64(shr):
1214 CASE_OP_32_64(sar):
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001215 CASE_OP_32_64(rotl):
1216 CASE_OP_32_64(rotr):
Richard Hendersoncb25c802011-08-17 14:11:47 -07001217 CASE_OP_32_64(andc):
1218 CASE_OP_32_64(orc):
1219 CASE_OP_32_64(eqv):
1220 CASE_OP_32_64(nand):
1221 CASE_OP_32_64(nor):
Richard Henderson03271522013-08-14 14:35:56 -07001222 CASE_OP_32_64(muluh):
1223 CASE_OP_32_64(mulsh):
Richard Henderson01547f72013-08-14 15:22:46 -07001224 CASE_OP_32_64(div):
1225 CASE_OP_32_64(divu):
1226 CASE_OP_32_64(rem):
1227 CASE_OP_32_64(remu):
Richard Henderson63490392017-06-20 13:43:15 -07001228 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
1229 tmp = do_constant_folding(opc, arg_info(op->args[1])->val,
1230 arg_info(op->args[2])->val);
Richard Hendersondc849882021-08-24 07:13:45 -07001231 tcg_opt_gen_movi(&ctx, op, op->args[0], tmp);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001232 continue;
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001233 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001234 break;
Richard Henderson6e14e912012-10-02 11:32:24 -07001235
Richard Henderson0e28d002016-11-16 09:23:28 +01001236 CASE_OP_32_64(clz):
1237 CASE_OP_32_64(ctz):
Richard Henderson63490392017-06-20 13:43:15 -07001238 if (arg_is_const(op->args[1])) {
1239 TCGArg v = arg_info(op->args[1])->val;
Richard Henderson0e28d002016-11-16 09:23:28 +01001240 if (v != 0) {
1241 tmp = do_constant_folding(opc, v, 0);
Richard Hendersondc849882021-08-24 07:13:45 -07001242 tcg_opt_gen_movi(&ctx, op, op->args[0], tmp);
Richard Henderson0e28d002016-11-16 09:23:28 +01001243 } else {
Richard Hendersondc849882021-08-24 07:13:45 -07001244 tcg_opt_gen_mov(&ctx, op, op->args[0], op->args[2]);
Richard Henderson0e28d002016-11-16 09:23:28 +01001245 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001246 continue;
Richard Henderson0e28d002016-11-16 09:23:28 +01001247 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001248 break;
Richard Henderson0e28d002016-11-16 09:23:28 +01001249
Aurelien Jarno7ef55fc2012-09-21 11:07:29 +02001250 CASE_OP_32_64(deposit):
Richard Henderson63490392017-06-20 13:43:15 -07001251 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
1252 tmp = deposit64(arg_info(op->args[1])->val,
1253 op->args[3], op->args[4],
1254 arg_info(op->args[2])->val);
Richard Hendersondc849882021-08-24 07:13:45 -07001255 tcg_opt_gen_movi(&ctx, op, op->args[0], tmp);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001256 continue;
Aurelien Jarno7ef55fc2012-09-21 11:07:29 +02001257 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001258 break;
Richard Henderson6e14e912012-10-02 11:32:24 -07001259
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001260 CASE_OP_32_64(extract):
Richard Henderson63490392017-06-20 13:43:15 -07001261 if (arg_is_const(op->args[1])) {
1262 tmp = extract64(arg_info(op->args[1])->val,
Richard Hendersonacd93702016-12-08 12:28:42 -08001263 op->args[2], op->args[3]);
Richard Hendersondc849882021-08-24 07:13:45 -07001264 tcg_opt_gen_movi(&ctx, op, op->args[0], tmp);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001265 continue;
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001266 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001267 break;
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001268
1269 CASE_OP_32_64(sextract):
Richard Henderson63490392017-06-20 13:43:15 -07001270 if (arg_is_const(op->args[1])) {
1271 tmp = sextract64(arg_info(op->args[1])->val,
Richard Hendersonacd93702016-12-08 12:28:42 -08001272 op->args[2], op->args[3]);
Richard Hendersondc849882021-08-24 07:13:45 -07001273 tcg_opt_gen_movi(&ctx, op, op->args[0], tmp);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001274 continue;
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001275 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001276 break;
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001277
Richard Hendersonfce12962019-02-25 10:29:25 -08001278 CASE_OP_32_64(extract2):
1279 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
Richard Henderson54795542020-09-06 16:21:32 -07001280 uint64_t v1 = arg_info(op->args[1])->val;
1281 uint64_t v2 = arg_info(op->args[2])->val;
1282 int shr = op->args[3];
Richard Hendersonfce12962019-02-25 10:29:25 -08001283
1284 if (opc == INDEX_op_extract2_i64) {
Richard Henderson54795542020-09-06 16:21:32 -07001285 tmp = (v1 >> shr) | (v2 << (64 - shr));
Richard Hendersonfce12962019-02-25 10:29:25 -08001286 } else {
Richard Henderson54795542020-09-06 16:21:32 -07001287 tmp = (int32_t)(((uint32_t)v1 >> shr) |
1288 ((uint32_t)v2 << (32 - shr)));
Richard Hendersonfce12962019-02-25 10:29:25 -08001289 }
Richard Hendersondc849882021-08-24 07:13:45 -07001290 tcg_opt_gen_movi(&ctx, op, op->args[0], tmp);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001291 continue;
Richard Hendersonfce12962019-02-25 10:29:25 -08001292 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001293 break;
Richard Hendersonfce12962019-02-25 10:29:25 -08001294
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +02001295 CASE_OP_32_64(setcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001296 tmp = do_constant_folding_cond(opc, op->args[1],
1297 op->args[2], op->args[3]);
Aurelien Jarnob336ceb2012-09-18 19:37:00 +02001298 if (tmp != 2) {
Richard Hendersondc849882021-08-24 07:13:45 -07001299 tcg_opt_gen_movi(&ctx, op, op->args[0], tmp);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001300 continue;
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +02001301 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001302 break;
Richard Henderson6e14e912012-10-02 11:32:24 -07001303
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001304 CASE_OP_32_64(brcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001305 tmp = do_constant_folding_cond(opc, op->args[0],
1306 op->args[1], op->args[2]);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001307 switch (tmp) {
1308 case 0:
1309 tcg_op_remove(s, op);
1310 continue;
1311 case 1:
1312 memset(&ctx.temps_used, 0, sizeof(ctx.temps_used));
1313 op->opc = opc = INDEX_op_br;
1314 op->args[0] = op->args[3];
Richard Henderson6e14e912012-10-02 11:32:24 -07001315 break;
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001316 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001317 break;
Richard Henderson6e14e912012-10-02 11:32:24 -07001318
Richard Hendersonfa01a202012-09-21 10:13:37 -07001319 CASE_OP_32_64(movcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001320 tmp = do_constant_folding_cond(opc, op->args[1],
1321 op->args[2], op->args[5]);
Aurelien Jarnob336ceb2012-09-18 19:37:00 +02001322 if (tmp != 2) {
Richard Hendersondc849882021-08-24 07:13:45 -07001323 tcg_opt_gen_mov(&ctx, op, op->args[0], op->args[4-tmp]);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001324 continue;
Richard Hendersonfa01a202012-09-21 10:13:37 -07001325 }
Richard Henderson63490392017-06-20 13:43:15 -07001326 if (arg_is_const(op->args[3]) && arg_is_const(op->args[4])) {
Richard Henderson54795542020-09-06 16:21:32 -07001327 uint64_t tv = arg_info(op->args[3])->val;
1328 uint64_t fv = arg_info(op->args[4])->val;
Richard Hendersonacd93702016-12-08 12:28:42 -08001329 TCGCond cond = op->args[5];
Richard Henderson54795542020-09-06 16:21:32 -07001330
Richard Henderson333b21b2016-10-23 20:44:32 -07001331 if (fv == 1 && tv == 0) {
1332 cond = tcg_invert_cond(cond);
1333 } else if (!(tv == 1 && fv == 0)) {
Richard Hendersonb10f3832021-08-23 22:30:17 -07001334 break;
Richard Henderson333b21b2016-10-23 20:44:32 -07001335 }
Richard Hendersonacd93702016-12-08 12:28:42 -08001336 op->args[3] = cond;
Richard Henderson333b21b2016-10-23 20:44:32 -07001337 op->opc = opc = (opc == INDEX_op_movcond_i32
1338 ? INDEX_op_setcond_i32
1339 : INDEX_op_setcond_i64);
1340 nb_iargs = 2;
1341 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001342 break;
Richard Henderson6e14e912012-10-02 11:32:24 -07001343
Richard Henderson212c3282012-10-02 11:32:28 -07001344 case INDEX_op_add2_i32:
1345 case INDEX_op_sub2_i32:
Richard Henderson63490392017-06-20 13:43:15 -07001346 if (arg_is_const(op->args[2]) && arg_is_const(op->args[3])
1347 && arg_is_const(op->args[4]) && arg_is_const(op->args[5])) {
1348 uint32_t al = arg_info(op->args[2])->val;
1349 uint32_t ah = arg_info(op->args[3])->val;
1350 uint32_t bl = arg_info(op->args[4])->val;
1351 uint32_t bh = arg_info(op->args[5])->val;
Richard Henderson212c3282012-10-02 11:32:28 -07001352 uint64_t a = ((uint64_t)ah << 32) | al;
1353 uint64_t b = ((uint64_t)bh << 32) | bl;
1354 TCGArg rl, rh;
Richard Henderson8fe35e02020-03-30 20:42:43 -07001355 TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_mov_i32);
Richard Henderson212c3282012-10-02 11:32:28 -07001356
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001357 if (opc == INDEX_op_add2_i32) {
Richard Henderson212c3282012-10-02 11:32:28 -07001358 a += b;
1359 } else {
1360 a -= b;
1361 }
1362
Richard Hendersonacd93702016-12-08 12:28:42 -08001363 rl = op->args[0];
1364 rh = op->args[1];
Richard Hendersondc849882021-08-24 07:13:45 -07001365 tcg_opt_gen_movi(&ctx, op, rl, (int32_t)a);
1366 tcg_opt_gen_movi(&ctx, op2, rh, (int32_t)(a >> 32));
Richard Hendersonb10f3832021-08-23 22:30:17 -07001367 continue;
Richard Henderson212c3282012-10-02 11:32:28 -07001368 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001369 break;
Richard Henderson212c3282012-10-02 11:32:28 -07001370
Richard Henderson14149682012-10-02 11:32:30 -07001371 case INDEX_op_mulu2_i32:
Richard Henderson63490392017-06-20 13:43:15 -07001372 if (arg_is_const(op->args[2]) && arg_is_const(op->args[3])) {
1373 uint32_t a = arg_info(op->args[2])->val;
1374 uint32_t b = arg_info(op->args[3])->val;
Richard Henderson14149682012-10-02 11:32:30 -07001375 uint64_t r = (uint64_t)a * b;
1376 TCGArg rl, rh;
Richard Henderson8fe35e02020-03-30 20:42:43 -07001377 TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_mov_i32);
Richard Henderson14149682012-10-02 11:32:30 -07001378
Richard Hendersonacd93702016-12-08 12:28:42 -08001379 rl = op->args[0];
1380 rh = op->args[1];
Richard Hendersondc849882021-08-24 07:13:45 -07001381 tcg_opt_gen_movi(&ctx, op, rl, (int32_t)r);
1382 tcg_opt_gen_movi(&ctx, op2, rh, (int32_t)(r >> 32));
Richard Hendersonb10f3832021-08-23 22:30:17 -07001383 continue;
Richard Henderson14149682012-10-02 11:32:30 -07001384 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001385 break;
Richard Henderson14149682012-10-02 11:32:30 -07001386
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001387 case INDEX_op_brcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -08001388 tmp = do_constant_folding_cond2(&op->args[0], &op->args[2],
1389 op->args[4]);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001390 if (tmp == 0) {
Richard Hendersona7635512014-04-23 22:18:30 -07001391 do_brcond_false:
Richard Hendersonb10f3832021-08-23 22:30:17 -07001392 tcg_op_remove(s, op);
1393 continue;
1394 }
1395 if (tmp == 1) {
1396 do_brcond_true:
1397 op->opc = opc = INDEX_op_br;
1398 op->args[0] = op->args[5];
1399 break;
1400 }
1401 if ((op->args[4] == TCG_COND_LT || op->args[4] == TCG_COND_GE)
1402 && arg_is_const(op->args[2])
1403 && arg_info(op->args[2])->val == 0
1404 && arg_is_const(op->args[3])
1405 && arg_info(op->args[3])->val == 0) {
Richard Henderson6c4382f2012-10-02 11:32:27 -07001406 /* Simplify LT/GE comparisons vs zero to a single compare
1407 vs the high word of the input. */
Richard Hendersona7635512014-04-23 22:18:30 -07001408 do_brcond_high:
Richard Hendersonb10f3832021-08-23 22:30:17 -07001409 op->opc = opc = INDEX_op_brcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001410 op->args[0] = op->args[1];
1411 op->args[1] = op->args[3];
1412 op->args[2] = op->args[4];
1413 op->args[3] = op->args[5];
Richard Hendersonb10f3832021-08-23 22:30:17 -07001414 break;
1415 }
1416 if (op->args[4] == TCG_COND_EQ) {
Richard Hendersona7635512014-04-23 22:18:30 -07001417 /* Simplify EQ comparisons where one of the pairs
1418 can be simplified. */
1419 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001420 op->args[0], op->args[2],
1421 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001422 if (tmp == 0) {
1423 goto do_brcond_false;
1424 } else if (tmp == 1) {
1425 goto do_brcond_high;
1426 }
1427 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001428 op->args[1], op->args[3],
1429 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001430 if (tmp == 0) {
1431 goto do_brcond_false;
1432 } else if (tmp != 1) {
Richard Hendersonb10f3832021-08-23 22:30:17 -07001433 break;
Richard Hendersona7635512014-04-23 22:18:30 -07001434 }
1435 do_brcond_low:
Richard Henderson3b3f8472021-08-23 22:06:31 -07001436 memset(&ctx.temps_used, 0, sizeof(ctx.temps_used));
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001437 op->opc = INDEX_op_brcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001438 op->args[1] = op->args[2];
1439 op->args[2] = op->args[4];
1440 op->args[3] = op->args[5];
Richard Hendersonb10f3832021-08-23 22:30:17 -07001441 break;
1442 }
1443 if (op->args[4] == TCG_COND_NE) {
Richard Hendersona7635512014-04-23 22:18:30 -07001444 /* Simplify NE comparisons where one of the pairs
1445 can be simplified. */
1446 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001447 op->args[0], op->args[2],
1448 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001449 if (tmp == 0) {
1450 goto do_brcond_high;
1451 } else if (tmp == 1) {
1452 goto do_brcond_true;
1453 }
1454 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001455 op->args[1], op->args[3],
1456 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001457 if (tmp == 0) {
1458 goto do_brcond_low;
1459 } else if (tmp == 1) {
1460 goto do_brcond_true;
1461 }
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001462 }
Richard Henderson6c4382f2012-10-02 11:32:27 -07001463 break;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001464
1465 case INDEX_op_setcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -08001466 tmp = do_constant_folding_cond2(&op->args[1], &op->args[3],
1467 op->args[5]);
Richard Henderson6c4382f2012-10-02 11:32:27 -07001468 if (tmp != 2) {
Richard Hendersona7635512014-04-23 22:18:30 -07001469 do_setcond_const:
Richard Hendersondc849882021-08-24 07:13:45 -07001470 tcg_opt_gen_movi(&ctx, op, op->args[0], tmp);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001471 continue;
1472 }
1473 if ((op->args[5] == TCG_COND_LT || op->args[5] == TCG_COND_GE)
1474 && arg_is_const(op->args[3])
1475 && arg_info(op->args[3])->val == 0
1476 && arg_is_const(op->args[4])
1477 && arg_info(op->args[4])->val == 0) {
Richard Henderson6c4382f2012-10-02 11:32:27 -07001478 /* Simplify LT/GE comparisons vs zero to a single compare
1479 vs the high word of the input. */
Richard Hendersona7635512014-04-23 22:18:30 -07001480 do_setcond_high:
Richard Hendersonacd93702016-12-08 12:28:42 -08001481 reset_temp(op->args[0]);
Richard Hendersonb1fde412021-08-23 13:07:49 -07001482 arg_info(op->args[0])->z_mask = 1;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001483 op->opc = INDEX_op_setcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001484 op->args[1] = op->args[2];
1485 op->args[2] = op->args[4];
1486 op->args[3] = op->args[5];
Richard Hendersonb10f3832021-08-23 22:30:17 -07001487 break;
1488 }
1489 if (op->args[5] == TCG_COND_EQ) {
Richard Hendersona7635512014-04-23 22:18:30 -07001490 /* Simplify EQ comparisons where one of the pairs
1491 can be simplified. */
1492 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001493 op->args[1], op->args[3],
1494 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001495 if (tmp == 0) {
1496 goto do_setcond_const;
1497 } else if (tmp == 1) {
1498 goto do_setcond_high;
1499 }
1500 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001501 op->args[2], op->args[4],
1502 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001503 if (tmp == 0) {
1504 goto do_setcond_high;
1505 } else if (tmp != 1) {
Richard Hendersonb10f3832021-08-23 22:30:17 -07001506 break;
Richard Hendersona7635512014-04-23 22:18:30 -07001507 }
1508 do_setcond_low:
Richard Hendersonacd93702016-12-08 12:28:42 -08001509 reset_temp(op->args[0]);
Richard Hendersonb1fde412021-08-23 13:07:49 -07001510 arg_info(op->args[0])->z_mask = 1;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001511 op->opc = INDEX_op_setcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001512 op->args[2] = op->args[3];
1513 op->args[3] = op->args[5];
Richard Hendersonb10f3832021-08-23 22:30:17 -07001514 break;
1515 }
1516 if (op->args[5] == TCG_COND_NE) {
Richard Hendersona7635512014-04-23 22:18:30 -07001517 /* Simplify NE comparisons where one of the pairs
1518 can be simplified. */
1519 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001520 op->args[1], op->args[3],
1521 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001522 if (tmp == 0) {
1523 goto do_setcond_high;
1524 } else if (tmp == 1) {
1525 goto do_setcond_const;
1526 }
1527 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001528 op->args[2], op->args[4],
1529 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001530 if (tmp == 0) {
1531 goto do_setcond_low;
1532 } else if (tmp == 1) {
1533 goto do_setcond_const;
1534 }
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001535 }
Richard Henderson6c4382f2012-10-02 11:32:27 -07001536 break;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001537
Richard Hendersonb10f3832021-08-23 22:30:17 -07001538 default:
1539 break;
1540 }
1541
1542 /* Some of the folding above can change opc. */
1543 opc = op->opc;
1544 def = &tcg_op_defs[opc];
1545 if (def->flags & TCG_OPF_BB_END) {
1546 memset(&ctx.temps_used, 0, sizeof(ctx.temps_used));
1547 } else {
1548 if (opc == INDEX_op_call &&
1549 !(tcg_call_flags(op)
Richard Hendersoncf066672014-03-22 20:06:52 -07001550 & (TCG_CALL_NO_READ_GLOBALS | TCG_CALL_NO_WRITE_GLOBALS))) {
Kirill Batuzov22613af2011-07-07 16:37:13 +04001551 for (i = 0; i < nb_globals; i++) {
Richard Henderson3b3f8472021-08-23 22:06:31 -07001552 if (test_bit(i, ctx.temps_used.l)) {
Richard Henderson63490392017-06-20 13:43:15 -07001553 reset_ts(&s->temps[i]);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +02001554 }
Kirill Batuzov22613af2011-07-07 16:37:13 +04001555 }
1556 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001557
Richard Hendersonb10f3832021-08-23 22:30:17 -07001558 for (i = 0; i < nb_oargs; i++) {
1559 reset_temp(op->args[i]);
1560 /* Save the corresponding known-zero bits mask for the
1561 first output argument (only one supported so far). */
1562 if (i == 0) {
1563 arg_info(op->args[i])->z_mask = z_mask;
Aurelien Jarnoa2550662012-09-19 21:40:30 +02001564 }
Kirill Batuzov22613af2011-07-07 16:37:13 +04001565 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001566 }
Pranith Kumar34f93922016-08-23 09:48:25 -04001567
1568 /* Eliminate duplicate and redundant fence instructions. */
Richard Hendersonacd93702016-12-08 12:28:42 -08001569 if (prev_mb) {
Pranith Kumar34f93922016-08-23 09:48:25 -04001570 switch (opc) {
1571 case INDEX_op_mb:
1572 /* Merge two barriers of the same type into one,
1573 * or a weaker barrier into a stronger one,
1574 * or two weaker barriers into a stronger one.
1575 * mb X; mb Y => mb X|Y
1576 * mb; strl => mb; st
1577 * ldaq; mb => ld; mb
1578 * ldaq; strl => ld; mb; st
1579 * Other combinations are also merged into a strong
1580 * barrier. This is stricter than specified but for
1581 * the purposes of TCG is better than not optimizing.
1582 */
Richard Hendersonacd93702016-12-08 12:28:42 -08001583 prev_mb->args[0] |= op->args[0];
Pranith Kumar34f93922016-08-23 09:48:25 -04001584 tcg_op_remove(s, op);
1585 break;
1586
1587 default:
1588 /* Opcodes that end the block stop the optimization. */
1589 if ((def->flags & TCG_OPF_BB_END) == 0) {
1590 break;
1591 }
1592 /* fallthru */
1593 case INDEX_op_qemu_ld_i32:
1594 case INDEX_op_qemu_ld_i64:
1595 case INDEX_op_qemu_st_i32:
Richard Henderson07ce0b02020-12-09 13:58:39 -06001596 case INDEX_op_qemu_st8_i32:
Pranith Kumar34f93922016-08-23 09:48:25 -04001597 case INDEX_op_qemu_st_i64:
1598 case INDEX_op_call:
1599 /* Opcodes that touch guest memory stop the optimization. */
Richard Hendersonacd93702016-12-08 12:28:42 -08001600 prev_mb = NULL;
Pranith Kumar34f93922016-08-23 09:48:25 -04001601 break;
1602 }
1603 } else if (opc == INDEX_op_mb) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001604 prev_mb = op;
Pranith Kumar34f93922016-08-23 09:48:25 -04001605 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001606 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001607}