blob: 019c5aaf81ef71514bfafaea4747d0baab021424 [file] [log] [blame]
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001/*
2 * Optimizations for Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2010 Samsung Electronics.
5 * Contributed by Kirill Batuzov <batuzovk@ispras.ru>
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25
Peter Maydell757e7252016-01-26 18:17:08 +000026#include "qemu/osdep.h"
Philippe Mathieu-Daudédcb32f12020-01-01 12:23:00 +010027#include "tcg/tcg-op.h"
Richard Henderson90163902021-03-18 10:21:45 -060028#include "tcg-internal.h"
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040029
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040030#define CASE_OP_32_64(x) \
31 glue(glue(case INDEX_op_, x), _i32): \
32 glue(glue(case INDEX_op_, x), _i64)
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040033
Richard Henderson170ba882017-11-22 09:07:11 +010034#define CASE_OP_32_64_VEC(x) \
35 glue(glue(case INDEX_op_, x), _i32): \
36 glue(glue(case INDEX_op_, x), _i64): \
37 glue(glue(case INDEX_op_, x), _vec)
38
Richard Henderson6fcb98e2020-03-30 17:44:30 -070039typedef struct TempOptInfo {
Aurelien Jarnob41059d2015-07-27 12:41:44 +020040 bool is_const;
Richard Henderson63490392017-06-20 13:43:15 -070041 TCGTemp *prev_copy;
42 TCGTemp *next_copy;
Richard Henderson54795542020-09-06 16:21:32 -070043 uint64_t val;
Richard Hendersonb1fde412021-08-23 13:07:49 -070044 uint64_t z_mask; /* mask bit is 0 if and only if value bit is 0 */
Richard Henderson6fcb98e2020-03-30 17:44:30 -070045} TempOptInfo;
Kirill Batuzov22613af2011-07-07 16:37:13 +040046
Richard Henderson3b3f8472021-08-23 22:06:31 -070047typedef struct OptContext {
Richard Hendersondc849882021-08-24 07:13:45 -070048 TCGContext *tcg;
Richard Hendersond0ed5152021-08-24 07:38:39 -070049 TCGOp *prev_mb;
Richard Henderson3b3f8472021-08-23 22:06:31 -070050 TCGTempSet temps_used;
51} OptContext;
52
Richard Henderson6fcb98e2020-03-30 17:44:30 -070053static inline TempOptInfo *ts_info(TCGTemp *ts)
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020054{
Richard Henderson63490392017-06-20 13:43:15 -070055 return ts->state_ptr;
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020056}
57
Richard Henderson6fcb98e2020-03-30 17:44:30 -070058static inline TempOptInfo *arg_info(TCGArg arg)
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020059{
Richard Henderson63490392017-06-20 13:43:15 -070060 return ts_info(arg_temp(arg));
61}
62
63static inline bool ts_is_const(TCGTemp *ts)
64{
65 return ts_info(ts)->is_const;
66}
67
68static inline bool arg_is_const(TCGArg arg)
69{
70 return ts_is_const(arg_temp(arg));
71}
72
73static inline bool ts_is_copy(TCGTemp *ts)
74{
75 return ts_info(ts)->next_copy != ts;
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020076}
77
Aurelien Jarnob41059d2015-07-27 12:41:44 +020078/* Reset TEMP's state, possibly removing the temp for the list of copies. */
Richard Henderson63490392017-06-20 13:43:15 -070079static void reset_ts(TCGTemp *ts)
Kirill Batuzov22613af2011-07-07 16:37:13 +040080{
Richard Henderson6fcb98e2020-03-30 17:44:30 -070081 TempOptInfo *ti = ts_info(ts);
82 TempOptInfo *pi = ts_info(ti->prev_copy);
83 TempOptInfo *ni = ts_info(ti->next_copy);
Richard Henderson63490392017-06-20 13:43:15 -070084
85 ni->prev_copy = ti->prev_copy;
86 pi->next_copy = ti->next_copy;
87 ti->next_copy = ts;
88 ti->prev_copy = ts;
89 ti->is_const = false;
Richard Hendersonb1fde412021-08-23 13:07:49 -070090 ti->z_mask = -1;
Richard Henderson63490392017-06-20 13:43:15 -070091}
92
93static void reset_temp(TCGArg arg)
94{
95 reset_ts(arg_temp(arg));
Kirill Batuzov22613af2011-07-07 16:37:13 +040096}
97
Aurelien Jarno1208d7d2015-07-27 12:41:44 +020098/* Initialize and activate a temporary. */
Richard Henderson3b3f8472021-08-23 22:06:31 -070099static void init_ts_info(OptContext *ctx, TCGTemp *ts)
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200100{
Richard Henderson63490392017-06-20 13:43:15 -0700101 size_t idx = temp_idx(ts);
Richard Henderson8f17a972020-03-30 19:52:02 -0700102 TempOptInfo *ti;
Richard Henderson63490392017-06-20 13:43:15 -0700103
Richard Henderson3b3f8472021-08-23 22:06:31 -0700104 if (test_bit(idx, ctx->temps_used.l)) {
Richard Henderson8f17a972020-03-30 19:52:02 -0700105 return;
106 }
Richard Henderson3b3f8472021-08-23 22:06:31 -0700107 set_bit(idx, ctx->temps_used.l);
Richard Henderson8f17a972020-03-30 19:52:02 -0700108
109 ti = ts->state_ptr;
110 if (ti == NULL) {
111 ti = tcg_malloc(sizeof(TempOptInfo));
Richard Henderson63490392017-06-20 13:43:15 -0700112 ts->state_ptr = ti;
Richard Henderson8f17a972020-03-30 19:52:02 -0700113 }
114
115 ti->next_copy = ts;
116 ti->prev_copy = ts;
117 if (ts->kind == TEMP_CONST) {
118 ti->is_const = true;
119 ti->val = ts->val;
Richard Hendersonb1fde412021-08-23 13:07:49 -0700120 ti->z_mask = ts->val;
Richard Henderson8f17a972020-03-30 19:52:02 -0700121 if (TCG_TARGET_REG_BITS > 32 && ts->type == TCG_TYPE_I32) {
122 /* High bits of a 32-bit quantity are garbage. */
Richard Hendersonb1fde412021-08-23 13:07:49 -0700123 ti->z_mask |= ~0xffffffffull;
Richard Hendersonc0522132020-03-29 18:55:52 -0700124 }
Richard Henderson8f17a972020-03-30 19:52:02 -0700125 } else {
126 ti->is_const = false;
Richard Hendersonb1fde412021-08-23 13:07:49 -0700127 ti->z_mask = -1;
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200128 }
129}
130
Richard Henderson63490392017-06-20 13:43:15 -0700131static TCGTemp *find_better_copy(TCGContext *s, TCGTemp *ts)
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200132{
Richard Henderson4c868ce2020-04-23 09:02:23 -0700133 TCGTemp *i, *g, *l;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200134
Richard Henderson4c868ce2020-04-23 09:02:23 -0700135 /* If this is already readonly, we can't do better. */
136 if (temp_readonly(ts)) {
Richard Henderson63490392017-06-20 13:43:15 -0700137 return ts;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200138 }
139
Richard Henderson4c868ce2020-04-23 09:02:23 -0700140 g = l = NULL;
Richard Henderson63490392017-06-20 13:43:15 -0700141 for (i = ts_info(ts)->next_copy; i != ts; i = ts_info(i)->next_copy) {
Richard Henderson4c868ce2020-04-23 09:02:23 -0700142 if (temp_readonly(i)) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200143 return i;
Richard Henderson4c868ce2020-04-23 09:02:23 -0700144 } else if (i->kind > ts->kind) {
145 if (i->kind == TEMP_GLOBAL) {
146 g = i;
147 } else if (i->kind == TEMP_LOCAL) {
148 l = i;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200149 }
150 }
151 }
152
Richard Henderson4c868ce2020-04-23 09:02:23 -0700153 /* If we didn't find a better representation, return the same temp. */
154 return g ? g : l ? l : ts;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200155}
156
Richard Henderson63490392017-06-20 13:43:15 -0700157static bool ts_are_copies(TCGTemp *ts1, TCGTemp *ts2)
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200158{
Richard Henderson63490392017-06-20 13:43:15 -0700159 TCGTemp *i;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200160
Richard Henderson63490392017-06-20 13:43:15 -0700161 if (ts1 == ts2) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200162 return true;
163 }
164
Richard Henderson63490392017-06-20 13:43:15 -0700165 if (!ts_is_copy(ts1) || !ts_is_copy(ts2)) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200166 return false;
167 }
168
Richard Henderson63490392017-06-20 13:43:15 -0700169 for (i = ts_info(ts1)->next_copy; i != ts1; i = ts_info(i)->next_copy) {
170 if (i == ts2) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200171 return true;
172 }
173 }
174
175 return false;
176}
177
Richard Henderson63490392017-06-20 13:43:15 -0700178static bool args_are_copies(TCGArg arg1, TCGArg arg2)
179{
180 return ts_are_copies(arg_temp(arg1), arg_temp(arg2));
181}
182
Richard Hendersondc849882021-08-24 07:13:45 -0700183static void tcg_opt_gen_mov(OptContext *ctx, TCGOp *op, TCGArg dst, TCGArg src)
Kirill Batuzov22613af2011-07-07 16:37:13 +0400184{
Richard Henderson63490392017-06-20 13:43:15 -0700185 TCGTemp *dst_ts = arg_temp(dst);
186 TCGTemp *src_ts = arg_temp(src);
Richard Henderson170ba882017-11-22 09:07:11 +0100187 const TCGOpDef *def;
Richard Henderson6fcb98e2020-03-30 17:44:30 -0700188 TempOptInfo *di;
189 TempOptInfo *si;
Richard Hendersonb1fde412021-08-23 13:07:49 -0700190 uint64_t z_mask;
Richard Henderson63490392017-06-20 13:43:15 -0700191 TCGOpcode new_op;
192
193 if (ts_are_copies(dst_ts, src_ts)) {
Richard Hendersondc849882021-08-24 07:13:45 -0700194 tcg_op_remove(ctx->tcg, op);
Aurelien Jarno53657182015-06-04 21:53:25 +0200195 return;
196 }
197
Richard Henderson63490392017-06-20 13:43:15 -0700198 reset_ts(dst_ts);
199 di = ts_info(dst_ts);
200 si = ts_info(src_ts);
Richard Henderson170ba882017-11-22 09:07:11 +0100201 def = &tcg_op_defs[op->opc];
202 if (def->flags & TCG_OPF_VECTOR) {
203 new_op = INDEX_op_mov_vec;
204 } else if (def->flags & TCG_OPF_64BIT) {
205 new_op = INDEX_op_mov_i64;
206 } else {
207 new_op = INDEX_op_mov_i32;
208 }
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700209 op->opc = new_op;
Richard Henderson170ba882017-11-22 09:07:11 +0100210 /* TCGOP_VECL and TCGOP_VECE remain unchanged. */
Richard Henderson63490392017-06-20 13:43:15 -0700211 op->args[0] = dst;
212 op->args[1] = src;
Richard Hendersona62f6f52014-05-22 10:59:12 -0700213
Richard Hendersonb1fde412021-08-23 13:07:49 -0700214 z_mask = si->z_mask;
Richard Henderson24666ba2014-05-22 11:14:10 -0700215 if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_mov_i32) {
216 /* High bits of the destination are now garbage. */
Richard Hendersonb1fde412021-08-23 13:07:49 -0700217 z_mask |= ~0xffffffffull;
Richard Henderson24666ba2014-05-22 11:14:10 -0700218 }
Richard Hendersonb1fde412021-08-23 13:07:49 -0700219 di->z_mask = z_mask;
Richard Henderson24666ba2014-05-22 11:14:10 -0700220
Richard Henderson63490392017-06-20 13:43:15 -0700221 if (src_ts->type == dst_ts->type) {
Richard Henderson6fcb98e2020-03-30 17:44:30 -0700222 TempOptInfo *ni = ts_info(si->next_copy);
Richard Henderson63490392017-06-20 13:43:15 -0700223
224 di->next_copy = si->next_copy;
225 di->prev_copy = src_ts;
226 ni->prev_copy = dst_ts;
227 si->next_copy = dst_ts;
228 di->is_const = si->is_const;
229 di->val = si->val;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800230 }
Kirill Batuzov22613af2011-07-07 16:37:13 +0400231}
232
Richard Hendersondc849882021-08-24 07:13:45 -0700233static void tcg_opt_gen_movi(OptContext *ctx, TCGOp *op,
234 TCGArg dst, uint64_t val)
Richard Henderson8fe35e02020-03-30 20:42:43 -0700235{
236 const TCGOpDef *def = &tcg_op_defs[op->opc];
237 TCGType type;
238 TCGTemp *tv;
239
240 if (def->flags & TCG_OPF_VECTOR) {
241 type = TCGOP_VECL(op) + TCG_TYPE_V64;
242 } else if (def->flags & TCG_OPF_64BIT) {
243 type = TCG_TYPE_I64;
244 } else {
245 type = TCG_TYPE_I32;
246 }
247
248 /* Convert movi to mov with constant temp. */
249 tv = tcg_constant_internal(type, val);
Richard Henderson3b3f8472021-08-23 22:06:31 -0700250 init_ts_info(ctx, tv);
Richard Hendersondc849882021-08-24 07:13:45 -0700251 tcg_opt_gen_mov(ctx, op, dst, temp_arg(tv));
Richard Henderson8fe35e02020-03-30 20:42:43 -0700252}
253
Richard Henderson54795542020-09-06 16:21:32 -0700254static uint64_t do_constant_folding_2(TCGOpcode op, uint64_t x, uint64_t y)
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400255{
Richard Henderson03271522013-08-14 14:35:56 -0700256 uint64_t l64, h64;
257
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400258 switch (op) {
259 CASE_OP_32_64(add):
260 return x + y;
261
262 CASE_OP_32_64(sub):
263 return x - y;
264
265 CASE_OP_32_64(mul):
266 return x * y;
267
Kirill Batuzov9a810902011-07-07 16:37:15 +0400268 CASE_OP_32_64(and):
269 return x & y;
270
271 CASE_OP_32_64(or):
272 return x | y;
273
274 CASE_OP_32_64(xor):
275 return x ^ y;
276
Kirill Batuzov55c09752011-07-07 16:37:16 +0400277 case INDEX_op_shl_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700278 return (uint32_t)x << (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400279
Kirill Batuzov55c09752011-07-07 16:37:16 +0400280 case INDEX_op_shl_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700281 return (uint64_t)x << (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400282
283 case INDEX_op_shr_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700284 return (uint32_t)x >> (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400285
Kirill Batuzov55c09752011-07-07 16:37:16 +0400286 case INDEX_op_shr_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700287 return (uint64_t)x >> (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400288
289 case INDEX_op_sar_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700290 return (int32_t)x >> (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400291
Kirill Batuzov55c09752011-07-07 16:37:16 +0400292 case INDEX_op_sar_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700293 return (int64_t)x >> (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400294
295 case INDEX_op_rotr_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700296 return ror32(x, y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400297
Kirill Batuzov55c09752011-07-07 16:37:16 +0400298 case INDEX_op_rotr_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700299 return ror64(x, y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400300
301 case INDEX_op_rotl_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700302 return rol32(x, y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400303
Kirill Batuzov55c09752011-07-07 16:37:16 +0400304 case INDEX_op_rotl_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700305 return rol64(x, y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400306
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700307 CASE_OP_32_64(not):
Kirill Batuzova640f032011-07-07 16:37:17 +0400308 return ~x;
309
Richard Hendersoncb25c802011-08-17 14:11:47 -0700310 CASE_OP_32_64(neg):
311 return -x;
312
313 CASE_OP_32_64(andc):
314 return x & ~y;
315
316 CASE_OP_32_64(orc):
317 return x | ~y;
318
319 CASE_OP_32_64(eqv):
320 return ~(x ^ y);
321
322 CASE_OP_32_64(nand):
323 return ~(x & y);
324
325 CASE_OP_32_64(nor):
326 return ~(x | y);
327
Richard Henderson0e28d002016-11-16 09:23:28 +0100328 case INDEX_op_clz_i32:
329 return (uint32_t)x ? clz32(x) : y;
330
331 case INDEX_op_clz_i64:
332 return x ? clz64(x) : y;
333
334 case INDEX_op_ctz_i32:
335 return (uint32_t)x ? ctz32(x) : y;
336
337 case INDEX_op_ctz_i64:
338 return x ? ctz64(x) : y;
339
Richard Hendersona768e4e2016-11-21 11:13:39 +0100340 case INDEX_op_ctpop_i32:
341 return ctpop32(x);
342
343 case INDEX_op_ctpop_i64:
344 return ctpop64(x);
345
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700346 CASE_OP_32_64(ext8s):
Kirill Batuzova640f032011-07-07 16:37:17 +0400347 return (int8_t)x;
348
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700349 CASE_OP_32_64(ext16s):
Kirill Batuzova640f032011-07-07 16:37:17 +0400350 return (int16_t)x;
351
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700352 CASE_OP_32_64(ext8u):
Kirill Batuzova640f032011-07-07 16:37:17 +0400353 return (uint8_t)x;
354
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700355 CASE_OP_32_64(ext16u):
Kirill Batuzova640f032011-07-07 16:37:17 +0400356 return (uint16_t)x;
357
Richard Henderson64985942018-11-20 08:53:34 +0100358 CASE_OP_32_64(bswap16):
Richard Henderson0b76ff82021-06-13 13:04:00 -0700359 x = bswap16(x);
360 return y & TCG_BSWAP_OS ? (int16_t)x : x;
Richard Henderson64985942018-11-20 08:53:34 +0100361
362 CASE_OP_32_64(bswap32):
Richard Henderson0b76ff82021-06-13 13:04:00 -0700363 x = bswap32(x);
364 return y & TCG_BSWAP_OS ? (int32_t)x : x;
Richard Henderson64985942018-11-20 08:53:34 +0100365
366 case INDEX_op_bswap64_i64:
367 return bswap64(x);
368
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200369 case INDEX_op_ext_i32_i64:
Kirill Batuzova640f032011-07-07 16:37:17 +0400370 case INDEX_op_ext32s_i64:
371 return (int32_t)x;
372
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200373 case INDEX_op_extu_i32_i64:
Richard Henderson609ad702015-07-24 07:16:00 -0700374 case INDEX_op_extrl_i64_i32:
Kirill Batuzova640f032011-07-07 16:37:17 +0400375 case INDEX_op_ext32u_i64:
376 return (uint32_t)x;
Kirill Batuzova640f032011-07-07 16:37:17 +0400377
Richard Henderson609ad702015-07-24 07:16:00 -0700378 case INDEX_op_extrh_i64_i32:
379 return (uint64_t)x >> 32;
380
Richard Henderson03271522013-08-14 14:35:56 -0700381 case INDEX_op_muluh_i32:
382 return ((uint64_t)(uint32_t)x * (uint32_t)y) >> 32;
383 case INDEX_op_mulsh_i32:
384 return ((int64_t)(int32_t)x * (int32_t)y) >> 32;
385
386 case INDEX_op_muluh_i64:
387 mulu64(&l64, &h64, x, y);
388 return h64;
389 case INDEX_op_mulsh_i64:
390 muls64(&l64, &h64, x, y);
391 return h64;
392
Richard Henderson01547f72013-08-14 15:22:46 -0700393 case INDEX_op_div_i32:
394 /* Avoid crashing on divide by zero, otherwise undefined. */
395 return (int32_t)x / ((int32_t)y ? : 1);
396 case INDEX_op_divu_i32:
397 return (uint32_t)x / ((uint32_t)y ? : 1);
398 case INDEX_op_div_i64:
399 return (int64_t)x / ((int64_t)y ? : 1);
400 case INDEX_op_divu_i64:
401 return (uint64_t)x / ((uint64_t)y ? : 1);
402
403 case INDEX_op_rem_i32:
404 return (int32_t)x % ((int32_t)y ? : 1);
405 case INDEX_op_remu_i32:
406 return (uint32_t)x % ((uint32_t)y ? : 1);
407 case INDEX_op_rem_i64:
408 return (int64_t)x % ((int64_t)y ? : 1);
409 case INDEX_op_remu_i64:
410 return (uint64_t)x % ((uint64_t)y ? : 1);
411
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400412 default:
413 fprintf(stderr,
414 "Unrecognized operation %d in do_constant_folding.\n", op);
415 tcg_abort();
416 }
417}
418
Richard Henderson54795542020-09-06 16:21:32 -0700419static uint64_t do_constant_folding(TCGOpcode op, uint64_t x, uint64_t y)
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400420{
Richard Henderson170ba882017-11-22 09:07:11 +0100421 const TCGOpDef *def = &tcg_op_defs[op];
Richard Henderson54795542020-09-06 16:21:32 -0700422 uint64_t res = do_constant_folding_2(op, x, y);
Richard Henderson170ba882017-11-22 09:07:11 +0100423 if (!(def->flags & TCG_OPF_64BIT)) {
Aurelien Jarno29f3ff82015-07-10 18:03:31 +0200424 res = (int32_t)res;
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400425 }
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400426 return res;
427}
428
Richard Henderson9519da72012-10-02 11:32:26 -0700429static bool do_constant_folding_cond_32(uint32_t x, uint32_t y, TCGCond c)
430{
431 switch (c) {
432 case TCG_COND_EQ:
433 return x == y;
434 case TCG_COND_NE:
435 return x != y;
436 case TCG_COND_LT:
437 return (int32_t)x < (int32_t)y;
438 case TCG_COND_GE:
439 return (int32_t)x >= (int32_t)y;
440 case TCG_COND_LE:
441 return (int32_t)x <= (int32_t)y;
442 case TCG_COND_GT:
443 return (int32_t)x > (int32_t)y;
444 case TCG_COND_LTU:
445 return x < y;
446 case TCG_COND_GEU:
447 return x >= y;
448 case TCG_COND_LEU:
449 return x <= y;
450 case TCG_COND_GTU:
451 return x > y;
452 default:
453 tcg_abort();
454 }
455}
456
457static bool do_constant_folding_cond_64(uint64_t x, uint64_t y, TCGCond c)
458{
459 switch (c) {
460 case TCG_COND_EQ:
461 return x == y;
462 case TCG_COND_NE:
463 return x != y;
464 case TCG_COND_LT:
465 return (int64_t)x < (int64_t)y;
466 case TCG_COND_GE:
467 return (int64_t)x >= (int64_t)y;
468 case TCG_COND_LE:
469 return (int64_t)x <= (int64_t)y;
470 case TCG_COND_GT:
471 return (int64_t)x > (int64_t)y;
472 case TCG_COND_LTU:
473 return x < y;
474 case TCG_COND_GEU:
475 return x >= y;
476 case TCG_COND_LEU:
477 return x <= y;
478 case TCG_COND_GTU:
479 return x > y;
480 default:
481 tcg_abort();
482 }
483}
484
485static bool do_constant_folding_cond_eq(TCGCond c)
486{
487 switch (c) {
488 case TCG_COND_GT:
489 case TCG_COND_LTU:
490 case TCG_COND_LT:
491 case TCG_COND_GTU:
492 case TCG_COND_NE:
493 return 0;
494 case TCG_COND_GE:
495 case TCG_COND_GEU:
496 case TCG_COND_LE:
497 case TCG_COND_LEU:
498 case TCG_COND_EQ:
499 return 1;
500 default:
501 tcg_abort();
502 }
503}
504
Aurelien Jarnob336ceb2012-09-18 19:37:00 +0200505/* Return 2 if the condition can't be simplified, and the result
506 of the condition (0 or 1) if it can */
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200507static TCGArg do_constant_folding_cond(TCGOpcode op, TCGArg x,
508 TCGArg y, TCGCond c)
509{
Richard Henderson54795542020-09-06 16:21:32 -0700510 uint64_t xv = arg_info(x)->val;
511 uint64_t yv = arg_info(y)->val;
512
Richard Henderson63490392017-06-20 13:43:15 -0700513 if (arg_is_const(x) && arg_is_const(y)) {
Richard Henderson170ba882017-11-22 09:07:11 +0100514 const TCGOpDef *def = &tcg_op_defs[op];
515 tcg_debug_assert(!(def->flags & TCG_OPF_VECTOR));
516 if (def->flags & TCG_OPF_64BIT) {
Richard Henderson63490392017-06-20 13:43:15 -0700517 return do_constant_folding_cond_64(xv, yv, c);
Richard Henderson170ba882017-11-22 09:07:11 +0100518 } else {
519 return do_constant_folding_cond_32(xv, yv, c);
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200520 }
Richard Henderson63490392017-06-20 13:43:15 -0700521 } else if (args_are_copies(x, y)) {
Richard Henderson9519da72012-10-02 11:32:26 -0700522 return do_constant_folding_cond_eq(c);
Richard Henderson63490392017-06-20 13:43:15 -0700523 } else if (arg_is_const(y) && yv == 0) {
Aurelien Jarnob336ceb2012-09-18 19:37:00 +0200524 switch (c) {
525 case TCG_COND_LTU:
526 return 0;
527 case TCG_COND_GEU:
528 return 1;
529 default:
530 return 2;
531 }
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200532 }
Alex Bennée550276a2016-09-30 22:30:55 +0100533 return 2;
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200534}
535
Richard Henderson6c4382f2012-10-02 11:32:27 -0700536/* Return 2 if the condition can't be simplified, and the result
537 of the condition (0 or 1) if it can */
538static TCGArg do_constant_folding_cond2(TCGArg *p1, TCGArg *p2, TCGCond c)
539{
540 TCGArg al = p1[0], ah = p1[1];
541 TCGArg bl = p2[0], bh = p2[1];
542
Richard Henderson63490392017-06-20 13:43:15 -0700543 if (arg_is_const(bl) && arg_is_const(bh)) {
544 tcg_target_ulong blv = arg_info(bl)->val;
545 tcg_target_ulong bhv = arg_info(bh)->val;
546 uint64_t b = deposit64(blv, 32, 32, bhv);
Richard Henderson6c4382f2012-10-02 11:32:27 -0700547
Richard Henderson63490392017-06-20 13:43:15 -0700548 if (arg_is_const(al) && arg_is_const(ah)) {
549 tcg_target_ulong alv = arg_info(al)->val;
550 tcg_target_ulong ahv = arg_info(ah)->val;
551 uint64_t a = deposit64(alv, 32, 32, ahv);
Richard Henderson6c4382f2012-10-02 11:32:27 -0700552 return do_constant_folding_cond_64(a, b, c);
553 }
554 if (b == 0) {
555 switch (c) {
556 case TCG_COND_LTU:
557 return 0;
558 case TCG_COND_GEU:
559 return 1;
560 default:
561 break;
562 }
563 }
564 }
Richard Henderson63490392017-06-20 13:43:15 -0700565 if (args_are_copies(al, bl) && args_are_copies(ah, bh)) {
Richard Henderson6c4382f2012-10-02 11:32:27 -0700566 return do_constant_folding_cond_eq(c);
567 }
568 return 2;
569}
570
Richard Henderson24c9ae42012-10-02 11:32:21 -0700571static bool swap_commutative(TCGArg dest, TCGArg *p1, TCGArg *p2)
572{
573 TCGArg a1 = *p1, a2 = *p2;
574 int sum = 0;
Richard Henderson63490392017-06-20 13:43:15 -0700575 sum += arg_is_const(a1);
576 sum -= arg_is_const(a2);
Richard Henderson24c9ae42012-10-02 11:32:21 -0700577
578 /* Prefer the constant in second argument, and then the form
579 op a, a, b, which is better handled on non-RISC hosts. */
580 if (sum > 0 || (sum == 0 && dest == a2)) {
581 *p1 = a2;
582 *p2 = a1;
583 return true;
584 }
585 return false;
586}
587
Richard Henderson0bfcb862012-10-02 11:32:23 -0700588static bool swap_commutative2(TCGArg *p1, TCGArg *p2)
589{
590 int sum = 0;
Richard Henderson63490392017-06-20 13:43:15 -0700591 sum += arg_is_const(p1[0]);
592 sum += arg_is_const(p1[1]);
593 sum -= arg_is_const(p2[0]);
594 sum -= arg_is_const(p2[1]);
Richard Henderson0bfcb862012-10-02 11:32:23 -0700595 if (sum > 0) {
596 TCGArg t;
597 t = p1[0], p1[0] = p2[0], p2[0] = t;
598 t = p1[1], p1[1] = p2[1], p2[1] = t;
599 return true;
600 }
601 return false;
602}
603
Richard Hendersone2577ea2021-08-24 08:00:48 -0700604static void init_arguments(OptContext *ctx, TCGOp *op, int nb_args)
605{
606 for (int i = 0; i < nb_args; i++) {
607 TCGTemp *ts = arg_temp(op->args[i]);
608 if (ts) {
609 init_ts_info(ctx, ts);
610 }
611 }
612}
613
Kirill Batuzov22613af2011-07-07 16:37:13 +0400614/* Propagate constants and copies, fold constant expressions. */
Aurelien Jarno36e60ef2015-06-04 21:53:27 +0200615void tcg_optimize(TCGContext *s)
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +0400616{
Richard Henderson8f17a972020-03-30 19:52:02 -0700617 int nb_temps, nb_globals, i;
Richard Hendersond0ed5152021-08-24 07:38:39 -0700618 TCGOp *op, *op_next;
Richard Hendersondc849882021-08-24 07:13:45 -0700619 OptContext ctx = { .tcg = s };
Richard Henderson5d8f5362012-09-21 10:13:38 -0700620
Kirill Batuzov22613af2011-07-07 16:37:13 +0400621 /* Array VALS has an element for each temp.
622 If this temp holds a constant then its value is kept in VALS' element.
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200623 If this temp is a copy of other ones then the other copies are
624 available through the doubly linked circular list. */
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +0400625
626 nb_temps = s->nb_temps;
627 nb_globals = s->nb_globals;
Richard Henderson8f17a972020-03-30 19:52:02 -0700628
Richard Henderson8f17a972020-03-30 19:52:02 -0700629 for (i = 0; i < nb_temps; ++i) {
630 s->temps[i].state_ptr = NULL;
631 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +0400632
Richard Henderson15fa08f2017-11-02 15:19:14 +0100633 QTAILQ_FOREACH_SAFE(op, &s->ops, link, op_next) {
Richard Hendersonb1fde412021-08-23 13:07:49 -0700634 uint64_t z_mask, partmask, affected, tmp;
Richard Henderson8f17a972020-03-30 19:52:02 -0700635 int nb_oargs, nb_iargs;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700636 TCGOpcode opc = op->opc;
637 const TCGOpDef *def = &tcg_op_defs[opc];
638
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200639 /* Count the arguments, and initialize the temps that are
640 going to be used */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700641 if (opc == INDEX_op_call) {
Richard Hendersoncd9090a2017-11-14 13:02:51 +0100642 nb_oargs = TCGOP_CALLO(op);
643 nb_iargs = TCGOP_CALLI(op);
Aurelien Jarno1ff8c542012-09-11 16:18:49 +0200644 } else {
Richard Hendersoncf066672014-03-22 20:06:52 -0700645 nb_oargs = def->nb_oargs;
646 nb_iargs = def->nb_iargs;
Richard Hendersoncf066672014-03-22 20:06:52 -0700647 }
Richard Hendersone2577ea2021-08-24 08:00:48 -0700648 init_arguments(&ctx, op, nb_oargs + nb_iargs);
Richard Hendersoncf066672014-03-22 20:06:52 -0700649
650 /* Do copy propagation */
651 for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
Richard Henderson63490392017-06-20 13:43:15 -0700652 TCGTemp *ts = arg_temp(op->args[i]);
653 if (ts && ts_is_copy(ts)) {
654 op->args[i] = temp_arg(find_better_copy(s, ts));
Kirill Batuzov22613af2011-07-07 16:37:13 +0400655 }
656 }
657
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400658 /* For commutative operations make constant second argument */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700659 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +0100660 CASE_OP_32_64_VEC(add):
661 CASE_OP_32_64_VEC(mul):
662 CASE_OP_32_64_VEC(and):
663 CASE_OP_32_64_VEC(or):
664 CASE_OP_32_64_VEC(xor):
Richard Hendersoncb25c802011-08-17 14:11:47 -0700665 CASE_OP_32_64(eqv):
666 CASE_OP_32_64(nand):
667 CASE_OP_32_64(nor):
Richard Henderson03271522013-08-14 14:35:56 -0700668 CASE_OP_32_64(muluh):
669 CASE_OP_32_64(mulsh):
Richard Hendersonacd93702016-12-08 12:28:42 -0800670 swap_commutative(op->args[0], &op->args[1], &op->args[2]);
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400671 break;
Aurelien Jarno65a7cce2012-09-06 16:47:14 +0200672 CASE_OP_32_64(brcond):
Richard Hendersonacd93702016-12-08 12:28:42 -0800673 if (swap_commutative(-1, &op->args[0], &op->args[1])) {
674 op->args[2] = tcg_swap_cond(op->args[2]);
Aurelien Jarno65a7cce2012-09-06 16:47:14 +0200675 }
676 break;
677 CASE_OP_32_64(setcond):
Richard Hendersonacd93702016-12-08 12:28:42 -0800678 if (swap_commutative(op->args[0], &op->args[1], &op->args[2])) {
679 op->args[3] = tcg_swap_cond(op->args[3]);
Aurelien Jarno65a7cce2012-09-06 16:47:14 +0200680 }
681 break;
Richard Hendersonfa01a202012-09-21 10:13:37 -0700682 CASE_OP_32_64(movcond):
Richard Hendersonacd93702016-12-08 12:28:42 -0800683 if (swap_commutative(-1, &op->args[1], &op->args[2])) {
684 op->args[5] = tcg_swap_cond(op->args[5]);
Richard Hendersonfa01a202012-09-21 10:13:37 -0700685 }
Richard Henderson5d8f5362012-09-21 10:13:38 -0700686 /* For movcond, we canonicalize the "false" input reg to match
687 the destination reg so that the tcg backend can implement
688 a "move if true" operation. */
Richard Hendersonacd93702016-12-08 12:28:42 -0800689 if (swap_commutative(op->args[0], &op->args[4], &op->args[3])) {
690 op->args[5] = tcg_invert_cond(op->args[5]);
Richard Henderson5d8f5362012-09-21 10:13:38 -0700691 }
Richard Henderson1e484e62012-10-02 11:32:22 -0700692 break;
Richard Hendersond7156f72013-02-19 23:51:52 -0800693 CASE_OP_32_64(add2):
Richard Hendersonacd93702016-12-08 12:28:42 -0800694 swap_commutative(op->args[0], &op->args[2], &op->args[4]);
695 swap_commutative(op->args[1], &op->args[3], &op->args[5]);
Richard Henderson1e484e62012-10-02 11:32:22 -0700696 break;
Richard Hendersond7156f72013-02-19 23:51:52 -0800697 CASE_OP_32_64(mulu2):
Richard Henderson4d3203f2013-02-19 23:51:53 -0800698 CASE_OP_32_64(muls2):
Richard Hendersonacd93702016-12-08 12:28:42 -0800699 swap_commutative(op->args[0], &op->args[2], &op->args[3]);
Richard Henderson14149682012-10-02 11:32:30 -0700700 break;
Richard Henderson0bfcb862012-10-02 11:32:23 -0700701 case INDEX_op_brcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -0800702 if (swap_commutative2(&op->args[0], &op->args[2])) {
703 op->args[4] = tcg_swap_cond(op->args[4]);
Richard Henderson0bfcb862012-10-02 11:32:23 -0700704 }
705 break;
706 case INDEX_op_setcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -0800707 if (swap_commutative2(&op->args[1], &op->args[3])) {
708 op->args[5] = tcg_swap_cond(op->args[5]);
Richard Henderson0bfcb862012-10-02 11:32:23 -0700709 }
710 break;
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400711 default:
712 break;
713 }
714
Richard Henderson2d497542013-03-21 09:13:33 -0700715 /* Simplify expressions for "shift/rot r, 0, a => movi r, 0",
716 and "sub r, 0, a => neg r, a" case. */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700717 switch (opc) {
Aurelien Jarno01ee5282012-09-06 16:47:14 +0200718 CASE_OP_32_64(shl):
719 CASE_OP_32_64(shr):
720 CASE_OP_32_64(sar):
721 CASE_OP_32_64(rotl):
722 CASE_OP_32_64(rotr):
Richard Henderson63490392017-06-20 13:43:15 -0700723 if (arg_is_const(op->args[1])
724 && arg_info(op->args[1])->val == 0) {
Richard Hendersondc849882021-08-24 07:13:45 -0700725 tcg_opt_gen_movi(&ctx, op, op->args[0], 0);
Aurelien Jarno01ee5282012-09-06 16:47:14 +0200726 continue;
727 }
728 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100729 CASE_OP_32_64_VEC(sub):
Richard Henderson2d497542013-03-21 09:13:33 -0700730 {
731 TCGOpcode neg_op;
732 bool have_neg;
733
Richard Henderson63490392017-06-20 13:43:15 -0700734 if (arg_is_const(op->args[2])) {
Richard Henderson2d497542013-03-21 09:13:33 -0700735 /* Proceed with possible constant folding. */
736 break;
737 }
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700738 if (opc == INDEX_op_sub_i32) {
Richard Henderson2d497542013-03-21 09:13:33 -0700739 neg_op = INDEX_op_neg_i32;
740 have_neg = TCG_TARGET_HAS_neg_i32;
Richard Henderson170ba882017-11-22 09:07:11 +0100741 } else if (opc == INDEX_op_sub_i64) {
Richard Henderson2d497542013-03-21 09:13:33 -0700742 neg_op = INDEX_op_neg_i64;
743 have_neg = TCG_TARGET_HAS_neg_i64;
Richard Hendersonac383dde2019-04-20 00:27:24 +0000744 } else if (TCG_TARGET_HAS_neg_vec) {
745 TCGType type = TCGOP_VECL(op) + TCG_TYPE_V64;
746 unsigned vece = TCGOP_VECE(op);
Richard Henderson170ba882017-11-22 09:07:11 +0100747 neg_op = INDEX_op_neg_vec;
Richard Hendersonac383dde2019-04-20 00:27:24 +0000748 have_neg = tcg_can_emit_vec_op(neg_op, type, vece) > 0;
749 } else {
750 break;
Richard Henderson2d497542013-03-21 09:13:33 -0700751 }
752 if (!have_neg) {
753 break;
754 }
Richard Henderson63490392017-06-20 13:43:15 -0700755 if (arg_is_const(op->args[1])
756 && arg_info(op->args[1])->val == 0) {
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700757 op->opc = neg_op;
Richard Hendersonacd93702016-12-08 12:28:42 -0800758 reset_temp(op->args[0]);
759 op->args[1] = op->args[2];
Richard Henderson2d497542013-03-21 09:13:33 -0700760 continue;
761 }
762 }
763 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100764 CASE_OP_32_64_VEC(xor):
Richard Hendersone201b562014-01-28 13:15:38 -0800765 CASE_OP_32_64(nand):
Richard Henderson63490392017-06-20 13:43:15 -0700766 if (!arg_is_const(op->args[1])
767 && arg_is_const(op->args[2])
768 && arg_info(op->args[2])->val == -1) {
Richard Hendersone201b562014-01-28 13:15:38 -0800769 i = 1;
770 goto try_not;
771 }
772 break;
773 CASE_OP_32_64(nor):
Richard Henderson63490392017-06-20 13:43:15 -0700774 if (!arg_is_const(op->args[1])
775 && arg_is_const(op->args[2])
776 && arg_info(op->args[2])->val == 0) {
Richard Hendersone201b562014-01-28 13:15:38 -0800777 i = 1;
778 goto try_not;
779 }
780 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100781 CASE_OP_32_64_VEC(andc):
Richard Henderson63490392017-06-20 13:43:15 -0700782 if (!arg_is_const(op->args[2])
783 && arg_is_const(op->args[1])
784 && arg_info(op->args[1])->val == -1) {
Richard Hendersone201b562014-01-28 13:15:38 -0800785 i = 2;
786 goto try_not;
787 }
788 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100789 CASE_OP_32_64_VEC(orc):
Richard Hendersone201b562014-01-28 13:15:38 -0800790 CASE_OP_32_64(eqv):
Richard Henderson63490392017-06-20 13:43:15 -0700791 if (!arg_is_const(op->args[2])
792 && arg_is_const(op->args[1])
793 && arg_info(op->args[1])->val == 0) {
Richard Hendersone201b562014-01-28 13:15:38 -0800794 i = 2;
795 goto try_not;
796 }
797 break;
798 try_not:
799 {
800 TCGOpcode not_op;
801 bool have_not;
802
Richard Henderson170ba882017-11-22 09:07:11 +0100803 if (def->flags & TCG_OPF_VECTOR) {
804 not_op = INDEX_op_not_vec;
805 have_not = TCG_TARGET_HAS_not_vec;
806 } else if (def->flags & TCG_OPF_64BIT) {
Richard Hendersone201b562014-01-28 13:15:38 -0800807 not_op = INDEX_op_not_i64;
808 have_not = TCG_TARGET_HAS_not_i64;
809 } else {
810 not_op = INDEX_op_not_i32;
811 have_not = TCG_TARGET_HAS_not_i32;
812 }
813 if (!have_not) {
814 break;
815 }
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700816 op->opc = not_op;
Richard Hendersonacd93702016-12-08 12:28:42 -0800817 reset_temp(op->args[0]);
818 op->args[1] = op->args[i];
Richard Hendersone201b562014-01-28 13:15:38 -0800819 continue;
820 }
Aurelien Jarno01ee5282012-09-06 16:47:14 +0200821 default:
822 break;
823 }
824
Richard Henderson464a1442014-01-31 07:42:11 -0600825 /* Simplify expression for "op r, a, const => mov r, a" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700826 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +0100827 CASE_OP_32_64_VEC(add):
828 CASE_OP_32_64_VEC(sub):
829 CASE_OP_32_64_VEC(or):
830 CASE_OP_32_64_VEC(xor):
831 CASE_OP_32_64_VEC(andc):
Kirill Batuzov55c09752011-07-07 16:37:16 +0400832 CASE_OP_32_64(shl):
833 CASE_OP_32_64(shr):
834 CASE_OP_32_64(sar):
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700835 CASE_OP_32_64(rotl):
836 CASE_OP_32_64(rotr):
Richard Henderson63490392017-06-20 13:43:15 -0700837 if (!arg_is_const(op->args[1])
838 && arg_is_const(op->args[2])
839 && arg_info(op->args[2])->val == 0) {
Richard Hendersondc849882021-08-24 07:13:45 -0700840 tcg_opt_gen_mov(&ctx, op, op->args[0], op->args[1]);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200841 continue;
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400842 }
843 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100844 CASE_OP_32_64_VEC(and):
845 CASE_OP_32_64_VEC(orc):
Richard Henderson464a1442014-01-31 07:42:11 -0600846 CASE_OP_32_64(eqv):
Richard Henderson63490392017-06-20 13:43:15 -0700847 if (!arg_is_const(op->args[1])
848 && arg_is_const(op->args[2])
849 && arg_info(op->args[2])->val == -1) {
Richard Hendersondc849882021-08-24 07:13:45 -0700850 tcg_opt_gen_mov(&ctx, op, op->args[0], op->args[1]);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200851 continue;
Richard Henderson464a1442014-01-31 07:42:11 -0600852 }
853 break;
Aurelien Jarno56e49432012-09-06 16:47:13 +0200854 default:
855 break;
856 }
857
Aurelien Jarno30312442013-09-03 08:27:38 +0200858 /* Simplify using known-zero bits. Currently only ops with a single
859 output argument is supported. */
Richard Hendersonb1fde412021-08-23 13:07:49 -0700860 z_mask = -1;
Paolo Bonzini633f6502013-01-11 15:42:53 -0800861 affected = -1;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700862 switch (opc) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800863 CASE_OP_32_64(ext8s):
Richard Hendersonb1fde412021-08-23 13:07:49 -0700864 if ((arg_info(op->args[1])->z_mask & 0x80) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800865 break;
866 }
Thomas Huthd84568b2020-12-11 16:24:24 +0100867 QEMU_FALLTHROUGH;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800868 CASE_OP_32_64(ext8u):
Richard Hendersonb1fde412021-08-23 13:07:49 -0700869 z_mask = 0xff;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800870 goto and_const;
871 CASE_OP_32_64(ext16s):
Richard Hendersonb1fde412021-08-23 13:07:49 -0700872 if ((arg_info(op->args[1])->z_mask & 0x8000) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800873 break;
874 }
Thomas Huthd84568b2020-12-11 16:24:24 +0100875 QEMU_FALLTHROUGH;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800876 CASE_OP_32_64(ext16u):
Richard Hendersonb1fde412021-08-23 13:07:49 -0700877 z_mask = 0xffff;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800878 goto and_const;
879 case INDEX_op_ext32s_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -0700880 if ((arg_info(op->args[1])->z_mask & 0x80000000) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800881 break;
882 }
Thomas Huthd84568b2020-12-11 16:24:24 +0100883 QEMU_FALLTHROUGH;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800884 case INDEX_op_ext32u_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -0700885 z_mask = 0xffffffffU;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800886 goto and_const;
887
888 CASE_OP_32_64(and):
Richard Hendersonb1fde412021-08-23 13:07:49 -0700889 z_mask = arg_info(op->args[2])->z_mask;
Richard Henderson63490392017-06-20 13:43:15 -0700890 if (arg_is_const(op->args[2])) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800891 and_const:
Richard Hendersonb1fde412021-08-23 13:07:49 -0700892 affected = arg_info(op->args[1])->z_mask & ~z_mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800893 }
Richard Hendersonb1fde412021-08-23 13:07:49 -0700894 z_mask = arg_info(op->args[1])->z_mask & z_mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800895 break;
896
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200897 case INDEX_op_ext_i32_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -0700898 if ((arg_info(op->args[1])->z_mask & 0x80000000) != 0) {
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200899 break;
900 }
Thomas Huthd84568b2020-12-11 16:24:24 +0100901 QEMU_FALLTHROUGH;
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200902 case INDEX_op_extu_i32_i64:
903 /* We do not compute affected as it is a size changing op. */
Richard Hendersonb1fde412021-08-23 13:07:49 -0700904 z_mask = (uint32_t)arg_info(op->args[1])->z_mask;
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200905 break;
906
Richard Henderson23ec69ed2014-01-28 12:03:24 -0800907 CASE_OP_32_64(andc):
908 /* Known-zeros does not imply known-ones. Therefore unless
Richard Hendersonacd93702016-12-08 12:28:42 -0800909 op->args[2] is constant, we can't infer anything from it. */
Richard Henderson63490392017-06-20 13:43:15 -0700910 if (arg_is_const(op->args[2])) {
Richard Hendersonb1fde412021-08-23 13:07:49 -0700911 z_mask = ~arg_info(op->args[2])->z_mask;
Richard Henderson23ec69ed2014-01-28 12:03:24 -0800912 goto and_const;
913 }
Richard Henderson63490392017-06-20 13:43:15 -0700914 /* But we certainly know nothing outside args[1] may be set. */
Richard Hendersonb1fde412021-08-23 13:07:49 -0700915 z_mask = arg_info(op->args[1])->z_mask;
Richard Henderson23ec69ed2014-01-28 12:03:24 -0800916 break;
917
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200918 case INDEX_op_sar_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700919 if (arg_is_const(op->args[2])) {
920 tmp = arg_info(op->args[2])->val & 31;
Richard Hendersonb1fde412021-08-23 13:07:49 -0700921 z_mask = (int32_t)arg_info(op->args[1])->z_mask >> tmp;
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200922 }
923 break;
924 case INDEX_op_sar_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700925 if (arg_is_const(op->args[2])) {
926 tmp = arg_info(op->args[2])->val & 63;
Richard Hendersonb1fde412021-08-23 13:07:49 -0700927 z_mask = (int64_t)arg_info(op->args[1])->z_mask >> tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800928 }
929 break;
930
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200931 case INDEX_op_shr_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700932 if (arg_is_const(op->args[2])) {
933 tmp = arg_info(op->args[2])->val & 31;
Richard Hendersonb1fde412021-08-23 13:07:49 -0700934 z_mask = (uint32_t)arg_info(op->args[1])->z_mask >> tmp;
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200935 }
936 break;
937 case INDEX_op_shr_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700938 if (arg_is_const(op->args[2])) {
939 tmp = arg_info(op->args[2])->val & 63;
Richard Hendersonb1fde412021-08-23 13:07:49 -0700940 z_mask = (uint64_t)arg_info(op->args[1])->z_mask >> tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800941 }
942 break;
943
Richard Henderson609ad702015-07-24 07:16:00 -0700944 case INDEX_op_extrl_i64_i32:
Richard Hendersonb1fde412021-08-23 13:07:49 -0700945 z_mask = (uint32_t)arg_info(op->args[1])->z_mask;
Richard Henderson609ad702015-07-24 07:16:00 -0700946 break;
947 case INDEX_op_extrh_i64_i32:
Richard Hendersonb1fde412021-08-23 13:07:49 -0700948 z_mask = (uint64_t)arg_info(op->args[1])->z_mask >> 32;
Richard Henderson4bb7a412013-09-09 17:03:24 -0700949 break;
950
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800951 CASE_OP_32_64(shl):
Richard Henderson63490392017-06-20 13:43:15 -0700952 if (arg_is_const(op->args[2])) {
953 tmp = arg_info(op->args[2])->val & (TCG_TARGET_REG_BITS - 1);
Richard Hendersonb1fde412021-08-23 13:07:49 -0700954 z_mask = arg_info(op->args[1])->z_mask << tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800955 }
956 break;
957
958 CASE_OP_32_64(neg):
959 /* Set to 1 all bits to the left of the rightmost. */
Richard Hendersonb1fde412021-08-23 13:07:49 -0700960 z_mask = -(arg_info(op->args[1])->z_mask
961 & -arg_info(op->args[1])->z_mask);
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800962 break;
963
964 CASE_OP_32_64(deposit):
Richard Hendersonb1fde412021-08-23 13:07:49 -0700965 z_mask = deposit64(arg_info(op->args[1])->z_mask,
966 op->args[3], op->args[4],
967 arg_info(op->args[2])->z_mask);
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800968 break;
969
Richard Henderson7ec8bab2016-10-14 12:04:32 -0500970 CASE_OP_32_64(extract):
Richard Hendersonb1fde412021-08-23 13:07:49 -0700971 z_mask = extract64(arg_info(op->args[1])->z_mask,
972 op->args[2], op->args[3]);
Richard Hendersonacd93702016-12-08 12:28:42 -0800973 if (op->args[2] == 0) {
Richard Hendersonb1fde412021-08-23 13:07:49 -0700974 affected = arg_info(op->args[1])->z_mask & ~z_mask;
Richard Henderson7ec8bab2016-10-14 12:04:32 -0500975 }
976 break;
977 CASE_OP_32_64(sextract):
Richard Hendersonb1fde412021-08-23 13:07:49 -0700978 z_mask = sextract64(arg_info(op->args[1])->z_mask,
979 op->args[2], op->args[3]);
980 if (op->args[2] == 0 && (tcg_target_long)z_mask >= 0) {
981 affected = arg_info(op->args[1])->z_mask & ~z_mask;
Richard Henderson7ec8bab2016-10-14 12:04:32 -0500982 }
983 break;
984
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800985 CASE_OP_32_64(or):
986 CASE_OP_32_64(xor):
Richard Hendersonb1fde412021-08-23 13:07:49 -0700987 z_mask = arg_info(op->args[1])->z_mask
988 | arg_info(op->args[2])->z_mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800989 break;
990
Richard Henderson0e28d002016-11-16 09:23:28 +0100991 case INDEX_op_clz_i32:
992 case INDEX_op_ctz_i32:
Richard Hendersonb1fde412021-08-23 13:07:49 -0700993 z_mask = arg_info(op->args[2])->z_mask | 31;
Richard Henderson0e28d002016-11-16 09:23:28 +0100994 break;
995
996 case INDEX_op_clz_i64:
997 case INDEX_op_ctz_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -0700998 z_mask = arg_info(op->args[2])->z_mask | 63;
Richard Henderson0e28d002016-11-16 09:23:28 +0100999 break;
1000
Richard Hendersona768e4e2016-11-21 11:13:39 +01001001 case INDEX_op_ctpop_i32:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001002 z_mask = 32 | 31;
Richard Hendersona768e4e2016-11-21 11:13:39 +01001003 break;
1004 case INDEX_op_ctpop_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001005 z_mask = 64 | 63;
Richard Hendersona768e4e2016-11-21 11:13:39 +01001006 break;
1007
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001008 CASE_OP_32_64(setcond):
Richard Hendersona7635512014-04-23 22:18:30 -07001009 case INDEX_op_setcond2_i32:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001010 z_mask = 1;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001011 break;
1012
1013 CASE_OP_32_64(movcond):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001014 z_mask = arg_info(op->args[3])->z_mask
1015 | arg_info(op->args[4])->z_mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001016 break;
1017
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001018 CASE_OP_32_64(ld8u):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001019 z_mask = 0xff;
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001020 break;
1021 CASE_OP_32_64(ld16u):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001022 z_mask = 0xffff;
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001023 break;
1024 case INDEX_op_ld32u_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001025 z_mask = 0xffffffffu;
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001026 break;
1027
1028 CASE_OP_32_64(qemu_ld):
1029 {
Richard Henderson9002ffc2021-07-25 12:06:49 -10001030 MemOpIdx oi = op->args[nb_oargs + nb_iargs];
Tony Nguyen14776ab2019-08-24 04:10:58 +10001031 MemOp mop = get_memop(oi);
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001032 if (!(mop & MO_SIGN)) {
Richard Hendersonb1fde412021-08-23 13:07:49 -07001033 z_mask = (2ULL << ((8 << (mop & MO_SIZE)) - 1)) - 1;
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001034 }
1035 }
1036 break;
1037
Richard Henderson0b76ff82021-06-13 13:04:00 -07001038 CASE_OP_32_64(bswap16):
Richard Hendersonb1fde412021-08-23 13:07:49 -07001039 z_mask = arg_info(op->args[1])->z_mask;
1040 if (z_mask <= 0xffff) {
Richard Henderson0b76ff82021-06-13 13:04:00 -07001041 op->args[2] |= TCG_BSWAP_IZ;
1042 }
Richard Hendersonb1fde412021-08-23 13:07:49 -07001043 z_mask = bswap16(z_mask);
Richard Henderson0b76ff82021-06-13 13:04:00 -07001044 switch (op->args[2] & (TCG_BSWAP_OZ | TCG_BSWAP_OS)) {
1045 case TCG_BSWAP_OZ:
1046 break;
1047 case TCG_BSWAP_OS:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001048 z_mask = (int16_t)z_mask;
Richard Henderson0b76ff82021-06-13 13:04:00 -07001049 break;
1050 default: /* undefined high bits */
Richard Hendersonb1fde412021-08-23 13:07:49 -07001051 z_mask |= MAKE_64BIT_MASK(16, 48);
Richard Henderson0b76ff82021-06-13 13:04:00 -07001052 break;
1053 }
1054 break;
1055
1056 case INDEX_op_bswap32_i64:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001057 z_mask = arg_info(op->args[1])->z_mask;
1058 if (z_mask <= 0xffffffffu) {
Richard Henderson0b76ff82021-06-13 13:04:00 -07001059 op->args[2] |= TCG_BSWAP_IZ;
1060 }
Richard Hendersonb1fde412021-08-23 13:07:49 -07001061 z_mask = bswap32(z_mask);
Richard Henderson0b76ff82021-06-13 13:04:00 -07001062 switch (op->args[2] & (TCG_BSWAP_OZ | TCG_BSWAP_OS)) {
1063 case TCG_BSWAP_OZ:
1064 break;
1065 case TCG_BSWAP_OS:
Richard Hendersonb1fde412021-08-23 13:07:49 -07001066 z_mask = (int32_t)z_mask;
Richard Henderson0b76ff82021-06-13 13:04:00 -07001067 break;
1068 default: /* undefined high bits */
Richard Hendersonb1fde412021-08-23 13:07:49 -07001069 z_mask |= MAKE_64BIT_MASK(32, 32);
Richard Henderson0b76ff82021-06-13 13:04:00 -07001070 break;
1071 }
1072 break;
1073
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001074 default:
1075 break;
1076 }
1077
Richard Hendersonbc8d6882014-06-08 18:24:14 -07001078 /* 32-bit ops generate 32-bit results. For the result is zero test
1079 below, we can ignore high bits, but for further optimizations we
1080 need to record that the high bits contain garbage. */
Richard Hendersonb1fde412021-08-23 13:07:49 -07001081 partmask = z_mask;
Richard Hendersonbc8d6882014-06-08 18:24:14 -07001082 if (!(def->flags & TCG_OPF_64BIT)) {
Richard Hendersonb1fde412021-08-23 13:07:49 -07001083 z_mask |= ~(tcg_target_ulong)0xffffffffu;
Richard Henderson24666ba2014-05-22 11:14:10 -07001084 partmask &= 0xffffffffu;
1085 affected &= 0xffffffffu;
Aurelien Jarnof096dc92013-09-03 08:27:38 +02001086 }
1087
Richard Henderson24666ba2014-05-22 11:14:10 -07001088 if (partmask == 0) {
Aurelien Jarnoeabb7b92016-04-21 10:48:49 +02001089 tcg_debug_assert(nb_oargs == 1);
Richard Hendersondc849882021-08-24 07:13:45 -07001090 tcg_opt_gen_movi(&ctx, op, op->args[0], 0);
Paolo Bonzini633f6502013-01-11 15:42:53 -08001091 continue;
1092 }
1093 if (affected == 0) {
Aurelien Jarnoeabb7b92016-04-21 10:48:49 +02001094 tcg_debug_assert(nb_oargs == 1);
Richard Hendersondc849882021-08-24 07:13:45 -07001095 tcg_opt_gen_mov(&ctx, op, op->args[0], op->args[1]);
Paolo Bonzini633f6502013-01-11 15:42:53 -08001096 continue;
1097 }
1098
Aurelien Jarno56e49432012-09-06 16:47:13 +02001099 /* Simplify expression for "op r, a, 0 => movi r, 0" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001100 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001101 CASE_OP_32_64_VEC(and):
1102 CASE_OP_32_64_VEC(mul):
Richard Henderson03271522013-08-14 14:35:56 -07001103 CASE_OP_32_64(muluh):
1104 CASE_OP_32_64(mulsh):
Richard Henderson63490392017-06-20 13:43:15 -07001105 if (arg_is_const(op->args[2])
1106 && arg_info(op->args[2])->val == 0) {
Richard Hendersondc849882021-08-24 07:13:45 -07001107 tcg_opt_gen_movi(&ctx, op, op->args[0], 0);
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001108 continue;
1109 }
1110 break;
Aurelien Jarno56e49432012-09-06 16:47:13 +02001111 default:
1112 break;
1113 }
1114
1115 /* Simplify expression for "op r, a, a => mov r, a" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001116 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001117 CASE_OP_32_64_VEC(or):
1118 CASE_OP_32_64_VEC(and):
Richard Henderson63490392017-06-20 13:43:15 -07001119 if (args_are_copies(op->args[1], op->args[2])) {
Richard Hendersondc849882021-08-24 07:13:45 -07001120 tcg_opt_gen_mov(&ctx, op, op->args[0], op->args[1]);
Kirill Batuzov9a810902011-07-07 16:37:15 +04001121 continue;
1122 }
1123 break;
Blue Swirlfe0de7a2011-07-30 19:18:32 +00001124 default:
1125 break;
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001126 }
1127
Aurelien Jarno3c941932012-09-18 19:12:36 +02001128 /* Simplify expression for "op r, a, a => movi r, 0" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001129 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001130 CASE_OP_32_64_VEC(andc):
1131 CASE_OP_32_64_VEC(sub):
1132 CASE_OP_32_64_VEC(xor):
Richard Henderson63490392017-06-20 13:43:15 -07001133 if (args_are_copies(op->args[1], op->args[2])) {
Richard Hendersondc849882021-08-24 07:13:45 -07001134 tcg_opt_gen_movi(&ctx, op, op->args[0], 0);
Aurelien Jarno3c941932012-09-18 19:12:36 +02001135 continue;
1136 }
1137 break;
1138 default:
1139 break;
1140 }
1141
Kirill Batuzov22613af2011-07-07 16:37:13 +04001142 /* Propagate constants through copy operations and do constant
1143 folding. Constants will be substituted to arguments by register
1144 allocator where needed and possible. Also detect copies. */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001145 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001146 CASE_OP_32_64_VEC(mov):
Richard Hendersondc849882021-08-24 07:13:45 -07001147 tcg_opt_gen_mov(&ctx, op, op->args[0], op->args[1]);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001148 continue;
Richard Henderson6e14e912012-10-02 11:32:24 -07001149
Richard Henderson170ba882017-11-22 09:07:11 +01001150 case INDEX_op_dup_vec:
1151 if (arg_is_const(op->args[1])) {
1152 tmp = arg_info(op->args[1])->val;
1153 tmp = dup_const(TCGOP_VECE(op), tmp);
Richard Hendersondc849882021-08-24 07:13:45 -07001154 tcg_opt_gen_movi(&ctx, op, op->args[0], tmp);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001155 continue;
Richard Henderson170ba882017-11-22 09:07:11 +01001156 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001157 break;
Richard Henderson170ba882017-11-22 09:07:11 +01001158
Richard Henderson1dc4fe72020-09-05 17:03:35 -07001159 case INDEX_op_dup2_vec:
1160 assert(TCG_TARGET_REG_BITS == 32);
1161 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
Richard Hendersondc849882021-08-24 07:13:45 -07001162 tcg_opt_gen_movi(&ctx, op, op->args[0],
Richard Henderson0b4286d2020-09-06 17:33:18 -07001163 deposit64(arg_info(op->args[1])->val, 32, 32,
1164 arg_info(op->args[2])->val));
Richard Hendersonb10f3832021-08-23 22:30:17 -07001165 continue;
Richard Henderson1dc4fe72020-09-05 17:03:35 -07001166 } else if (args_are_copies(op->args[1], op->args[2])) {
1167 op->opc = INDEX_op_dup_vec;
1168 TCGOP_VECE(op) = MO_32;
1169 nb_iargs = 1;
1170 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001171 break;
Richard Henderson1dc4fe72020-09-05 17:03:35 -07001172
Kirill Batuzova640f032011-07-07 16:37:17 +04001173 CASE_OP_32_64(not):
Richard Hendersoncb25c802011-08-17 14:11:47 -07001174 CASE_OP_32_64(neg):
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001175 CASE_OP_32_64(ext8s):
1176 CASE_OP_32_64(ext8u):
1177 CASE_OP_32_64(ext16s):
1178 CASE_OP_32_64(ext16u):
Richard Hendersona768e4e2016-11-21 11:13:39 +01001179 CASE_OP_32_64(ctpop):
Kirill Batuzova640f032011-07-07 16:37:17 +04001180 case INDEX_op_ext32s_i64:
1181 case INDEX_op_ext32u_i64:
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +02001182 case INDEX_op_ext_i32_i64:
1183 case INDEX_op_extu_i32_i64:
Richard Henderson609ad702015-07-24 07:16:00 -07001184 case INDEX_op_extrl_i64_i32:
1185 case INDEX_op_extrh_i64_i32:
Richard Henderson63490392017-06-20 13:43:15 -07001186 if (arg_is_const(op->args[1])) {
1187 tmp = do_constant_folding(opc, arg_info(op->args[1])->val, 0);
Richard Hendersondc849882021-08-24 07:13:45 -07001188 tcg_opt_gen_movi(&ctx, op, op->args[0], tmp);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001189 continue;
Kirill Batuzova640f032011-07-07 16:37:17 +04001190 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001191 break;
Richard Henderson6e14e912012-10-02 11:32:24 -07001192
Richard Henderson0b76ff82021-06-13 13:04:00 -07001193 CASE_OP_32_64(bswap16):
1194 CASE_OP_32_64(bswap32):
1195 case INDEX_op_bswap64_i64:
1196 if (arg_is_const(op->args[1])) {
1197 tmp = do_constant_folding(opc, arg_info(op->args[1])->val,
1198 op->args[2]);
Richard Hendersondc849882021-08-24 07:13:45 -07001199 tcg_opt_gen_movi(&ctx, op, op->args[0], tmp);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001200 continue;
Richard Henderson0b76ff82021-06-13 13:04:00 -07001201 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001202 break;
Richard Henderson0b76ff82021-06-13 13:04:00 -07001203
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001204 CASE_OP_32_64(add):
1205 CASE_OP_32_64(sub):
1206 CASE_OP_32_64(mul):
Kirill Batuzov9a810902011-07-07 16:37:15 +04001207 CASE_OP_32_64(or):
1208 CASE_OP_32_64(and):
1209 CASE_OP_32_64(xor):
Kirill Batuzov55c09752011-07-07 16:37:16 +04001210 CASE_OP_32_64(shl):
1211 CASE_OP_32_64(shr):
1212 CASE_OP_32_64(sar):
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001213 CASE_OP_32_64(rotl):
1214 CASE_OP_32_64(rotr):
Richard Hendersoncb25c802011-08-17 14:11:47 -07001215 CASE_OP_32_64(andc):
1216 CASE_OP_32_64(orc):
1217 CASE_OP_32_64(eqv):
1218 CASE_OP_32_64(nand):
1219 CASE_OP_32_64(nor):
Richard Henderson03271522013-08-14 14:35:56 -07001220 CASE_OP_32_64(muluh):
1221 CASE_OP_32_64(mulsh):
Richard Henderson01547f72013-08-14 15:22:46 -07001222 CASE_OP_32_64(div):
1223 CASE_OP_32_64(divu):
1224 CASE_OP_32_64(rem):
1225 CASE_OP_32_64(remu):
Richard Henderson63490392017-06-20 13:43:15 -07001226 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
1227 tmp = do_constant_folding(opc, arg_info(op->args[1])->val,
1228 arg_info(op->args[2])->val);
Richard Hendersondc849882021-08-24 07:13:45 -07001229 tcg_opt_gen_movi(&ctx, op, op->args[0], tmp);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001230 continue;
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001231 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001232 break;
Richard Henderson6e14e912012-10-02 11:32:24 -07001233
Richard Henderson0e28d002016-11-16 09:23:28 +01001234 CASE_OP_32_64(clz):
1235 CASE_OP_32_64(ctz):
Richard Henderson63490392017-06-20 13:43:15 -07001236 if (arg_is_const(op->args[1])) {
1237 TCGArg v = arg_info(op->args[1])->val;
Richard Henderson0e28d002016-11-16 09:23:28 +01001238 if (v != 0) {
1239 tmp = do_constant_folding(opc, v, 0);
Richard Hendersondc849882021-08-24 07:13:45 -07001240 tcg_opt_gen_movi(&ctx, op, op->args[0], tmp);
Richard Henderson0e28d002016-11-16 09:23:28 +01001241 } else {
Richard Hendersondc849882021-08-24 07:13:45 -07001242 tcg_opt_gen_mov(&ctx, op, op->args[0], op->args[2]);
Richard Henderson0e28d002016-11-16 09:23:28 +01001243 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001244 continue;
Richard Henderson0e28d002016-11-16 09:23:28 +01001245 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001246 break;
Richard Henderson0e28d002016-11-16 09:23:28 +01001247
Aurelien Jarno7ef55fc2012-09-21 11:07:29 +02001248 CASE_OP_32_64(deposit):
Richard Henderson63490392017-06-20 13:43:15 -07001249 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
1250 tmp = deposit64(arg_info(op->args[1])->val,
1251 op->args[3], op->args[4],
1252 arg_info(op->args[2])->val);
Richard Hendersondc849882021-08-24 07:13:45 -07001253 tcg_opt_gen_movi(&ctx, op, op->args[0], tmp);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001254 continue;
Aurelien Jarno7ef55fc2012-09-21 11:07:29 +02001255 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001256 break;
Richard Henderson6e14e912012-10-02 11:32:24 -07001257
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001258 CASE_OP_32_64(extract):
Richard Henderson63490392017-06-20 13:43:15 -07001259 if (arg_is_const(op->args[1])) {
1260 tmp = extract64(arg_info(op->args[1])->val,
Richard Hendersonacd93702016-12-08 12:28:42 -08001261 op->args[2], op->args[3]);
Richard Hendersondc849882021-08-24 07:13:45 -07001262 tcg_opt_gen_movi(&ctx, op, op->args[0], tmp);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001263 continue;
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001264 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001265 break;
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001266
1267 CASE_OP_32_64(sextract):
Richard Henderson63490392017-06-20 13:43:15 -07001268 if (arg_is_const(op->args[1])) {
1269 tmp = sextract64(arg_info(op->args[1])->val,
Richard Hendersonacd93702016-12-08 12:28:42 -08001270 op->args[2], op->args[3]);
Richard Hendersondc849882021-08-24 07:13:45 -07001271 tcg_opt_gen_movi(&ctx, op, op->args[0], tmp);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001272 continue;
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001273 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001274 break;
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001275
Richard Hendersonfce12962019-02-25 10:29:25 -08001276 CASE_OP_32_64(extract2):
1277 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
Richard Henderson54795542020-09-06 16:21:32 -07001278 uint64_t v1 = arg_info(op->args[1])->val;
1279 uint64_t v2 = arg_info(op->args[2])->val;
1280 int shr = op->args[3];
Richard Hendersonfce12962019-02-25 10:29:25 -08001281
1282 if (opc == INDEX_op_extract2_i64) {
Richard Henderson54795542020-09-06 16:21:32 -07001283 tmp = (v1 >> shr) | (v2 << (64 - shr));
Richard Hendersonfce12962019-02-25 10:29:25 -08001284 } else {
Richard Henderson54795542020-09-06 16:21:32 -07001285 tmp = (int32_t)(((uint32_t)v1 >> shr) |
1286 ((uint32_t)v2 << (32 - shr)));
Richard Hendersonfce12962019-02-25 10:29:25 -08001287 }
Richard Hendersondc849882021-08-24 07:13:45 -07001288 tcg_opt_gen_movi(&ctx, op, op->args[0], tmp);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001289 continue;
Richard Hendersonfce12962019-02-25 10:29:25 -08001290 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001291 break;
Richard Hendersonfce12962019-02-25 10:29:25 -08001292
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +02001293 CASE_OP_32_64(setcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001294 tmp = do_constant_folding_cond(opc, op->args[1],
1295 op->args[2], op->args[3]);
Aurelien Jarnob336ceb2012-09-18 19:37:00 +02001296 if (tmp != 2) {
Richard Hendersondc849882021-08-24 07:13:45 -07001297 tcg_opt_gen_movi(&ctx, op, op->args[0], tmp);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001298 continue;
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +02001299 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001300 break;
Richard Henderson6e14e912012-10-02 11:32:24 -07001301
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001302 CASE_OP_32_64(brcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001303 tmp = do_constant_folding_cond(opc, op->args[0],
1304 op->args[1], op->args[2]);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001305 switch (tmp) {
1306 case 0:
1307 tcg_op_remove(s, op);
1308 continue;
1309 case 1:
1310 memset(&ctx.temps_used, 0, sizeof(ctx.temps_used));
1311 op->opc = opc = INDEX_op_br;
1312 op->args[0] = op->args[3];
Richard Henderson6e14e912012-10-02 11:32:24 -07001313 break;
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001314 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001315 break;
Richard Henderson6e14e912012-10-02 11:32:24 -07001316
Richard Hendersonfa01a202012-09-21 10:13:37 -07001317 CASE_OP_32_64(movcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001318 tmp = do_constant_folding_cond(opc, op->args[1],
1319 op->args[2], op->args[5]);
Aurelien Jarnob336ceb2012-09-18 19:37:00 +02001320 if (tmp != 2) {
Richard Hendersondc849882021-08-24 07:13:45 -07001321 tcg_opt_gen_mov(&ctx, op, op->args[0], op->args[4-tmp]);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001322 continue;
Richard Hendersonfa01a202012-09-21 10:13:37 -07001323 }
Richard Henderson63490392017-06-20 13:43:15 -07001324 if (arg_is_const(op->args[3]) && arg_is_const(op->args[4])) {
Richard Henderson54795542020-09-06 16:21:32 -07001325 uint64_t tv = arg_info(op->args[3])->val;
1326 uint64_t fv = arg_info(op->args[4])->val;
Richard Hendersonacd93702016-12-08 12:28:42 -08001327 TCGCond cond = op->args[5];
Richard Henderson54795542020-09-06 16:21:32 -07001328
Richard Henderson333b21b2016-10-23 20:44:32 -07001329 if (fv == 1 && tv == 0) {
1330 cond = tcg_invert_cond(cond);
1331 } else if (!(tv == 1 && fv == 0)) {
Richard Hendersonb10f3832021-08-23 22:30:17 -07001332 break;
Richard Henderson333b21b2016-10-23 20:44:32 -07001333 }
Richard Hendersonacd93702016-12-08 12:28:42 -08001334 op->args[3] = cond;
Richard Henderson333b21b2016-10-23 20:44:32 -07001335 op->opc = opc = (opc == INDEX_op_movcond_i32
1336 ? INDEX_op_setcond_i32
1337 : INDEX_op_setcond_i64);
1338 nb_iargs = 2;
1339 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001340 break;
Richard Henderson6e14e912012-10-02 11:32:24 -07001341
Richard Henderson212c3282012-10-02 11:32:28 -07001342 case INDEX_op_add2_i32:
1343 case INDEX_op_sub2_i32:
Richard Henderson63490392017-06-20 13:43:15 -07001344 if (arg_is_const(op->args[2]) && arg_is_const(op->args[3])
1345 && arg_is_const(op->args[4]) && arg_is_const(op->args[5])) {
1346 uint32_t al = arg_info(op->args[2])->val;
1347 uint32_t ah = arg_info(op->args[3])->val;
1348 uint32_t bl = arg_info(op->args[4])->val;
1349 uint32_t bh = arg_info(op->args[5])->val;
Richard Henderson212c3282012-10-02 11:32:28 -07001350 uint64_t a = ((uint64_t)ah << 32) | al;
1351 uint64_t b = ((uint64_t)bh << 32) | bl;
1352 TCGArg rl, rh;
Richard Henderson8fe35e02020-03-30 20:42:43 -07001353 TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_mov_i32);
Richard Henderson212c3282012-10-02 11:32:28 -07001354
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001355 if (opc == INDEX_op_add2_i32) {
Richard Henderson212c3282012-10-02 11:32:28 -07001356 a += b;
1357 } else {
1358 a -= b;
1359 }
1360
Richard Hendersonacd93702016-12-08 12:28:42 -08001361 rl = op->args[0];
1362 rh = op->args[1];
Richard Hendersondc849882021-08-24 07:13:45 -07001363 tcg_opt_gen_movi(&ctx, op, rl, (int32_t)a);
1364 tcg_opt_gen_movi(&ctx, op2, rh, (int32_t)(a >> 32));
Richard Hendersonb10f3832021-08-23 22:30:17 -07001365 continue;
Richard Henderson212c3282012-10-02 11:32:28 -07001366 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001367 break;
Richard Henderson212c3282012-10-02 11:32:28 -07001368
Richard Henderson14149682012-10-02 11:32:30 -07001369 case INDEX_op_mulu2_i32:
Richard Henderson63490392017-06-20 13:43:15 -07001370 if (arg_is_const(op->args[2]) && arg_is_const(op->args[3])) {
1371 uint32_t a = arg_info(op->args[2])->val;
1372 uint32_t b = arg_info(op->args[3])->val;
Richard Henderson14149682012-10-02 11:32:30 -07001373 uint64_t r = (uint64_t)a * b;
1374 TCGArg rl, rh;
Richard Henderson8fe35e02020-03-30 20:42:43 -07001375 TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_mov_i32);
Richard Henderson14149682012-10-02 11:32:30 -07001376
Richard Hendersonacd93702016-12-08 12:28:42 -08001377 rl = op->args[0];
1378 rh = op->args[1];
Richard Hendersondc849882021-08-24 07:13:45 -07001379 tcg_opt_gen_movi(&ctx, op, rl, (int32_t)r);
1380 tcg_opt_gen_movi(&ctx, op2, rh, (int32_t)(r >> 32));
Richard Hendersonb10f3832021-08-23 22:30:17 -07001381 continue;
Richard Henderson14149682012-10-02 11:32:30 -07001382 }
Richard Hendersonb10f3832021-08-23 22:30:17 -07001383 break;
Richard Henderson14149682012-10-02 11:32:30 -07001384
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001385 case INDEX_op_brcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -08001386 tmp = do_constant_folding_cond2(&op->args[0], &op->args[2],
1387 op->args[4]);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001388 if (tmp == 0) {
Richard Hendersona7635512014-04-23 22:18:30 -07001389 do_brcond_false:
Richard Hendersonb10f3832021-08-23 22:30:17 -07001390 tcg_op_remove(s, op);
1391 continue;
1392 }
1393 if (tmp == 1) {
1394 do_brcond_true:
1395 op->opc = opc = INDEX_op_br;
1396 op->args[0] = op->args[5];
1397 break;
1398 }
1399 if ((op->args[4] == TCG_COND_LT || op->args[4] == TCG_COND_GE)
1400 && arg_is_const(op->args[2])
1401 && arg_info(op->args[2])->val == 0
1402 && arg_is_const(op->args[3])
1403 && arg_info(op->args[3])->val == 0) {
Richard Henderson6c4382f2012-10-02 11:32:27 -07001404 /* Simplify LT/GE comparisons vs zero to a single compare
1405 vs the high word of the input. */
Richard Hendersona7635512014-04-23 22:18:30 -07001406 do_brcond_high:
Richard Hendersonb10f3832021-08-23 22:30:17 -07001407 op->opc = opc = INDEX_op_brcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001408 op->args[0] = op->args[1];
1409 op->args[1] = op->args[3];
1410 op->args[2] = op->args[4];
1411 op->args[3] = op->args[5];
Richard Hendersonb10f3832021-08-23 22:30:17 -07001412 break;
1413 }
1414 if (op->args[4] == TCG_COND_EQ) {
Richard Hendersona7635512014-04-23 22:18:30 -07001415 /* Simplify EQ comparisons where one of the pairs
1416 can be simplified. */
1417 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001418 op->args[0], op->args[2],
1419 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001420 if (tmp == 0) {
1421 goto do_brcond_false;
1422 } else if (tmp == 1) {
1423 goto do_brcond_high;
1424 }
1425 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001426 op->args[1], op->args[3],
1427 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001428 if (tmp == 0) {
1429 goto do_brcond_false;
1430 } else if (tmp != 1) {
Richard Hendersonb10f3832021-08-23 22:30:17 -07001431 break;
Richard Hendersona7635512014-04-23 22:18:30 -07001432 }
1433 do_brcond_low:
Richard Henderson3b3f8472021-08-23 22:06:31 -07001434 memset(&ctx.temps_used, 0, sizeof(ctx.temps_used));
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001435 op->opc = INDEX_op_brcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001436 op->args[1] = op->args[2];
1437 op->args[2] = op->args[4];
1438 op->args[3] = op->args[5];
Richard Hendersonb10f3832021-08-23 22:30:17 -07001439 break;
1440 }
1441 if (op->args[4] == TCG_COND_NE) {
Richard Hendersona7635512014-04-23 22:18:30 -07001442 /* Simplify NE comparisons where one of the pairs
1443 can be simplified. */
1444 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001445 op->args[0], op->args[2],
1446 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001447 if (tmp == 0) {
1448 goto do_brcond_high;
1449 } else if (tmp == 1) {
1450 goto do_brcond_true;
1451 }
1452 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001453 op->args[1], op->args[3],
1454 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001455 if (tmp == 0) {
1456 goto do_brcond_low;
1457 } else if (tmp == 1) {
1458 goto do_brcond_true;
1459 }
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001460 }
Richard Henderson6c4382f2012-10-02 11:32:27 -07001461 break;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001462
1463 case INDEX_op_setcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -08001464 tmp = do_constant_folding_cond2(&op->args[1], &op->args[3],
1465 op->args[5]);
Richard Henderson6c4382f2012-10-02 11:32:27 -07001466 if (tmp != 2) {
Richard Hendersona7635512014-04-23 22:18:30 -07001467 do_setcond_const:
Richard Hendersondc849882021-08-24 07:13:45 -07001468 tcg_opt_gen_movi(&ctx, op, op->args[0], tmp);
Richard Hendersonb10f3832021-08-23 22:30:17 -07001469 continue;
1470 }
1471 if ((op->args[5] == TCG_COND_LT || op->args[5] == TCG_COND_GE)
1472 && arg_is_const(op->args[3])
1473 && arg_info(op->args[3])->val == 0
1474 && arg_is_const(op->args[4])
1475 && arg_info(op->args[4])->val == 0) {
Richard Henderson6c4382f2012-10-02 11:32:27 -07001476 /* Simplify LT/GE comparisons vs zero to a single compare
1477 vs the high word of the input. */
Richard Hendersona7635512014-04-23 22:18:30 -07001478 do_setcond_high:
Richard Hendersonacd93702016-12-08 12:28:42 -08001479 reset_temp(op->args[0]);
Richard Hendersonb1fde412021-08-23 13:07:49 -07001480 arg_info(op->args[0])->z_mask = 1;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001481 op->opc = INDEX_op_setcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001482 op->args[1] = op->args[2];
1483 op->args[2] = op->args[4];
1484 op->args[3] = op->args[5];
Richard Hendersonb10f3832021-08-23 22:30:17 -07001485 break;
1486 }
1487 if (op->args[5] == TCG_COND_EQ) {
Richard Hendersona7635512014-04-23 22:18:30 -07001488 /* Simplify EQ comparisons where one of the pairs
1489 can be simplified. */
1490 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001491 op->args[1], op->args[3],
1492 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001493 if (tmp == 0) {
1494 goto do_setcond_const;
1495 } else if (tmp == 1) {
1496 goto do_setcond_high;
1497 }
1498 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001499 op->args[2], op->args[4],
1500 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001501 if (tmp == 0) {
1502 goto do_setcond_high;
1503 } else if (tmp != 1) {
Richard Hendersonb10f3832021-08-23 22:30:17 -07001504 break;
Richard Hendersona7635512014-04-23 22:18:30 -07001505 }
1506 do_setcond_low:
Richard Hendersonacd93702016-12-08 12:28:42 -08001507 reset_temp(op->args[0]);
Richard Hendersonb1fde412021-08-23 13:07:49 -07001508 arg_info(op->args[0])->z_mask = 1;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001509 op->opc = INDEX_op_setcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001510 op->args[2] = op->args[3];
1511 op->args[3] = op->args[5];
Richard Hendersonb10f3832021-08-23 22:30:17 -07001512 break;
1513 }
1514 if (op->args[5] == TCG_COND_NE) {
Richard Hendersona7635512014-04-23 22:18:30 -07001515 /* Simplify NE comparisons where one of the pairs
1516 can be simplified. */
1517 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001518 op->args[1], op->args[3],
1519 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001520 if (tmp == 0) {
1521 goto do_setcond_high;
1522 } else if (tmp == 1) {
1523 goto do_setcond_const;
1524 }
1525 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001526 op->args[2], op->args[4],
1527 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001528 if (tmp == 0) {
1529 goto do_setcond_low;
1530 } else if (tmp == 1) {
1531 goto do_setcond_const;
1532 }
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001533 }
Richard Henderson6c4382f2012-10-02 11:32:27 -07001534 break;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001535
Richard Hendersonb10f3832021-08-23 22:30:17 -07001536 default:
1537 break;
1538 }
1539
1540 /* Some of the folding above can change opc. */
1541 opc = op->opc;
1542 def = &tcg_op_defs[opc];
1543 if (def->flags & TCG_OPF_BB_END) {
1544 memset(&ctx.temps_used, 0, sizeof(ctx.temps_used));
1545 } else {
1546 if (opc == INDEX_op_call &&
1547 !(tcg_call_flags(op)
Richard Hendersoncf066672014-03-22 20:06:52 -07001548 & (TCG_CALL_NO_READ_GLOBALS | TCG_CALL_NO_WRITE_GLOBALS))) {
Kirill Batuzov22613af2011-07-07 16:37:13 +04001549 for (i = 0; i < nb_globals; i++) {
Richard Henderson3b3f8472021-08-23 22:06:31 -07001550 if (test_bit(i, ctx.temps_used.l)) {
Richard Henderson63490392017-06-20 13:43:15 -07001551 reset_ts(&s->temps[i]);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +02001552 }
Kirill Batuzov22613af2011-07-07 16:37:13 +04001553 }
1554 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001555
Richard Hendersonb10f3832021-08-23 22:30:17 -07001556 for (i = 0; i < nb_oargs; i++) {
1557 reset_temp(op->args[i]);
1558 /* Save the corresponding known-zero bits mask for the
1559 first output argument (only one supported so far). */
1560 if (i == 0) {
1561 arg_info(op->args[i])->z_mask = z_mask;
Aurelien Jarnoa2550662012-09-19 21:40:30 +02001562 }
Kirill Batuzov22613af2011-07-07 16:37:13 +04001563 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001564 }
Pranith Kumar34f93922016-08-23 09:48:25 -04001565
1566 /* Eliminate duplicate and redundant fence instructions. */
Richard Hendersond0ed5152021-08-24 07:38:39 -07001567 if (ctx.prev_mb) {
Pranith Kumar34f93922016-08-23 09:48:25 -04001568 switch (opc) {
1569 case INDEX_op_mb:
1570 /* Merge two barriers of the same type into one,
1571 * or a weaker barrier into a stronger one,
1572 * or two weaker barriers into a stronger one.
1573 * mb X; mb Y => mb X|Y
1574 * mb; strl => mb; st
1575 * ldaq; mb => ld; mb
1576 * ldaq; strl => ld; mb; st
1577 * Other combinations are also merged into a strong
1578 * barrier. This is stricter than specified but for
1579 * the purposes of TCG is better than not optimizing.
1580 */
Richard Hendersond0ed5152021-08-24 07:38:39 -07001581 ctx.prev_mb->args[0] |= op->args[0];
Pranith Kumar34f93922016-08-23 09:48:25 -04001582 tcg_op_remove(s, op);
1583 break;
1584
1585 default:
1586 /* Opcodes that end the block stop the optimization. */
1587 if ((def->flags & TCG_OPF_BB_END) == 0) {
1588 break;
1589 }
1590 /* fallthru */
1591 case INDEX_op_qemu_ld_i32:
1592 case INDEX_op_qemu_ld_i64:
1593 case INDEX_op_qemu_st_i32:
Richard Henderson07ce0b02020-12-09 13:58:39 -06001594 case INDEX_op_qemu_st8_i32:
Pranith Kumar34f93922016-08-23 09:48:25 -04001595 case INDEX_op_qemu_st_i64:
1596 case INDEX_op_call:
1597 /* Opcodes that touch guest memory stop the optimization. */
Richard Hendersond0ed5152021-08-24 07:38:39 -07001598 ctx.prev_mb = NULL;
Pranith Kumar34f93922016-08-23 09:48:25 -04001599 break;
1600 }
1601 } else if (opc == INDEX_op_mb) {
Richard Hendersond0ed5152021-08-24 07:38:39 -07001602 ctx.prev_mb = op;
Pranith Kumar34f93922016-08-23 09:48:25 -04001603 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001604 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001605}