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Shawn Guo95ceafd2012-09-06 07:09:11 +00001/*
2 * Copyright (C) 2012 Freescale Semiconductor, Inc.
3 *
Viresh Kumar748c8762014-08-28 11:22:24 +05304 * Copyright (C) 2014 Linaro.
5 * Viresh Kumar <viresh.kumar@linaro.org>
6 *
Shawn Guo95ceafd2012-09-06 07:09:11 +00007 * The OPP code in function cpu0_set_target() is reused from
8 * drivers/cpufreq/omap-cpufreq.c
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
16
17#include <linux/clk.h>
Sudeep KarkadaNageshae1825b22013-09-10 18:59:46 +010018#include <linux/cpu.h>
Eduardo Valentin77cff592013-07-15 09:09:14 -040019#include <linux/cpu_cooling.h>
Shawn Guo95ceafd2012-09-06 07:09:11 +000020#include <linux/cpufreq.h>
Eduardo Valentin77cff592013-07-15 09:09:14 -040021#include <linux/cpumask.h>
Shawn Guo95ceafd2012-09-06 07:09:11 +000022#include <linux/err.h>
23#include <linux/module.h>
24#include <linux/of.h>
Nishanth Menone4db1c72013-09-19 16:03:52 -050025#include <linux/pm_opp.h>
Shawn Guo5553f9e2013-01-30 14:27:49 +000026#include <linux/platform_device.h>
Shawn Guo95ceafd2012-09-06 07:09:11 +000027#include <linux/regulator/consumer.h>
28#include <linux/slab.h>
Eduardo Valentin77cff592013-07-15 09:09:14 -040029#include <linux/thermal.h>
Shawn Guo95ceafd2012-09-06 07:09:11 +000030
Viresh Kumard2f31f12014-08-28 11:22:28 +053031struct private_data {
32 struct device *cpu_dev;
33 struct regulator *cpu_reg;
34 struct thermal_cooling_device *cdev;
35 unsigned int voltage_tolerance; /* in percentage */
36};
Shawn Guo95ceafd2012-09-06 07:09:11 +000037
Viresh Kumar9c0ebcf2013-10-25 19:45:48 +053038static int cpu0_set_target(struct cpufreq_policy *policy, unsigned int index)
Shawn Guo95ceafd2012-09-06 07:09:11 +000039{
Nishanth Menon47d43ba2013-09-19 16:03:51 -050040 struct dev_pm_opp *opp;
Viresh Kumard2f31f12014-08-28 11:22:28 +053041 struct cpufreq_frequency_table *freq_table = policy->freq_table;
42 struct clk *cpu_clk = policy->clk;
43 struct private_data *priv = policy->driver_data;
44 struct device *cpu_dev = priv->cpu_dev;
45 struct regulator *cpu_reg = priv->cpu_reg;
jhbird.choi@samsung.com5df60552013-03-18 08:09:42 +000046 unsigned long volt = 0, volt_old = 0, tol = 0;
Viresh Kumard4019f02013-08-14 19:38:24 +053047 unsigned int old_freq, new_freq;
Guennadi Liakhovetski0ca68432013-02-25 18:22:37 +010048 long freq_Hz, freq_exact;
Shawn Guo95ceafd2012-09-06 07:09:11 +000049 int ret;
50
Shawn Guo95ceafd2012-09-06 07:09:11 +000051 freq_Hz = clk_round_rate(cpu_clk, freq_table[index].frequency * 1000);
Paul Walmsley2209b0c2013-11-25 18:01:18 -080052 if (freq_Hz <= 0)
Shawn Guo95ceafd2012-09-06 07:09:11 +000053 freq_Hz = freq_table[index].frequency * 1000;
Shawn Guo95ceafd2012-09-06 07:09:11 +000054
Viresh Kumard4019f02013-08-14 19:38:24 +053055 freq_exact = freq_Hz;
56 new_freq = freq_Hz / 1000;
57 old_freq = clk_get_rate(cpu_clk) / 1000;
Shawn Guo95ceafd2012-09-06 07:09:11 +000058
Mark Brown4a511de2013-08-13 14:58:24 +020059 if (!IS_ERR(cpu_reg)) {
Nishanth Menon78e8eb82013-01-18 19:52:33 +000060 rcu_read_lock();
Nishanth Menon5d4879c2013-09-19 16:03:50 -050061 opp = dev_pm_opp_find_freq_ceil(cpu_dev, &freq_Hz);
Shawn Guo95ceafd2012-09-06 07:09:11 +000062 if (IS_ERR(opp)) {
Nishanth Menon78e8eb82013-01-18 19:52:33 +000063 rcu_read_unlock();
Viresh Kumarfbd48ca2014-08-28 11:22:27 +053064 dev_err(cpu_dev, "failed to find OPP for %ld\n",
65 freq_Hz);
Viresh Kumard4019f02013-08-14 19:38:24 +053066 return PTR_ERR(opp);
Shawn Guo95ceafd2012-09-06 07:09:11 +000067 }
Nishanth Menon5d4879c2013-09-19 16:03:50 -050068 volt = dev_pm_opp_get_voltage(opp);
Nishanth Menon78e8eb82013-01-18 19:52:33 +000069 rcu_read_unlock();
Viresh Kumard2f31f12014-08-28 11:22:28 +053070 tol = volt * priv->voltage_tolerance / 100;
Shawn Guo95ceafd2012-09-06 07:09:11 +000071 volt_old = regulator_get_voltage(cpu_reg);
72 }
73
Viresh Kumarfbd48ca2014-08-28 11:22:27 +053074 dev_dbg(cpu_dev, "%u MHz, %ld mV --> %u MHz, %ld mV\n",
75 old_freq / 1000, volt_old ? volt_old / 1000 : -1,
76 new_freq / 1000, volt ? volt / 1000 : -1);
Shawn Guo95ceafd2012-09-06 07:09:11 +000077
78 /* scaling up? scale voltage before frequency */
Viresh Kumard4019f02013-08-14 19:38:24 +053079 if (!IS_ERR(cpu_reg) && new_freq > old_freq) {
Shawn Guo95ceafd2012-09-06 07:09:11 +000080 ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
81 if (ret) {
Viresh Kumarfbd48ca2014-08-28 11:22:27 +053082 dev_err(cpu_dev, "failed to scale voltage up: %d\n",
83 ret);
Viresh Kumard4019f02013-08-14 19:38:24 +053084 return ret;
Shawn Guo95ceafd2012-09-06 07:09:11 +000085 }
86 }
87
Guennadi Liakhovetski0ca68432013-02-25 18:22:37 +010088 ret = clk_set_rate(cpu_clk, freq_exact);
Shawn Guo95ceafd2012-09-06 07:09:11 +000089 if (ret) {
Viresh Kumarfbd48ca2014-08-28 11:22:27 +053090 dev_err(cpu_dev, "failed to set clock rate: %d\n", ret);
Mark Brown4a511de2013-08-13 14:58:24 +020091 if (!IS_ERR(cpu_reg))
Shawn Guo95ceafd2012-09-06 07:09:11 +000092 regulator_set_voltage_tol(cpu_reg, volt_old, tol);
Viresh Kumard4019f02013-08-14 19:38:24 +053093 return ret;
Shawn Guo95ceafd2012-09-06 07:09:11 +000094 }
95
96 /* scaling down? scale voltage after frequency */
Viresh Kumard4019f02013-08-14 19:38:24 +053097 if (!IS_ERR(cpu_reg) && new_freq < old_freq) {
Shawn Guo95ceafd2012-09-06 07:09:11 +000098 ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
99 if (ret) {
Viresh Kumarfbd48ca2014-08-28 11:22:27 +0530100 dev_err(cpu_dev, "failed to scale voltage down: %d\n",
101 ret);
Viresh Kumard4019f02013-08-14 19:38:24 +0530102 clk_set_rate(cpu_clk, old_freq * 1000);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000103 }
104 }
105
Viresh Kumarfd143b42013-04-01 12:57:44 +0000106 return ret;
Shawn Guo95ceafd2012-09-06 07:09:11 +0000107}
108
Viresh Kumar95b61052014-08-28 11:22:30 +0530109static int allocate_resources(int cpu, struct device **cdev,
Viresh Kumard2f31f12014-08-28 11:22:28 +0530110 struct regulator **creg, struct clk **cclk)
Shawn Guo95ceafd2012-09-06 07:09:11 +0000111{
Viresh Kumard2f31f12014-08-28 11:22:28 +0530112 struct device *cpu_dev;
113 struct regulator *cpu_reg;
114 struct clk *cpu_clk;
115 int ret = 0;
Viresh Kumar2d2c5e02014-08-28 11:22:29 +0530116 char *reg_cpu0 = "cpu0", *reg_cpu = "cpu", *reg;
Shawn Guo95ceafd2012-09-06 07:09:11 +0000117
Viresh Kumar95b61052014-08-28 11:22:30 +0530118 cpu_dev = get_cpu_device(cpu);
Sudeep KarkadaNageshae1825b22013-09-10 18:59:46 +0100119 if (!cpu_dev) {
Viresh Kumar95b61052014-08-28 11:22:30 +0530120 pr_err("failed to get cpu%d device\n", cpu);
Sudeep KarkadaNageshae1825b22013-09-10 18:59:46 +0100121 return -ENODEV;
122 }
Paolo Pisatif5c3ef22013-03-28 09:24:29 +0000123
Viresh Kumar2d2c5e02014-08-28 11:22:29 +0530124 /* Try "cpu0" for older DTs */
Viresh Kumar95b61052014-08-28 11:22:30 +0530125 if (!cpu)
126 reg = reg_cpu0;
127 else
128 reg = reg_cpu;
Viresh Kumar2d2c5e02014-08-28 11:22:29 +0530129
130try_again:
131 cpu_reg = regulator_get_optional(cpu_dev, reg);
Nishanth Menonfc31d6f2013-05-01 13:38:12 +0000132 if (IS_ERR(cpu_reg)) {
133 /*
Viresh Kumar95b61052014-08-28 11:22:30 +0530134 * If cpu's regulator supply node is present, but regulator is
Nishanth Menonfc31d6f2013-05-01 13:38:12 +0000135 * not yet registered, we should try defering probe.
136 */
137 if (PTR_ERR(cpu_reg) == -EPROBE_DEFER) {
Viresh Kumar95b61052014-08-28 11:22:30 +0530138 dev_dbg(cpu_dev, "cpu%d regulator not ready, retry\n",
139 cpu);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530140 return -EPROBE_DEFER;
Nishanth Menonfc31d6f2013-05-01 13:38:12 +0000141 }
Viresh Kumar2d2c5e02014-08-28 11:22:29 +0530142
143 /* Try with "cpu-supply" */
144 if (reg == reg_cpu0) {
145 reg = reg_cpu;
146 goto try_again;
147 }
148
Viresh Kumar95b61052014-08-28 11:22:30 +0530149 dev_warn(cpu_dev, "failed to get cpu%d regulator: %ld\n",
150 cpu, PTR_ERR(cpu_reg));
Nishanth Menonfc31d6f2013-05-01 13:38:12 +0000151 }
152
Lucas Stache3beb0a2014-05-16 12:20:42 +0200153 cpu_clk = clk_get(cpu_dev, NULL);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000154 if (IS_ERR(cpu_clk)) {
Viresh Kumard2f31f12014-08-28 11:22:28 +0530155 /* put regulator */
156 if (!IS_ERR(cpu_reg))
157 regulator_put(cpu_reg);
158
Shawn Guo95ceafd2012-09-06 07:09:11 +0000159 ret = PTR_ERR(cpu_clk);
Viresh Kumar48a86242014-08-28 11:22:26 +0530160
161 /*
162 * If cpu's clk node is present, but clock is not yet
163 * registered, we should try defering probe.
164 */
165 if (ret == -EPROBE_DEFER)
Viresh Kumar95b61052014-08-28 11:22:30 +0530166 dev_dbg(cpu_dev, "cpu%d clock not ready, retry\n", cpu);
Viresh Kumar48a86242014-08-28 11:22:26 +0530167 else
Viresh Kumar95b61052014-08-28 11:22:30 +0530168 dev_err(cpu_dev, "failed to get cpu%d clock: %d\n", ret,
169 cpu);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530170 } else {
171 *cdev = cpu_dev;
172 *creg = cpu_reg;
173 *cclk = cpu_clk;
174 }
Viresh Kumar48a86242014-08-28 11:22:26 +0530175
Viresh Kumard2f31f12014-08-28 11:22:28 +0530176 return ret;
177}
178
179static int cpu0_cpufreq_init(struct cpufreq_policy *policy)
180{
181 struct cpufreq_frequency_table *freq_table;
182 struct thermal_cooling_device *cdev;
183 struct device_node *np;
184 struct private_data *priv;
185 struct device *cpu_dev;
186 struct regulator *cpu_reg;
187 struct clk *cpu_clk;
188 unsigned int transition_latency;
189 int ret;
190
Viresh Kumar95b61052014-08-28 11:22:30 +0530191 ret = allocate_resources(policy->cpu, &cpu_dev, &cpu_reg, &cpu_clk);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530192 if (ret) {
193 pr_err("%s: Failed to allocate resources\n: %d", __func__, ret);
194 return ret;
195 }
196
197 np = of_node_get(cpu_dev->of_node);
198 if (!np) {
199 dev_err(cpu_dev, "failed to find cpu%d node\n", policy->cpu);
200 ret = -ENOENT;
201 goto out_put_reg_clk;
Shawn Guo95ceafd2012-09-06 07:09:11 +0000202 }
203
Viresh Kumar1bf8cc32014-07-11 20:24:19 +0530204 /* OPPs might be populated at runtime, don't check for error here */
205 of_init_opp_table(cpu_dev);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000206
Nishanth Menon5d4879c2013-09-19 16:03:50 -0500207 ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000208 if (ret) {
Viresh Kumarfbd48ca2014-08-28 11:22:27 +0530209 dev_err(cpu_dev, "failed to init cpufreq table: %d\n", ret);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530210 goto out_put_node;
Shawn Guo95ceafd2012-09-06 07:09:11 +0000211 }
212
Viresh Kumard2f31f12014-08-28 11:22:28 +0530213 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
214 if (!priv) {
215 ret = -ENOMEM;
216 goto out_free_table;
217 }
218
219 of_property_read_u32(np, "voltage-tolerance", &priv->voltage_tolerance);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000220
221 if (of_property_read_u32(np, "clock-latency", &transition_latency))
222 transition_latency = CPUFREQ_ETERNAL;
223
Philipp Zabel43c638e2013-09-26 11:19:37 +0200224 if (!IS_ERR(cpu_reg)) {
Nishanth Menon47d43ba2013-09-19 16:03:51 -0500225 struct dev_pm_opp *opp;
Shawn Guo95ceafd2012-09-06 07:09:11 +0000226 unsigned long min_uV, max_uV;
227 int i;
228
229 /*
230 * OPP is maintained in order of increasing frequency, and
231 * freq_table initialised from OPP is therefore sorted in the
232 * same order.
233 */
234 for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++)
235 ;
Nishanth Menon78e8eb82013-01-18 19:52:33 +0000236 rcu_read_lock();
Nishanth Menon5d4879c2013-09-19 16:03:50 -0500237 opp = dev_pm_opp_find_freq_exact(cpu_dev,
Shawn Guo95ceafd2012-09-06 07:09:11 +0000238 freq_table[0].frequency * 1000, true);
Nishanth Menon5d4879c2013-09-19 16:03:50 -0500239 min_uV = dev_pm_opp_get_voltage(opp);
240 opp = dev_pm_opp_find_freq_exact(cpu_dev,
Shawn Guo95ceafd2012-09-06 07:09:11 +0000241 freq_table[i-1].frequency * 1000, true);
Nishanth Menon5d4879c2013-09-19 16:03:50 -0500242 max_uV = dev_pm_opp_get_voltage(opp);
Nishanth Menon78e8eb82013-01-18 19:52:33 +0000243 rcu_read_unlock();
Shawn Guo95ceafd2012-09-06 07:09:11 +0000244 ret = regulator_set_voltage_time(cpu_reg, min_uV, max_uV);
245 if (ret > 0)
246 transition_latency += ret * 1000;
247 }
248
Eduardo Valentin77cff592013-07-15 09:09:14 -0400249 /*
250 * For now, just loading the cooling device;
251 * thermal DT code takes care of matching them.
252 */
253 if (of_find_property(np, "#cooling-cells", NULL)) {
254 cdev = of_cpufreq_cooling_register(np, cpu_present_mask);
255 if (IS_ERR(cdev))
Viresh Kumarfbd48ca2014-08-28 11:22:27 +0530256 dev_err(cpu_dev,
257 "running cpufreq without cooling device: %ld\n",
258 PTR_ERR(cdev));
Viresh Kumard2f31f12014-08-28 11:22:28 +0530259 else
260 priv->cdev = cdev;
Eduardo Valentin77cff592013-07-15 09:09:14 -0400261 }
Shawn Guo95ceafd2012-09-06 07:09:11 +0000262 of_node_put(np);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530263
264 priv->cpu_dev = cpu_dev;
265 priv->cpu_reg = cpu_reg;
266 policy->driver_data = priv;
267
268 policy->clk = cpu_clk;
269 ret = cpufreq_generic_init(policy, freq_table, transition_latency);
270 if (ret)
271 goto out_cooling_unregister;
272
Shawn Guo95ceafd2012-09-06 07:09:11 +0000273 return 0;
274
Viresh Kumard2f31f12014-08-28 11:22:28 +0530275out_cooling_unregister:
276 cpufreq_cooling_unregister(priv->cdev);
277 kfree(priv);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000278out_free_table:
Nishanth Menon5d4879c2013-09-19 16:03:50 -0500279 dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000280out_put_node:
281 of_node_put(np);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530282out_put_reg_clk:
283 clk_put(cpu_clk);
284 if (!IS_ERR(cpu_reg))
285 regulator_put(cpu_reg);
286
287 return ret;
288}
289
290static int cpu0_cpufreq_exit(struct cpufreq_policy *policy)
291{
292 struct private_data *priv = policy->driver_data;
293
294 cpufreq_cooling_unregister(priv->cdev);
295 dev_pm_opp_free_cpufreq_table(priv->cpu_dev, &policy->freq_table);
296 clk_put(policy->clk);
297 if (!IS_ERR(priv->cpu_reg))
298 regulator_put(priv->cpu_reg);
299 kfree(priv);
300
301 return 0;
302}
303
304static struct cpufreq_driver cpu0_cpufreq_driver = {
305 .flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
306 .verify = cpufreq_generic_frequency_table_verify,
307 .target_index = cpu0_set_target,
308 .get = cpufreq_generic_get,
309 .init = cpu0_cpufreq_init,
310 .exit = cpu0_cpufreq_exit,
311 .name = "generic_cpu0",
312 .attr = cpufreq_generic_attr,
313};
314
315static int cpu0_cpufreq_probe(struct platform_device *pdev)
316{
317 struct device *cpu_dev;
318 struct regulator *cpu_reg;
319 struct clk *cpu_clk;
320 int ret;
321
322 /*
323 * All per-cluster (CPUs sharing clock/voltages) initialization is done
324 * from ->init(). In probe(), we just need to make sure that clk and
325 * regulators are available. Else defer probe and retry.
326 *
327 * FIXME: Is checking this only for CPU0 sufficient ?
328 */
Viresh Kumar95b61052014-08-28 11:22:30 +0530329 ret = allocate_resources(0, &cpu_dev, &cpu_reg, &cpu_clk);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530330 if (ret)
331 return ret;
332
333 clk_put(cpu_clk);
334 if (!IS_ERR(cpu_reg))
335 regulator_put(cpu_reg);
336
337 ret = cpufreq_register_driver(&cpu0_cpufreq_driver);
338 if (ret)
339 dev_err(cpu_dev, "failed register driver: %d\n", ret);
340
Shawn Guo95ceafd2012-09-06 07:09:11 +0000341 return ret;
342}
Shawn Guo5553f9e2013-01-30 14:27:49 +0000343
344static int cpu0_cpufreq_remove(struct platform_device *pdev)
345{
346 cpufreq_unregister_driver(&cpu0_cpufreq_driver);
Shawn Guo5553f9e2013-01-30 14:27:49 +0000347 return 0;
348}
349
350static struct platform_driver cpu0_cpufreq_platdrv = {
351 .driver = {
352 .name = "cpufreq-cpu0",
353 .owner = THIS_MODULE,
354 },
355 .probe = cpu0_cpufreq_probe,
356 .remove = cpu0_cpufreq_remove,
357};
358module_platform_driver(cpu0_cpufreq_platdrv);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000359
Viresh Kumar748c8762014-08-28 11:22:24 +0530360MODULE_AUTHOR("Viresh Kumar <viresh.kumar@linaro.org>");
Shawn Guo95ceafd2012-09-06 07:09:11 +0000361MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>");
362MODULE_DESCRIPTION("Generic CPU0 cpufreq driver");
363MODULE_LICENSE("GPL");