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Shawn Guo95ceafd2012-09-06 07:09:11 +00001/*
2 * Copyright (C) 2012 Freescale Semiconductor, Inc.
3 *
4 * The OPP code in function cpu0_set_target() is reused from
5 * drivers/cpufreq/omap-cpufreq.c
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
13
14#include <linux/clk.h>
Sudeep KarkadaNageshae1825b22013-09-10 18:59:46 +010015#include <linux/cpu.h>
Eduardo Valentin77cff592013-07-15 09:09:14 -040016#include <linux/cpu_cooling.h>
Shawn Guo95ceafd2012-09-06 07:09:11 +000017#include <linux/cpufreq.h>
Eduardo Valentin77cff592013-07-15 09:09:14 -040018#include <linux/cpumask.h>
Shawn Guo95ceafd2012-09-06 07:09:11 +000019#include <linux/err.h>
20#include <linux/module.h>
21#include <linux/of.h>
Nishanth Menone4db1c72013-09-19 16:03:52 -050022#include <linux/pm_opp.h>
Shawn Guo5553f9e2013-01-30 14:27:49 +000023#include <linux/platform_device.h>
Shawn Guo95ceafd2012-09-06 07:09:11 +000024#include <linux/regulator/consumer.h>
25#include <linux/slab.h>
Eduardo Valentin77cff592013-07-15 09:09:14 -040026#include <linux/thermal.h>
Shawn Guo95ceafd2012-09-06 07:09:11 +000027
28static unsigned int transition_latency;
29static unsigned int voltage_tolerance; /* in percentage */
30
31static struct device *cpu_dev;
32static struct clk *cpu_clk;
33static struct regulator *cpu_reg;
34static struct cpufreq_frequency_table *freq_table;
Eduardo Valentin77cff592013-07-15 09:09:14 -040035static struct thermal_cooling_device *cdev;
Shawn Guo95ceafd2012-09-06 07:09:11 +000036
Shawn Guo95ceafd2012-09-06 07:09:11 +000037static unsigned int cpu0_get_speed(unsigned int cpu)
38{
39 return clk_get_rate(cpu_clk) / 1000;
40}
41
Viresh Kumar9c0ebcf2013-10-25 19:45:48 +053042static int cpu0_set_target(struct cpufreq_policy *policy, unsigned int index)
Shawn Guo95ceafd2012-09-06 07:09:11 +000043{
Nishanth Menon47d43ba2013-09-19 16:03:51 -050044 struct dev_pm_opp *opp;
jhbird.choi@samsung.com5df60552013-03-18 08:09:42 +000045 unsigned long volt = 0, volt_old = 0, tol = 0;
Viresh Kumard4019f02013-08-14 19:38:24 +053046 unsigned int old_freq, new_freq;
Guennadi Liakhovetski0ca68432013-02-25 18:22:37 +010047 long freq_Hz, freq_exact;
Shawn Guo95ceafd2012-09-06 07:09:11 +000048 int ret;
49
Shawn Guo95ceafd2012-09-06 07:09:11 +000050 freq_Hz = clk_round_rate(cpu_clk, freq_table[index].frequency * 1000);
51 if (freq_Hz < 0)
52 freq_Hz = freq_table[index].frequency * 1000;
Shawn Guo95ceafd2012-09-06 07:09:11 +000053
Viresh Kumard4019f02013-08-14 19:38:24 +053054 freq_exact = freq_Hz;
55 new_freq = freq_Hz / 1000;
56 old_freq = clk_get_rate(cpu_clk) / 1000;
Shawn Guo95ceafd2012-09-06 07:09:11 +000057
Mark Brown4a511de2013-08-13 14:58:24 +020058 if (!IS_ERR(cpu_reg)) {
Nishanth Menon78e8eb82013-01-18 19:52:33 +000059 rcu_read_lock();
Nishanth Menon5d4879c2013-09-19 16:03:50 -050060 opp = dev_pm_opp_find_freq_ceil(cpu_dev, &freq_Hz);
Shawn Guo95ceafd2012-09-06 07:09:11 +000061 if (IS_ERR(opp)) {
Nishanth Menon78e8eb82013-01-18 19:52:33 +000062 rcu_read_unlock();
Shawn Guo95ceafd2012-09-06 07:09:11 +000063 pr_err("failed to find OPP for %ld\n", freq_Hz);
Viresh Kumard4019f02013-08-14 19:38:24 +053064 return PTR_ERR(opp);
Shawn Guo95ceafd2012-09-06 07:09:11 +000065 }
Nishanth Menon5d4879c2013-09-19 16:03:50 -050066 volt = dev_pm_opp_get_voltage(opp);
Nishanth Menon78e8eb82013-01-18 19:52:33 +000067 rcu_read_unlock();
Shawn Guo95ceafd2012-09-06 07:09:11 +000068 tol = volt * voltage_tolerance / 100;
69 volt_old = regulator_get_voltage(cpu_reg);
70 }
71
72 pr_debug("%u MHz, %ld mV --> %u MHz, %ld mV\n",
Viresh Kumard4019f02013-08-14 19:38:24 +053073 old_freq / 1000, volt_old ? volt_old / 1000 : -1,
74 new_freq / 1000, volt ? volt / 1000 : -1);
Shawn Guo95ceafd2012-09-06 07:09:11 +000075
76 /* scaling up? scale voltage before frequency */
Viresh Kumard4019f02013-08-14 19:38:24 +053077 if (!IS_ERR(cpu_reg) && new_freq > old_freq) {
Shawn Guo95ceafd2012-09-06 07:09:11 +000078 ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
79 if (ret) {
80 pr_err("failed to scale voltage up: %d\n", ret);
Viresh Kumard4019f02013-08-14 19:38:24 +053081 return ret;
Shawn Guo95ceafd2012-09-06 07:09:11 +000082 }
83 }
84
Guennadi Liakhovetski0ca68432013-02-25 18:22:37 +010085 ret = clk_set_rate(cpu_clk, freq_exact);
Shawn Guo95ceafd2012-09-06 07:09:11 +000086 if (ret) {
87 pr_err("failed to set clock rate: %d\n", ret);
Mark Brown4a511de2013-08-13 14:58:24 +020088 if (!IS_ERR(cpu_reg))
Shawn Guo95ceafd2012-09-06 07:09:11 +000089 regulator_set_voltage_tol(cpu_reg, volt_old, tol);
Viresh Kumard4019f02013-08-14 19:38:24 +053090 return ret;
Shawn Guo95ceafd2012-09-06 07:09:11 +000091 }
92
93 /* scaling down? scale voltage after frequency */
Viresh Kumard4019f02013-08-14 19:38:24 +053094 if (!IS_ERR(cpu_reg) && new_freq < old_freq) {
Shawn Guo95ceafd2012-09-06 07:09:11 +000095 ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
96 if (ret) {
97 pr_err("failed to scale voltage down: %d\n", ret);
Viresh Kumard4019f02013-08-14 19:38:24 +053098 clk_set_rate(cpu_clk, old_freq * 1000);
Shawn Guo95ceafd2012-09-06 07:09:11 +000099 }
100 }
101
Viresh Kumarfd143b42013-04-01 12:57:44 +0000102 return ret;
Shawn Guo95ceafd2012-09-06 07:09:11 +0000103}
104
105static int cpu0_cpufreq_init(struct cpufreq_policy *policy)
106{
Viresh Kumar78b3d102013-10-03 20:29:09 +0530107 return cpufreq_generic_init(policy, freq_table, transition_latency);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000108}
109
Shawn Guo95ceafd2012-09-06 07:09:11 +0000110static struct cpufreq_driver cpu0_cpufreq_driver = {
111 .flags = CPUFREQ_STICKY,
Viresh Kumarf793d792013-10-03 20:28:00 +0530112 .verify = cpufreq_generic_frequency_table_verify,
Viresh Kumar9c0ebcf2013-10-25 19:45:48 +0530113 .target_index = cpu0_set_target,
Shawn Guo95ceafd2012-09-06 07:09:11 +0000114 .get = cpu0_get_speed,
115 .init = cpu0_cpufreq_init,
Viresh Kumarf793d792013-10-03 20:28:00 +0530116 .exit = cpufreq_generic_exit,
Shawn Guo95ceafd2012-09-06 07:09:11 +0000117 .name = "generic_cpu0",
Viresh Kumarf793d792013-10-03 20:28:00 +0530118 .attr = cpufreq_generic_attr,
Shawn Guo95ceafd2012-09-06 07:09:11 +0000119};
120
Shawn Guo5553f9e2013-01-30 14:27:49 +0000121static int cpu0_cpufreq_probe(struct platform_device *pdev)
Shawn Guo95ceafd2012-09-06 07:09:11 +0000122{
Sudeep KarkadaNageshaf837a9b2013-06-17 15:04:19 +0100123 struct device_node *np;
Shawn Guo95ceafd2012-09-06 07:09:11 +0000124 int ret;
125
Sudeep KarkadaNageshae1825b22013-09-10 18:59:46 +0100126 cpu_dev = get_cpu_device(0);
127 if (!cpu_dev) {
128 pr_err("failed to get cpu0 device\n");
129 return -ENODEV;
130 }
Paolo Pisatif5c3ef22013-03-28 09:24:29 +0000131
Sudeep KarkadaNageshaf837a9b2013-06-17 15:04:19 +0100132 np = of_node_get(cpu_dev->of_node);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000133 if (!np) {
134 pr_err("failed to find cpu0 node\n");
Sudeep KarkadaNageshaf837a9b2013-06-17 15:04:19 +0100135 return -ENOENT;
Shawn Guo95ceafd2012-09-06 07:09:11 +0000136 }
137
Mark Brown7d748972013-08-09 19:07:12 +0100138 cpu_reg = devm_regulator_get_optional(cpu_dev, "cpu0");
Nishanth Menonfc31d6f2013-05-01 13:38:12 +0000139 if (IS_ERR(cpu_reg)) {
140 /*
141 * If cpu0 regulator supply node is present, but regulator is
142 * not yet registered, we should try defering probe.
143 */
144 if (PTR_ERR(cpu_reg) == -EPROBE_DEFER) {
145 dev_err(cpu_dev, "cpu0 regulator not ready, retry\n");
146 ret = -EPROBE_DEFER;
147 goto out_put_node;
148 }
149 pr_warn("failed to get cpu0 regulator: %ld\n",
150 PTR_ERR(cpu_reg));
Nishanth Menonfc31d6f2013-05-01 13:38:12 +0000151 }
152
Shawn Guo5553f9e2013-01-30 14:27:49 +0000153 cpu_clk = devm_clk_get(cpu_dev, NULL);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000154 if (IS_ERR(cpu_clk)) {
155 ret = PTR_ERR(cpu_clk);
156 pr_err("failed to get cpu0 clock: %d\n", ret);
157 goto out_put_node;
158 }
159
Shawn Guo95ceafd2012-09-06 07:09:11 +0000160 ret = of_init_opp_table(cpu_dev);
161 if (ret) {
162 pr_err("failed to init OPP table: %d\n", ret);
163 goto out_put_node;
164 }
165
Nishanth Menon5d4879c2013-09-19 16:03:50 -0500166 ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000167 if (ret) {
168 pr_err("failed to init cpufreq table: %d\n", ret);
169 goto out_put_node;
170 }
171
172 of_property_read_u32(np, "voltage-tolerance", &voltage_tolerance);
173
174 if (of_property_read_u32(np, "clock-latency", &transition_latency))
175 transition_latency = CPUFREQ_ETERNAL;
176
Philipp Zabel43c638e2013-09-26 11:19:37 +0200177 if (!IS_ERR(cpu_reg)) {
Nishanth Menon47d43ba2013-09-19 16:03:51 -0500178 struct dev_pm_opp *opp;
Shawn Guo95ceafd2012-09-06 07:09:11 +0000179 unsigned long min_uV, max_uV;
180 int i;
181
182 /*
183 * OPP is maintained in order of increasing frequency, and
184 * freq_table initialised from OPP is therefore sorted in the
185 * same order.
186 */
187 for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++)
188 ;
Nishanth Menon78e8eb82013-01-18 19:52:33 +0000189 rcu_read_lock();
Nishanth Menon5d4879c2013-09-19 16:03:50 -0500190 opp = dev_pm_opp_find_freq_exact(cpu_dev,
Shawn Guo95ceafd2012-09-06 07:09:11 +0000191 freq_table[0].frequency * 1000, true);
Nishanth Menon5d4879c2013-09-19 16:03:50 -0500192 min_uV = dev_pm_opp_get_voltage(opp);
193 opp = dev_pm_opp_find_freq_exact(cpu_dev,
Shawn Guo95ceafd2012-09-06 07:09:11 +0000194 freq_table[i-1].frequency * 1000, true);
Nishanth Menon5d4879c2013-09-19 16:03:50 -0500195 max_uV = dev_pm_opp_get_voltage(opp);
Nishanth Menon78e8eb82013-01-18 19:52:33 +0000196 rcu_read_unlock();
Shawn Guo95ceafd2012-09-06 07:09:11 +0000197 ret = regulator_set_voltage_time(cpu_reg, min_uV, max_uV);
198 if (ret > 0)
199 transition_latency += ret * 1000;
200 }
201
202 ret = cpufreq_register_driver(&cpu0_cpufreq_driver);
203 if (ret) {
204 pr_err("failed register driver: %d\n", ret);
205 goto out_free_table;
206 }
207
Eduardo Valentin77cff592013-07-15 09:09:14 -0400208 /*
209 * For now, just loading the cooling device;
210 * thermal DT code takes care of matching them.
211 */
212 if (of_find_property(np, "#cooling-cells", NULL)) {
213 cdev = of_cpufreq_cooling_register(np, cpu_present_mask);
214 if (IS_ERR(cdev))
215 pr_err("running cpufreq without cooling device: %ld\n",
216 PTR_ERR(cdev));
217 }
218
Shawn Guo95ceafd2012-09-06 07:09:11 +0000219 of_node_put(np);
220 return 0;
221
222out_free_table:
Nishanth Menon5d4879c2013-09-19 16:03:50 -0500223 dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000224out_put_node:
225 of_node_put(np);
226 return ret;
227}
Shawn Guo5553f9e2013-01-30 14:27:49 +0000228
229static int cpu0_cpufreq_remove(struct platform_device *pdev)
230{
Eduardo Valentin77cff592013-07-15 09:09:14 -0400231 cpufreq_cooling_unregister(cdev);
Shawn Guo5553f9e2013-01-30 14:27:49 +0000232 cpufreq_unregister_driver(&cpu0_cpufreq_driver);
Nishanth Menon5d4879c2013-09-19 16:03:50 -0500233 dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
Shawn Guo5553f9e2013-01-30 14:27:49 +0000234
235 return 0;
236}
237
238static struct platform_driver cpu0_cpufreq_platdrv = {
239 .driver = {
240 .name = "cpufreq-cpu0",
241 .owner = THIS_MODULE,
242 },
243 .probe = cpu0_cpufreq_probe,
244 .remove = cpu0_cpufreq_remove,
245};
246module_platform_driver(cpu0_cpufreq_platdrv);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000247
248MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>");
249MODULE_DESCRIPTION("Generic CPU0 cpufreq driver");
250MODULE_LICENSE("GPL");