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path: root/target-sh4/cpu.h
AgeCommit message (Expand)Author
2013-02-16target-sh4: Move TCG initialization to SuperHCPU initfnAndreas Färber
2012-12-19fpu: move public header file to include/fpuPaolo Bonzini
2012-12-19exec: move include files to include/exec/Paolo Bonzini
2012-10-31cpus: Pass CPUState to [qemu_]cpu_has_work()Andreas Färber
2012-10-23Rename target_phys_addr_t to hwaddrAvi Kivity
2012-06-04target-sh4: Let cpu_sh4_init() return SuperHCPUAndreas Färber
2012-04-30target-sh4: QOM'ify CPUAndreas Färber
2012-03-14Rename CPUState -> CPUArchStateAndreas Färber
2012-03-14target-sh4: Don't overuse CPUStateAndreas Färber
2011-08-07Remove unused is_softmmu parameter from cpu_handle_mmu_faultBlue Swirl
2011-06-26Move cpu_has_work and cpu_pc_from_tb to cpu.hBlue Swirl
2011-03-03target-sh4: move intr_at_halt out of cpu_halted()Aurelien Jarno
2011-01-26sh4: implement missing mmaped TLB read functionsAurelien Jarno
2011-01-26sh4: implement missing mmaped TLB write functionsAurelien Jarno
2011-01-14target-sh4: fix reset on r2dAurelien Jarno
2011-01-14target-sh4: define FPSCR constantsAurelien Jarno
2011-01-09target-sh4: implement writes to mmaped ITLBAurelien Jarno
2010-10-30target-xxx: Use fprintf_function (format checking)Stefan Weil
2010-07-03remove exec-all.h inclusion from cpu.hPaolo Bonzini
2010-07-03move cpu_pc_from_tb to target-*/exec.hPaolo Bonzini
2010-03-12Target specific usermode cleanupPaul Brook
2010-03-12Move TARGET_PHYS_ADDR_SPACE_BITS to target-*/cpu.h.Richard Henderson
2010-02-09target-sh4: MMU: reduce the size of a TLB entryAurelien Jarno
2010-02-09sh7750: handle MMUCR TI bitAurelien Jarno
2009-10-01Revert "Get rid of _t suffix"Anthony Liguori
2009-10-01Get rid of _t suffixmalc
2009-08-24cleanup cpu-exec.c, part 0/N: consolidate handle_cpu_signalNathan Froyd
2009-07-16Update to a hopefully more future proof FSF addressBlue Swirl
2009-04-01SH: Improve movca.l/ocbi emulation.edgar_igl
2009-03-07The _exit syscall is used for both thread termination in NPTL applications,pbrook
2009-03-03clean build: Fix remaining sh4 warningsaurel32
2009-03-02SH: Implement MOVCO.L and MOVLI.Laurel32
2009-02-07SH7750/51: add register BCR3, BCR4, PCR, RTCOR, RTCNT, RTCSR, SDMR2, SDMR3 an...aurel32
2009-01-04Update FSF address in GPL/LGPL boilerplateaurel32
2008-12-13target-sh4: make the initial value of SR easier to readaurel32
2008-12-13target-sh4: add prefi, icbi, syncoaurel32
2008-12-13target-sh4: add SH7785 as CPU optionaurel32
2008-12-11target-sh4: remove 2 warningsaurel32
2008-12-07SH4: Implement FD bitaurel32
2008-11-18Refactor translation block CPU state handling (Jan Kiszka)aliguori
2008-11-18Convert CPU_PC_FROM_TB to static inline (Jan Kiszka)aliguori
2008-09-15qemu sh4 nptl supportaurel32
2008-09-02sh4: CPU versioning.aurel32
2008-09-01SH4: Remove dyngen leftoversaurel32
2008-08-22[sh4] memory mapped TLB entriesaurel32
2008-08-22[sh4] sleep instructionaurel32
2008-07-01Move interrupt_request and user_mode_only to common cpu state.pbrook
2008-06-29Add instruction counter.pbrook
2008-05-30Fix typo.pbrook
2008-05-30Move clone() register setup to target specific code. Handle fork-like clone.pbrook