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2015-10-08.travis.yml: Run make check for all targets, not just someDavid Gibson
2015-10-08hw: char: Remove unnecessary variableShraddha Barke
2015-10-08hw: timer: Remove unnecessary variableShraddha Barke
2015-10-08qapi: add missing @Marc-André Lureau
2015-10-08MAINTAINERS: Add NSIS file for W32, W64 hostsStefan Weil
2015-10-08target-ppc: Remove unnecessary variableShraddha Barke
2015-10-08target-microblaze: Remove unnecessary variableShraddha Barke
2015-10-08s/cpu_get_real_ticks/cpu_get_host_ticks/Christopher Covington
2015-10-08pc: check for underflow in load_linuxPaolo Bonzini
2015-10-08pci-assign: do not include sys/io.hPaolo Bonzini
2015-10-08block/ssh: remove dead codePaolo Bonzini
2015-10-08imx_serial: Generate interrupt on tx empty if enabledGuenter Roeck
2015-10-08sdhci: Change debug prints to compile unconditionallySai Pavan Boddu
2015-10-08sdhci: use PRIx64 for uint64_t typeSai Pavan Boddu
2015-10-08Add .dir-locals.el file to configure emacs coding styleDaniel P. Berrange
2015-10-08Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20151007' into stagingPeter Maydell
2015-10-08Merge remote-tracking branch 'remotes/rth/tags/pull-tile-20151007' into stagingPeter Maydell
2015-10-08Merge remote-tracking branch 'remotes/ehabkost/tags/numa-pull-request' into s...Peter Maydell
2015-10-07tcg: Adjust CODE_GEN_AVG_BLOCK_SIZERichard Henderson
2015-10-07tcg: Check for overflow via highwater markRichard Henderson
2015-10-07tcg: Allocate a guard page after code_gen_bufferRichard Henderson
2015-10-07tcg: Emit prologue to the beginning of code_gen_bufferRichard Henderson
2015-10-07tcg: Remove tcg_gen_code_search_pcRichard Henderson
2015-10-07tcg: Remove gen_intermediate_code_pcRichard Henderson
2015-10-07tcg: Save insn data and use it in cpu_restore_state_from_tbRichard Henderson
2015-10-07tcg: Pass data argument to restore_state_to_opcRichard Henderson
2015-10-07tcg: Add TCG_MAX_INSNSRichard Henderson
2015-10-07target-*: Drop cpu_gen_code defineRichard Henderson
2015-10-07tcg: Merge cpu_gen_code into tb_gen_codeRichard Henderson
2015-10-07target-sparc: Add npc state to insn_startRichard Henderson
2015-10-07target-sparc: Remove gen_opc_jump_pcRichard Henderson
2015-10-07target-sparc: Split out gen_branch_nRichard Henderson
2015-10-07target-sparc: Tidy gen_branch_a interfaceRichard Henderson
2015-10-07target-cris: Mirror gen_opc_pc into insn_startRichard Henderson
2015-10-07target-sh4: Add flags state to insn_startRichard Henderson
2015-10-07target-s390x: Add cc_op state to insn_startRichard Henderson
2015-10-07target-mips: Add delayed branch state to insn_startRichard Henderson
2015-10-07target-i386: Add cc_op state to insn_startRichard Henderson
2015-10-07target-arm: Add condexec state to insn_startRichard Henderson
2015-10-07tcg: Allow extra data to be attached to insn_startRichard Henderson
2015-10-07target-*: Introduce and use cpu_breakpoint_testRichard Henderson
2015-10-07target-*: Increment num_insns immediately after tcg_gen_insn_startRichard Henderson
2015-10-07target-*: Unconditionally emit tcg_gen_insn_startRichard Henderson
2015-10-07tcg: Rename debug_insn_start to insn_startRichard Henderson
2015-10-07target-tilegx: Support iret instruction and related special registersChen Gang
2015-10-07target-tilegx: Use TILEGX_EXCP_OPCODE_UNKNOWN and TILEGX_EXCP_OPCODE_UNIMPLEM...Chen Gang
2015-10-07target-tilegx: Implement v2mults instructionChen Gang
2015-10-07target-tilegx: Implement v?int_* instructions.Chen Gang
2015-10-07target-tilegx: Implement v2sh* instructionsChen Gang
2015-10-07target-tilegx: Handle nofault prefetch instructionsRichard Henderson