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authorRichard Henderson <rth@twiddle.net>2015-08-30 09:24:58 -0700
committerRichard Henderson <rth@twiddle.net>2015-10-07 20:36:46 +1100
commit2066d09516ba34d0d180fdea451436d9babb3308 (patch)
tree0012a26ff9806e3d8c419497746a471f272d6f7a
parent52e971d9ff67e340ac2a86bd67e14bd31c7991e0 (diff)
downloadqemu-arm-2066d09516ba34d0d180fdea451436d9babb3308.tar.gz
target-i386: Add cc_op state to insn_start
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
-rw-r--r--target-i386/cpu.h1
-rw-r--r--target-i386/translate.c2
2 files changed, 2 insertions, 1 deletions
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 8926780e85..2b2a29d6a5 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -794,6 +794,7 @@ typedef struct {
#define MAX_GP_COUNTERS (MSR_IA32_PERF_STATUS - MSR_P6_EVNTSEL0)
#define NB_MMU_MODES 3
+#define TARGET_INSN_START_EXTRA_WORDS 1
#define NB_OPMASK_REGS 8
diff --git a/target-i386/translate.c b/target-i386/translate.c
index 9ec9c4c61a..7501b919e3 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -7949,7 +7949,7 @@ static inline void gen_intermediate_code_internal(X86CPU *cpu,
tcg_ctx.gen_opc_instr_start[lj] = 1;
tcg_ctx.gen_opc_icount[lj] = num_insns;
}
- tcg_gen_insn_start(pc_ptr);
+ tcg_gen_insn_start(pc_ptr, dc->cc_op);
num_insns++;
/* If RF is set, suppress an internally generated breakpoint. */