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AgeCommit message (Expand)Author
2024-05-16Fix zeroing part of SVE register for Neon INS (#95)mmc28a
2024-02-15Add support for implicit checks (#86)Chris Jones
2024-02-09Fix some portability and build problems (#89)mmc28a
2023-12-08Update code coverage (#83)Chris Jones
2023-09-13Add branch interception to VIXL simulator (#77)Chris Jones
2023-06-14Update code coverage record (#73)mmc28a
2023-05-09Small optimisation for Assembler::Emit (#71)mmc28a
2023-02-24Update code coverage record (#67)mmc28a
2023-02-08Regression test for SVE loads/stores with sp base address (#65)mmc28a
2023-01-17Fix register trace involving sp and xzr (#59)mmc28a
2022-10-19Update code coverage records (#50)mmc28a
2022-09-15Fix disassembly of Neon by-element instructions (#45)mmc28a
2022-08-11Update code coverage resultsMartyn Capewell
2022-08-10Add support for MOPS instructionsMartyn Capewell
2022-08-04Merge branch 'main' into mteMartyn Capewell
2022-07-26[mte] Fix casts for Mac buildsMartyn Capewell
2022-05-26Update code coverage resultsMartyn Capewell
2022-04-29Remove per-instruction functions and data structuresMartyn Capewell
2022-04-21[mte] Add cache maintenance operationsMartyn Capewell
2022-03-17Clear upper parts of register in scalar [su]cvtf simulationMartyn Capewell
2022-03-09Add explicit IsImmediatePre/PostIndex testsMartyn Capewell
2022-01-21Update code coverage (#18)mmc28a
2022-01-04Update code coverage record. (#12)TatWai Chong
2021-11-16Remove unallocated encodings from disassembly of Neon Across groupMartyn Capewell
2021-10-01Add support for Neon mixed-sign dot product instructionsMartyn Capewell
2021-09-21Add missing addressing mode for ld1rq and ldnt1Martyn Capewell
2021-07-15Prevent tests passing with old code coverage data.Martyn Capewell
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-10 02:58:09 +0000