| Age | Commit message (Expand) | Author |
|---|---|---|
| 2023-06-20 | Improve SIMD & FP constant materialization (#74) | Anton Kirilov |
| 2023-01-17 | Fix register trace involving sp and xzr (#59) | mmc28a |
| 2022-03-24 | Fix tracing atomic instructions | Martyn Capewell |
| 2021-10-28 | Fix disassembly of indexed FMUL | Martyn Capewell |
| 2020-06-25 | [sve] Remove extra spaces from load/store register lists. | Jacob Bramley |
| 2020-06-24 | [sve] Make modifiers lower case in disassembly | Martyn Capewell |
| 2020-01-13 | [sve] Add SVE tests to cpufeatures tests. | Jacob Bramley |
| 2018-09-06 | Check CPU features in the Simulator and Disassembler. | Jacob Bramley |
 |
index : vixl.git | |
| mirror of https://github.com/Linaro/vixl |
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