bellard | d19893d | 2003-06-15 19:58:51 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Host code generation |
| 3 | * |
| 4 | * Copyright (c) 2003 Fabrice Bellard |
| 5 | * |
| 6 | * This library is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU Lesser General Public |
| 8 | * License as published by the Free Software Foundation; either |
| 9 | * version 2 of the License, or (at your option) any later version. |
| 10 | * |
| 11 | * This library is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 14 | * Lesser General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU Lesser General Public |
| 17 | * License along with this library; if not, write to the Free Software |
| 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 19 | */ |
| 20 | #include <stdarg.h> |
| 21 | #include <stdlib.h> |
| 22 | #include <stdio.h> |
| 23 | #include <string.h> |
| 24 | #include <inttypes.h> |
| 25 | |
| 26 | #include "config.h" |
bellard | 2054396 | 2003-06-15 23:28:43 +0000 | [diff] [blame] | 27 | |
bellard | af5ad10 | 2004-01-04 23:28:12 +0000 | [diff] [blame] | 28 | #define NO_CPU_IO_DEFS |
bellard | d3eead2 | 2003-09-30 20:59:51 +0000 | [diff] [blame] | 29 | #include "cpu.h" |
| 30 | #include "exec-all.h" |
bellard | d19893d | 2003-06-15 19:58:51 +0000 | [diff] [blame] | 31 | #include "disas.h" |
| 32 | |
| 33 | enum { |
| 34 | #define DEF(s, n, copy_size) INDEX_op_ ## s, |
bellard | d3eead2 | 2003-09-30 20:59:51 +0000 | [diff] [blame] | 35 | #include "opc.h" |
bellard | d19893d | 2003-06-15 19:58:51 +0000 | [diff] [blame] | 36 | #undef DEF |
| 37 | NB_OPS, |
| 38 | }; |
| 39 | |
| 40 | #include "dyngen.h" |
bellard | d3eead2 | 2003-09-30 20:59:51 +0000 | [diff] [blame] | 41 | #include "op.h" |
bellard | d19893d | 2003-06-15 19:58:51 +0000 | [diff] [blame] | 42 | |
| 43 | uint16_t gen_opc_buf[OPC_BUF_SIZE]; |
| 44 | uint32_t gen_opparam_buf[OPPARAM_BUF_SIZE]; |
bellard | c468787 | 2005-01-03 23:44:44 +0000 | [diff] [blame^] | 45 | long gen_labels[OPC_BUF_SIZE]; |
| 46 | int nb_gen_labels; |
| 47 | |
| 48 | target_ulong gen_opc_pc[OPC_BUF_SIZE]; |
bellard | d19893d | 2003-06-15 19:58:51 +0000 | [diff] [blame] | 49 | uint8_t gen_opc_instr_start[OPC_BUF_SIZE]; |
bellard | f76af4b | 2003-06-24 13:21:23 +0000 | [diff] [blame] | 50 | #if defined(TARGET_I386) |
| 51 | uint8_t gen_opc_cc_op[OPC_BUF_SIZE]; |
bellard | e95c8d5 | 2004-09-30 22:22:08 +0000 | [diff] [blame] | 52 | #elif defined(TARGET_SPARC) |
bellard | c468787 | 2005-01-03 23:44:44 +0000 | [diff] [blame^] | 53 | target_ulong gen_opc_npc[OPC_BUF_SIZE]; |
bellard | f76af4b | 2003-06-24 13:21:23 +0000 | [diff] [blame] | 54 | #endif |
bellard | d19893d | 2003-06-15 19:58:51 +0000 | [diff] [blame] | 55 | |
bellard | 58fe2f1 | 2004-02-16 22:11:32 +0000 | [diff] [blame] | 56 | int code_copy_enabled = 1; |
| 57 | |
bellard | d19893d | 2003-06-15 19:58:51 +0000 | [diff] [blame] | 58 | #ifdef DEBUG_DISAS |
| 59 | static const char *op_str[] = { |
| 60 | #define DEF(s, n, copy_size) #s, |
bellard | d3eead2 | 2003-09-30 20:59:51 +0000 | [diff] [blame] | 61 | #include "opc.h" |
bellard | d19893d | 2003-06-15 19:58:51 +0000 | [diff] [blame] | 62 | #undef DEF |
| 63 | }; |
| 64 | |
| 65 | static uint8_t op_nb_args[] = { |
| 66 | #define DEF(s, n, copy_size) n, |
bellard | d3eead2 | 2003-09-30 20:59:51 +0000 | [diff] [blame] | 67 | #include "opc.h" |
bellard | d19893d | 2003-06-15 19:58:51 +0000 | [diff] [blame] | 68 | #undef DEF |
| 69 | }; |
| 70 | |
bellard | c468787 | 2005-01-03 23:44:44 +0000 | [diff] [blame^] | 71 | static const unsigned short opc_copy_size[] = { |
| 72 | #define DEF(s, n, copy_size) copy_size, |
| 73 | #include "opc.h" |
| 74 | #undef DEF |
| 75 | }; |
| 76 | |
bellard | d19893d | 2003-06-15 19:58:51 +0000 | [diff] [blame] | 77 | void dump_ops(const uint16_t *opc_buf, const uint32_t *opparam_buf) |
| 78 | { |
| 79 | const uint16_t *opc_ptr; |
| 80 | const uint32_t *opparam_ptr; |
| 81 | int c, n, i; |
| 82 | |
| 83 | opc_ptr = opc_buf; |
| 84 | opparam_ptr = opparam_buf; |
| 85 | for(;;) { |
| 86 | c = *opc_ptr++; |
| 87 | n = op_nb_args[c]; |
| 88 | fprintf(logfile, "0x%04x: %s", |
| 89 | (int)(opc_ptr - opc_buf - 1), op_str[c]); |
| 90 | for(i = 0; i < n; i++) { |
| 91 | fprintf(logfile, " 0x%x", opparam_ptr[i]); |
| 92 | } |
| 93 | fprintf(logfile, "\n"); |
| 94 | if (c == INDEX_op_end) |
| 95 | break; |
| 96 | opparam_ptr += n; |
| 97 | } |
| 98 | } |
| 99 | |
| 100 | #endif |
| 101 | |
bellard | c468787 | 2005-01-03 23:44:44 +0000 | [diff] [blame^] | 102 | /* compute label info */ |
| 103 | static void dyngen_labels(long *gen_labels, int nb_gen_labels, |
| 104 | uint8_t *gen_code_buf, const uint16_t *opc_buf) |
| 105 | { |
| 106 | uint8_t *gen_code_ptr; |
| 107 | int c, i; |
| 108 | unsigned long gen_code_addr[OPC_BUF_SIZE]; |
| 109 | |
| 110 | if (nb_gen_labels == 0) |
| 111 | return; |
| 112 | /* compute the address of each op code */ |
| 113 | |
| 114 | gen_code_ptr = gen_code_buf; |
| 115 | i = 0; |
| 116 | for(;;) { |
| 117 | c = opc_buf[i]; |
| 118 | gen_code_addr[i] =(unsigned long)gen_code_ptr; |
| 119 | if (c == INDEX_op_end) |
| 120 | break; |
| 121 | gen_code_ptr += opc_copy_size[c]; |
| 122 | i++; |
| 123 | } |
| 124 | |
| 125 | /* compute the address of each label */ |
| 126 | for(i = 0; i < nb_gen_labels; i++) { |
| 127 | gen_labels[i] = gen_code_addr[gen_labels[i]]; |
| 128 | } |
| 129 | } |
| 130 | |
bellard | d19893d | 2003-06-15 19:58:51 +0000 | [diff] [blame] | 131 | /* return non zero if the very first instruction is invalid so that |
| 132 | the virtual CPU can trigger an exception. |
| 133 | |
| 134 | '*gen_code_size_ptr' contains the size of the generated code (host |
| 135 | code). |
| 136 | */ |
bellard | 4c3a88a | 2003-07-26 12:06:08 +0000 | [diff] [blame] | 137 | int cpu_gen_code(CPUState *env, TranslationBlock *tb, |
bellard | d19893d | 2003-06-15 19:58:51 +0000 | [diff] [blame] | 138 | int max_code_size, int *gen_code_size_ptr) |
| 139 | { |
| 140 | uint8_t *gen_code_buf; |
| 141 | int gen_code_size; |
| 142 | |
bellard | 58fe2f1 | 2004-02-16 22:11:32 +0000 | [diff] [blame] | 143 | #ifdef USE_CODE_COPY |
| 144 | if (code_copy_enabled && |
| 145 | cpu_gen_code_copy(env, tb, max_code_size, &gen_code_size) == 0) { |
| 146 | /* nothing more to do */ |
| 147 | } else |
| 148 | #endif |
| 149 | { |
| 150 | if (gen_intermediate_code(env, tb) < 0) |
| 151 | return -1; |
bellard | d19893d | 2003-06-15 19:58:51 +0000 | [diff] [blame] | 152 | |
bellard | 58fe2f1 | 2004-02-16 22:11:32 +0000 | [diff] [blame] | 153 | /* generate machine code */ |
| 154 | tb->tb_next_offset[0] = 0xffff; |
| 155 | tb->tb_next_offset[1] = 0xffff; |
| 156 | gen_code_buf = tb->tc_ptr; |
bellard | 4cbb86e | 2003-09-17 22:53:29 +0000 | [diff] [blame] | 157 | #ifdef USE_DIRECT_JUMP |
bellard | 58fe2f1 | 2004-02-16 22:11:32 +0000 | [diff] [blame] | 158 | /* the following two entries are optional (only used for string ops) */ |
| 159 | tb->tb_jmp_offset[2] = 0xffff; |
| 160 | tb->tb_jmp_offset[3] = 0xffff; |
bellard | 4cbb86e | 2003-09-17 22:53:29 +0000 | [diff] [blame] | 161 | #endif |
bellard | c468787 | 2005-01-03 23:44:44 +0000 | [diff] [blame^] | 162 | dyngen_labels(gen_labels, nb_gen_labels, gen_code_buf, gen_opc_buf); |
| 163 | |
bellard | 58fe2f1 | 2004-02-16 22:11:32 +0000 | [diff] [blame] | 164 | gen_code_size = dyngen_code(gen_code_buf, tb->tb_next_offset, |
bellard | d19893d | 2003-06-15 19:58:51 +0000 | [diff] [blame] | 165 | #ifdef USE_DIRECT_JUMP |
bellard | 58fe2f1 | 2004-02-16 22:11:32 +0000 | [diff] [blame] | 166 | tb->tb_jmp_offset, |
bellard | d19893d | 2003-06-15 19:58:51 +0000 | [diff] [blame] | 167 | #else |
bellard | 58fe2f1 | 2004-02-16 22:11:32 +0000 | [diff] [blame] | 168 | NULL, |
bellard | d19893d | 2003-06-15 19:58:51 +0000 | [diff] [blame] | 169 | #endif |
bellard | c468787 | 2005-01-03 23:44:44 +0000 | [diff] [blame^] | 170 | gen_opc_buf, gen_opparam_buf, gen_labels); |
bellard | 58fe2f1 | 2004-02-16 22:11:32 +0000 | [diff] [blame] | 171 | } |
bellard | d19893d | 2003-06-15 19:58:51 +0000 | [diff] [blame] | 172 | *gen_code_size_ptr = gen_code_size; |
| 173 | #ifdef DEBUG_DISAS |
bellard | f193c79 | 2004-03-21 17:06:25 +0000 | [diff] [blame] | 174 | if (loglevel & CPU_LOG_TB_OUT_ASM) { |
bellard | d19893d | 2003-06-15 19:58:51 +0000 | [diff] [blame] | 175 | fprintf(logfile, "OUT: [size=%d]\n", *gen_code_size_ptr); |
bellard | c468787 | 2005-01-03 23:44:44 +0000 | [diff] [blame^] | 176 | disas(logfile, tb->tc_ptr, *gen_code_size_ptr); |
bellard | d19893d | 2003-06-15 19:58:51 +0000 | [diff] [blame] | 177 | fprintf(logfile, "\n"); |
| 178 | fflush(logfile); |
| 179 | } |
| 180 | #endif |
| 181 | return 0; |
| 182 | } |
| 183 | |
bellard | f76af4b | 2003-06-24 13:21:23 +0000 | [diff] [blame] | 184 | /* The cpu state corresponding to 'searched_pc' is restored. |
bellard | d19893d | 2003-06-15 19:58:51 +0000 | [diff] [blame] | 185 | */ |
bellard | f76af4b | 2003-06-24 13:21:23 +0000 | [diff] [blame] | 186 | int cpu_restore_state(TranslationBlock *tb, |
bellard | 58fe2f1 | 2004-02-16 22:11:32 +0000 | [diff] [blame] | 187 | CPUState *env, unsigned long searched_pc, |
| 188 | void *puc) |
bellard | d19893d | 2003-06-15 19:58:51 +0000 | [diff] [blame] | 189 | { |
| 190 | int j, c; |
| 191 | unsigned long tc_ptr; |
| 192 | uint16_t *opc_ptr; |
| 193 | |
bellard | 58fe2f1 | 2004-02-16 22:11:32 +0000 | [diff] [blame] | 194 | #ifdef USE_CODE_COPY |
| 195 | if (tb->cflags & CF_CODE_COPY) { |
| 196 | return cpu_restore_state_copy(tb, env, searched_pc, puc); |
| 197 | } |
| 198 | #endif |
bellard | 4c3a88a | 2003-07-26 12:06:08 +0000 | [diff] [blame] | 199 | if (gen_intermediate_code_pc(env, tb) < 0) |
bellard | d19893d | 2003-06-15 19:58:51 +0000 | [diff] [blame] | 200 | return -1; |
| 201 | |
| 202 | /* find opc index corresponding to search_pc */ |
| 203 | tc_ptr = (unsigned long)tb->tc_ptr; |
| 204 | if (searched_pc < tc_ptr) |
| 205 | return -1; |
| 206 | j = 0; |
| 207 | opc_ptr = gen_opc_buf; |
| 208 | for(;;) { |
| 209 | c = *opc_ptr; |
| 210 | if (c == INDEX_op_end) |
| 211 | return -1; |
| 212 | tc_ptr += opc_copy_size[c]; |
| 213 | if (searched_pc < tc_ptr) |
| 214 | break; |
| 215 | opc_ptr++; |
| 216 | } |
| 217 | j = opc_ptr - gen_opc_buf; |
| 218 | /* now find start of instruction before */ |
| 219 | while (gen_opc_instr_start[j] == 0) |
| 220 | j--; |
bellard | f76af4b | 2003-06-24 13:21:23 +0000 | [diff] [blame] | 221 | #if defined(TARGET_I386) |
| 222 | { |
| 223 | int cc_op; |
bellard | 3c1cf9f | 2003-07-07 11:30:47 +0000 | [diff] [blame] | 224 | #ifdef DEBUG_DISAS |
bellard | f193c79 | 2004-03-21 17:06:25 +0000 | [diff] [blame] | 225 | if (loglevel & CPU_LOG_TB_OP) { |
bellard | 3c1cf9f | 2003-07-07 11:30:47 +0000 | [diff] [blame] | 226 | int i; |
bellard | 6e0374f | 2003-07-13 17:34:37 +0000 | [diff] [blame] | 227 | fprintf(logfile, "RESTORE:\n"); |
bellard | 3c1cf9f | 2003-07-07 11:30:47 +0000 | [diff] [blame] | 228 | for(i=0;i<=j; i++) { |
| 229 | if (gen_opc_instr_start[i]) { |
bellard | c468787 | 2005-01-03 23:44:44 +0000 | [diff] [blame^] | 230 | fprintf(logfile, "0x%04x: " TARGET_FMT_lx "\n", i, gen_opc_pc[i]); |
bellard | 3c1cf9f | 2003-07-07 11:30:47 +0000 | [diff] [blame] | 231 | } |
| 232 | } |
bellard | c468787 | 2005-01-03 23:44:44 +0000 | [diff] [blame^] | 233 | fprintf(logfile, "spc=0x%08lx j=0x%x eip=" TARGET_FMT_lx " cs_base=%x\n", |
| 234 | searched_pc, j, gen_opc_pc[j] - tb->cs_base, |
| 235 | (uint32_t)tb->cs_base); |
bellard | 3c1cf9f | 2003-07-07 11:30:47 +0000 | [diff] [blame] | 236 | } |
| 237 | #endif |
bellard | f76af4b | 2003-06-24 13:21:23 +0000 | [diff] [blame] | 238 | env->eip = gen_opc_pc[j] - tb->cs_base; |
| 239 | cc_op = gen_opc_cc_op[j]; |
| 240 | if (cc_op != CC_OP_DYNAMIC) |
| 241 | env->cc_op = cc_op; |
| 242 | } |
| 243 | #elif defined(TARGET_ARM) |
| 244 | env->regs[15] = gen_opc_pc[j]; |
bellard | d3eead2 | 2003-09-30 20:59:51 +0000 | [diff] [blame] | 245 | #elif defined(TARGET_SPARC) |
bellard | 58fe2f1 | 2004-02-16 22:11:32 +0000 | [diff] [blame] | 246 | /* XXX: restore npc too */ |
bellard | 6dca201 | 2003-11-23 17:32:06 +0000 | [diff] [blame] | 247 | env->pc = gen_opc_pc[j]; |
bellard | e95c8d5 | 2004-09-30 22:22:08 +0000 | [diff] [blame] | 248 | env->npc = gen_opc_npc[j]; |
bellard | 6dca201 | 2003-11-23 17:32:06 +0000 | [diff] [blame] | 249 | #elif defined(TARGET_PPC) |
bellard | af5ad10 | 2004-01-04 23:28:12 +0000 | [diff] [blame] | 250 | { |
| 251 | int type; |
| 252 | /* for PPC, we need to look at the micro operation to get the |
| 253 | access type */ |
| 254 | env->nip = gen_opc_pc[j]; |
| 255 | switch(c) { |
| 256 | #if defined(CONFIG_USER_ONLY) |
| 257 | #define CASE3(op)\ |
| 258 | case INDEX_op_ ## op ## _raw |
| 259 | #else |
| 260 | #define CASE3(op)\ |
bellard | af5ad10 | 2004-01-04 23:28:12 +0000 | [diff] [blame] | 261 | case INDEX_op_ ## op ## _user:\ |
| 262 | case INDEX_op_ ## op ## _kernel |
| 263 | #endif |
| 264 | |
| 265 | CASE3(stfd): |
| 266 | CASE3(stfs): |
| 267 | CASE3(lfd): |
| 268 | CASE3(lfs): |
| 269 | type = ACCESS_FLOAT; |
| 270 | break; |
bellard | a541f29 | 2004-04-12 20:39:29 +0000 | [diff] [blame] | 271 | CASE3(lwarx): |
| 272 | type = ACCESS_RES; |
| 273 | break; |
bellard | af5ad10 | 2004-01-04 23:28:12 +0000 | [diff] [blame] | 274 | CASE3(stwcx): |
| 275 | type = ACCESS_RES; |
| 276 | break; |
| 277 | CASE3(eciwx): |
| 278 | CASE3(ecowx): |
| 279 | type = ACCESS_EXT; |
| 280 | break; |
| 281 | default: |
| 282 | type = ACCESS_INT; |
| 283 | break; |
| 284 | } |
| 285 | env->access_type = type; |
| 286 | } |
bellard | f76af4b | 2003-06-24 13:21:23 +0000 | [diff] [blame] | 287 | #endif |
bellard | d19893d | 2003-06-15 19:58:51 +0000 | [diff] [blame] | 288 | return 0; |
| 289 | } |