blob: f6a7bc2b5052c2cfc253af100966cd3d4f67d07c [file] [log] [blame]
bellardd19893d2003-06-15 19:58:51 +00001/*
2 * Host code generation
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#include <stdarg.h>
21#include <stdlib.h>
22#include <stdio.h>
23#include <string.h>
24#include <inttypes.h>
25
26#include "config.h"
bellard20543962003-06-15 23:28:43 +000027
bellardaf5ad102004-01-04 23:28:12 +000028#define NO_CPU_IO_DEFS
bellardd3eead22003-09-30 20:59:51 +000029#include "cpu.h"
30#include "exec-all.h"
bellardd19893d2003-06-15 19:58:51 +000031#include "disas.h"
32
33enum {
34#define DEF(s, n, copy_size) INDEX_op_ ## s,
bellardd3eead22003-09-30 20:59:51 +000035#include "opc.h"
bellardd19893d2003-06-15 19:58:51 +000036#undef DEF
37 NB_OPS,
38};
39
40#include "dyngen.h"
bellardd3eead22003-09-30 20:59:51 +000041#include "op.h"
bellardd19893d2003-06-15 19:58:51 +000042
43uint16_t gen_opc_buf[OPC_BUF_SIZE];
44uint32_t gen_opparam_buf[OPPARAM_BUF_SIZE];
bellardc4687872005-01-03 23:44:44 +000045long gen_labels[OPC_BUF_SIZE];
46int nb_gen_labels;
47
48target_ulong gen_opc_pc[OPC_BUF_SIZE];
bellardd19893d2003-06-15 19:58:51 +000049uint8_t gen_opc_instr_start[OPC_BUF_SIZE];
bellardf76af4b2003-06-24 13:21:23 +000050#if defined(TARGET_I386)
51uint8_t gen_opc_cc_op[OPC_BUF_SIZE];
bellarde95c8d52004-09-30 22:22:08 +000052#elif defined(TARGET_SPARC)
bellardc4687872005-01-03 23:44:44 +000053target_ulong gen_opc_npc[OPC_BUF_SIZE];
bellardf76af4b2003-06-24 13:21:23 +000054#endif
bellardd19893d2003-06-15 19:58:51 +000055
bellard58fe2f12004-02-16 22:11:32 +000056int code_copy_enabled = 1;
57
bellardd19893d2003-06-15 19:58:51 +000058#ifdef DEBUG_DISAS
59static const char *op_str[] = {
60#define DEF(s, n, copy_size) #s,
bellardd3eead22003-09-30 20:59:51 +000061#include "opc.h"
bellardd19893d2003-06-15 19:58:51 +000062#undef DEF
63};
64
65static uint8_t op_nb_args[] = {
66#define DEF(s, n, copy_size) n,
bellardd3eead22003-09-30 20:59:51 +000067#include "opc.h"
bellardd19893d2003-06-15 19:58:51 +000068#undef DEF
69};
70
bellardc4687872005-01-03 23:44:44 +000071static const unsigned short opc_copy_size[] = {
72#define DEF(s, n, copy_size) copy_size,
73#include "opc.h"
74#undef DEF
75};
76
bellardd19893d2003-06-15 19:58:51 +000077void dump_ops(const uint16_t *opc_buf, const uint32_t *opparam_buf)
78{
79 const uint16_t *opc_ptr;
80 const uint32_t *opparam_ptr;
81 int c, n, i;
82
83 opc_ptr = opc_buf;
84 opparam_ptr = opparam_buf;
85 for(;;) {
86 c = *opc_ptr++;
87 n = op_nb_args[c];
88 fprintf(logfile, "0x%04x: %s",
89 (int)(opc_ptr - opc_buf - 1), op_str[c]);
90 for(i = 0; i < n; i++) {
91 fprintf(logfile, " 0x%x", opparam_ptr[i]);
92 }
93 fprintf(logfile, "\n");
94 if (c == INDEX_op_end)
95 break;
96 opparam_ptr += n;
97 }
98}
99
100#endif
101
bellardc4687872005-01-03 23:44:44 +0000102/* compute label info */
103static void dyngen_labels(long *gen_labels, int nb_gen_labels,
104 uint8_t *gen_code_buf, const uint16_t *opc_buf)
105{
106 uint8_t *gen_code_ptr;
107 int c, i;
108 unsigned long gen_code_addr[OPC_BUF_SIZE];
109
110 if (nb_gen_labels == 0)
111 return;
112 /* compute the address of each op code */
113
114 gen_code_ptr = gen_code_buf;
115 i = 0;
116 for(;;) {
117 c = opc_buf[i];
118 gen_code_addr[i] =(unsigned long)gen_code_ptr;
119 if (c == INDEX_op_end)
120 break;
121 gen_code_ptr += opc_copy_size[c];
122 i++;
123 }
124
125 /* compute the address of each label */
126 for(i = 0; i < nb_gen_labels; i++) {
127 gen_labels[i] = gen_code_addr[gen_labels[i]];
128 }
129}
130
bellardd19893d2003-06-15 19:58:51 +0000131/* return non zero if the very first instruction is invalid so that
132 the virtual CPU can trigger an exception.
133
134 '*gen_code_size_ptr' contains the size of the generated code (host
135 code).
136*/
bellard4c3a88a2003-07-26 12:06:08 +0000137int cpu_gen_code(CPUState *env, TranslationBlock *tb,
bellardd19893d2003-06-15 19:58:51 +0000138 int max_code_size, int *gen_code_size_ptr)
139{
140 uint8_t *gen_code_buf;
141 int gen_code_size;
142
bellard58fe2f12004-02-16 22:11:32 +0000143#ifdef USE_CODE_COPY
144 if (code_copy_enabled &&
145 cpu_gen_code_copy(env, tb, max_code_size, &gen_code_size) == 0) {
146 /* nothing more to do */
147 } else
148#endif
149 {
150 if (gen_intermediate_code(env, tb) < 0)
151 return -1;
bellardd19893d2003-06-15 19:58:51 +0000152
bellard58fe2f12004-02-16 22:11:32 +0000153 /* generate machine code */
154 tb->tb_next_offset[0] = 0xffff;
155 tb->tb_next_offset[1] = 0xffff;
156 gen_code_buf = tb->tc_ptr;
bellard4cbb86e2003-09-17 22:53:29 +0000157#ifdef USE_DIRECT_JUMP
bellard58fe2f12004-02-16 22:11:32 +0000158 /* the following two entries are optional (only used for string ops) */
159 tb->tb_jmp_offset[2] = 0xffff;
160 tb->tb_jmp_offset[3] = 0xffff;
bellard4cbb86e2003-09-17 22:53:29 +0000161#endif
bellardc4687872005-01-03 23:44:44 +0000162 dyngen_labels(gen_labels, nb_gen_labels, gen_code_buf, gen_opc_buf);
163
bellard58fe2f12004-02-16 22:11:32 +0000164 gen_code_size = dyngen_code(gen_code_buf, tb->tb_next_offset,
bellardd19893d2003-06-15 19:58:51 +0000165#ifdef USE_DIRECT_JUMP
bellard58fe2f12004-02-16 22:11:32 +0000166 tb->tb_jmp_offset,
bellardd19893d2003-06-15 19:58:51 +0000167#else
bellard58fe2f12004-02-16 22:11:32 +0000168 NULL,
bellardd19893d2003-06-15 19:58:51 +0000169#endif
bellardc4687872005-01-03 23:44:44 +0000170 gen_opc_buf, gen_opparam_buf, gen_labels);
bellard58fe2f12004-02-16 22:11:32 +0000171 }
bellardd19893d2003-06-15 19:58:51 +0000172 *gen_code_size_ptr = gen_code_size;
173#ifdef DEBUG_DISAS
bellardf193c792004-03-21 17:06:25 +0000174 if (loglevel & CPU_LOG_TB_OUT_ASM) {
bellardd19893d2003-06-15 19:58:51 +0000175 fprintf(logfile, "OUT: [size=%d]\n", *gen_code_size_ptr);
bellardc4687872005-01-03 23:44:44 +0000176 disas(logfile, tb->tc_ptr, *gen_code_size_ptr);
bellardd19893d2003-06-15 19:58:51 +0000177 fprintf(logfile, "\n");
178 fflush(logfile);
179 }
180#endif
181 return 0;
182}
183
bellardf76af4b2003-06-24 13:21:23 +0000184/* The cpu state corresponding to 'searched_pc' is restored.
bellardd19893d2003-06-15 19:58:51 +0000185 */
bellardf76af4b2003-06-24 13:21:23 +0000186int cpu_restore_state(TranslationBlock *tb,
bellard58fe2f12004-02-16 22:11:32 +0000187 CPUState *env, unsigned long searched_pc,
188 void *puc)
bellardd19893d2003-06-15 19:58:51 +0000189{
190 int j, c;
191 unsigned long tc_ptr;
192 uint16_t *opc_ptr;
193
bellard58fe2f12004-02-16 22:11:32 +0000194#ifdef USE_CODE_COPY
195 if (tb->cflags & CF_CODE_COPY) {
196 return cpu_restore_state_copy(tb, env, searched_pc, puc);
197 }
198#endif
bellard4c3a88a2003-07-26 12:06:08 +0000199 if (gen_intermediate_code_pc(env, tb) < 0)
bellardd19893d2003-06-15 19:58:51 +0000200 return -1;
201
202 /* find opc index corresponding to search_pc */
203 tc_ptr = (unsigned long)tb->tc_ptr;
204 if (searched_pc < tc_ptr)
205 return -1;
206 j = 0;
207 opc_ptr = gen_opc_buf;
208 for(;;) {
209 c = *opc_ptr;
210 if (c == INDEX_op_end)
211 return -1;
212 tc_ptr += opc_copy_size[c];
213 if (searched_pc < tc_ptr)
214 break;
215 opc_ptr++;
216 }
217 j = opc_ptr - gen_opc_buf;
218 /* now find start of instruction before */
219 while (gen_opc_instr_start[j] == 0)
220 j--;
bellardf76af4b2003-06-24 13:21:23 +0000221#if defined(TARGET_I386)
222 {
223 int cc_op;
bellard3c1cf9f2003-07-07 11:30:47 +0000224#ifdef DEBUG_DISAS
bellardf193c792004-03-21 17:06:25 +0000225 if (loglevel & CPU_LOG_TB_OP) {
bellard3c1cf9f2003-07-07 11:30:47 +0000226 int i;
bellard6e0374f2003-07-13 17:34:37 +0000227 fprintf(logfile, "RESTORE:\n");
bellard3c1cf9f2003-07-07 11:30:47 +0000228 for(i=0;i<=j; i++) {
229 if (gen_opc_instr_start[i]) {
bellardc4687872005-01-03 23:44:44 +0000230 fprintf(logfile, "0x%04x: " TARGET_FMT_lx "\n", i, gen_opc_pc[i]);
bellard3c1cf9f2003-07-07 11:30:47 +0000231 }
232 }
bellardc4687872005-01-03 23:44:44 +0000233 fprintf(logfile, "spc=0x%08lx j=0x%x eip=" TARGET_FMT_lx " cs_base=%x\n",
234 searched_pc, j, gen_opc_pc[j] - tb->cs_base,
235 (uint32_t)tb->cs_base);
bellard3c1cf9f2003-07-07 11:30:47 +0000236 }
237#endif
bellardf76af4b2003-06-24 13:21:23 +0000238 env->eip = gen_opc_pc[j] - tb->cs_base;
239 cc_op = gen_opc_cc_op[j];
240 if (cc_op != CC_OP_DYNAMIC)
241 env->cc_op = cc_op;
242 }
243#elif defined(TARGET_ARM)
244 env->regs[15] = gen_opc_pc[j];
bellardd3eead22003-09-30 20:59:51 +0000245#elif defined(TARGET_SPARC)
bellard58fe2f12004-02-16 22:11:32 +0000246 /* XXX: restore npc too */
bellard6dca2012003-11-23 17:32:06 +0000247 env->pc = gen_opc_pc[j];
bellarde95c8d52004-09-30 22:22:08 +0000248 env->npc = gen_opc_npc[j];
bellard6dca2012003-11-23 17:32:06 +0000249#elif defined(TARGET_PPC)
bellardaf5ad102004-01-04 23:28:12 +0000250 {
251 int type;
252 /* for PPC, we need to look at the micro operation to get the
253 access type */
254 env->nip = gen_opc_pc[j];
255 switch(c) {
256#if defined(CONFIG_USER_ONLY)
257#define CASE3(op)\
258 case INDEX_op_ ## op ## _raw
259#else
260#define CASE3(op)\
bellardaf5ad102004-01-04 23:28:12 +0000261 case INDEX_op_ ## op ## _user:\
262 case INDEX_op_ ## op ## _kernel
263#endif
264
265 CASE3(stfd):
266 CASE3(stfs):
267 CASE3(lfd):
268 CASE3(lfs):
269 type = ACCESS_FLOAT;
270 break;
bellarda541f292004-04-12 20:39:29 +0000271 CASE3(lwarx):
272 type = ACCESS_RES;
273 break;
bellardaf5ad102004-01-04 23:28:12 +0000274 CASE3(stwcx):
275 type = ACCESS_RES;
276 break;
277 CASE3(eciwx):
278 CASE3(ecowx):
279 type = ACCESS_EXT;
280 break;
281 default:
282 type = ACCESS_INT;
283 break;
284 }
285 env->access_type = type;
286 }
bellardf76af4b2003-06-24 13:21:23 +0000287#endif
bellardd19893d2003-06-15 19:58:51 +0000288 return 0;
289}