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Fabian Vogtfe3d16e2014-08-16 22:55:53 +02001/*
2 * This file is part of the Micro Python project, http://micropython.org/
3 *
4 * The MIT License (MIT)
5 *
Fabian Vogt16ee30c2014-08-28 01:18:56 +02006 * Copyright (c) 2014 Fabian Vogt
7 * Copyright (c) 2013, 2014 Damien P. George
Fabian Vogtfe3d16e2014-08-16 22:55:53 +02008 *
9 * Permission is hereby granted, free of charge, to any person obtaining a copy
10 * of this software and associated documentation files (the "Software"), to deal
11 * in the Software without restriction, including without limitation the rights
12 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
13 * copies of the Software, and to permit persons to whom the Software is
14 * furnished to do so, subject to the following conditions:
15 *
16 * The above copyright notice and this permission notice shall be included in
17 * all copies or substantial portions of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
22 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
24 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 * THE SOFTWARE.
26 */
27
28#include <stdio.h>
29#include <assert.h>
30#include <string.h>
31
32#include "mpconfig.h"
33#include "misc.h"
34#include "asmarm.h"
35
36// wrapper around everything in this file
37#if MICROPY_EMIT_ARM
38
39#define SIGNED_FIT24(x) (((x) & 0xff800000) == 0) || (((x) & 0xff000000) == 0xff000000)
40
41struct _asm_arm_t {
42 uint pass;
Fabian Vogtb7235b82014-09-03 16:59:33 +020043 mp_uint_t code_offset;
44 mp_uint_t code_size;
Fabian Vogtfe3d16e2014-08-16 22:55:53 +020045 byte *code_base;
46 byte dummy_data[4];
47
48 uint max_num_labels;
49 int *label_offsets;
50 int num_locals;
51 uint push_reglist;
52 uint stack_adjust;
53};
54
55asm_arm_t *asm_arm_new(uint max_num_labels) {
56 asm_arm_t *as;
57
58 as = m_new0(asm_arm_t, 1);
59 as->max_num_labels = max_num_labels;
60 as->label_offsets = m_new(int, max_num_labels);
61
62 return as;
63}
64
65void asm_arm_free(asm_arm_t *as, bool free_code) {
66 if (free_code) {
Fabian Vogtb7235b82014-09-03 16:59:33 +020067 MP_PLAT_FREE_EXEC(as->code_base, as->code_size);
Fabian Vogtfe3d16e2014-08-16 22:55:53 +020068 }
69
70 m_del_obj(asm_arm_t, as);
71}
72
73void asm_arm_start_pass(asm_arm_t *as, uint pass) {
74 as->pass = pass;
75 as->code_offset = 0;
76 if (pass == ASM_ARM_PASS_COMPUTE) {
77 memset(as->label_offsets, -1, as->max_num_labels * sizeof(int));
78 }
79}
80
81void asm_arm_end_pass(asm_arm_t *as) {
82 if (as->pass == ASM_ARM_PASS_COMPUTE) {
Fabian Vogtb7235b82014-09-03 16:59:33 +020083 MP_PLAT_ALLOC_EXEC(as->code_offset, (void**) &as->code_base, &as->code_size);
84 if(as->code_base == NULL) {
85 assert(0);
86 }
Damien Georgedda46462014-09-03 22:47:23 +010087 } else if(as->pass == ASM_ARM_PASS_EMIT) {
Fabian Vogtb7235b82014-09-03 16:59:33 +020088#ifdef __arm__
89 // flush I- and D-cache
Damien Georgedda46462014-09-03 22:47:23 +010090 asm volatile(
Fabian Vogtb7235b82014-09-03 16:59:33 +020091 "0:"
92 "mrc p15, 0, r15, c7, c10, 3\n"
93 "bne 0b\n"
94 "mov r0, #0\n"
Damien Georgedda46462014-09-03 22:47:23 +010095 "mcr p15, 0, r0, c7, c7, 0\n"
Fabian Vogtb7235b82014-09-03 16:59:33 +020096 : : : "r0", "cc");
97#endif
Fabian Vogtfe3d16e2014-08-16 22:55:53 +020098 }
99}
100
101// all functions must go through this one to emit bytes
102// if as->pass < ASM_ARM_PASS_EMIT, then this function only returns a buffer of 4 bytes length
103STATIC byte *asm_arm_get_cur_to_write_bytes(asm_arm_t *as, int num_bytes_to_write) {
104 if (as->pass < ASM_ARM_PASS_EMIT) {
105 as->code_offset += num_bytes_to_write;
106 return as->dummy_data;
107 } else {
108 assert(as->code_offset + num_bytes_to_write <= as->code_size);
109 byte *c = as->code_base + as->code_offset;
110 as->code_offset += num_bytes_to_write;
111 return c;
112 }
113}
114
115uint asm_arm_get_code_size(asm_arm_t *as) {
116 return as->code_size;
117}
118
119void *asm_arm_get_code(asm_arm_t *as) {
120 return as->code_base;
121}
122
123// Insert word into instruction flow
124STATIC void emit(asm_arm_t *as, uint op) {
125 *(uint*)asm_arm_get_cur_to_write_bytes(as, 4) = op;
126}
127
128// Insert word into instruction flow, add "ALWAYS" condition code
129STATIC void emit_al(asm_arm_t *as, uint op) {
130 emit(as, op | ARM_CC_AL);
131}
132
133// Basic instructions without condition code
134STATIC uint asm_arm_op_push(uint reglist) {
135 // stmfd sp!, {reglist}
136 return 0x92d0000 | (reglist & 0xFFFF);
137}
138
139STATIC uint asm_arm_op_pop(uint reglist) {
140 // ldmfd sp!, {reglist}
141 return 0x8bd0000 | (reglist & 0xFFFF);
142}
143
144STATIC uint asm_arm_op_mov_reg(uint rd, uint rn) {
145 // mov rd, rn
146 return 0x1a00000 | (rd << 12) | rn;
147}
148
149STATIC uint asm_arm_op_mov_imm(uint rd, uint imm) {
150 // mov rd, #imm
151 return 0x3a00000 | (rd << 12) | imm;
152}
153
154STATIC uint asm_arm_op_mvn_imm(uint rd, uint imm) {
155 // mvn rd, #imm
156 return 0x3e00000 | (rd << 12) | imm;
157}
158
159STATIC uint asm_arm_op_add_imm(uint rd, uint rn, uint imm) {
160 // add rd, rn, #imm
161 return 0x2800000 | (rn << 16) | (rd << 12) | (imm & 0xFF);
162}
163
164STATIC uint asm_arm_op_add_reg(uint rd, uint rn, uint rm) {
165 // add rd, rn, rm
166 return 0x0800000 | (rn << 16) | (rd << 12) | rm;
167}
168
169STATIC uint asm_arm_op_sub_imm(uint rd, uint rn, uint imm) {
170 // sub rd, rn, #imm
171 return 0x2400000 | (rn << 16) | (rd << 12) | (imm & 0xFF);
172}
173
174void asm_arm_bkpt(asm_arm_t *as) {
175 // bkpt #0
176 emit_al(as, 0x1200070);
177}
178
179// locals:
180// - stored on the stack in ascending order
181// - numbered 0 through as->num_locals-1
182// - SP points to first local
183//
184// | SP
185// v
186// l0 l1 l2 ... l(n-1)
187// ^ ^
188// | low address | high address in RAM
189
190void asm_arm_entry(asm_arm_t *as, int num_locals) {
191
192 if (num_locals < 0) {
193 num_locals = 0;
194 }
195
196 as->stack_adjust = 0;
197 as->num_locals = num_locals;
198 as->push_reglist = 1 << REG_R1 | 1 << REG_R2 | 1 << REG_R3 | 1 << REG_R4
199 | 1 << REG_R5 | 1 << REG_R6 | 1 << REG_R7 | 1 << REG_R8;
200
201 // Only adjust the stack if there are more locals than usable registers
202 if(num_locals > 3) {
203 as->stack_adjust = num_locals * 4;
204 // Align stack to 8 bytes
205 if(as->num_locals & 1)
206 as->stack_adjust += 4;
207 }
208
209 emit_al(as, asm_arm_op_push(as->push_reglist | 1 << REG_LR));
210 if (as->stack_adjust > 0) {
211 emit_al(as, asm_arm_op_sub_imm(REG_SP, REG_SP, as->stack_adjust));
212 }
213}
214
215void asm_arm_exit(asm_arm_t *as) {
216 if (as->stack_adjust > 0) {
217 emit_al(as, asm_arm_op_add_imm(REG_SP, REG_SP, as->stack_adjust));
218 }
219
220 emit_al(as, asm_arm_op_pop(as->push_reglist | (1 << REG_PC)));
221}
222
223void asm_arm_label_assign(asm_arm_t *as, uint label) {
224 assert(label < as->max_num_labels);
225 if (as->pass < ASM_ARM_PASS_EMIT) {
226 // assign label offset
227 assert(as->label_offsets[label] == -1);
228 as->label_offsets[label] = as->code_offset;
229 } else {
230 // ensure label offset has not changed from PASS_COMPUTE to PASS_EMIT
231 assert(as->label_offsets[label] == as->code_offset);
232 }
233}
234
235void asm_arm_align(asm_arm_t* as, uint align) {
236 // TODO fill unused data with NOPs?
237 as->code_offset = (as->code_offset + align - 1) & (~(align - 1));
238}
239
240void asm_arm_data(asm_arm_t* as, uint bytesize, uint val) {
241 byte *c = asm_arm_get_cur_to_write_bytes(as, bytesize);
242 // only write to the buffer in the emit pass (otherwise we overflow dummy_data)
243 if (as->pass == ASM_ARM_PASS_EMIT) {
244 // little endian
245 for (uint i = 0; i < bytesize; i++) {
246 *c++ = val;
247 val >>= 8;
248 }
249 }
250}
251
252void asm_arm_mov_reg_reg(asm_arm_t *as, uint reg_dest, uint reg_src) {
253 emit_al(as, asm_arm_op_mov_reg(reg_dest, reg_src));
254}
255
256void asm_arm_mov_reg_i32(asm_arm_t *as, uint rd, int imm) {
257 // TODO: There are more variants of immediate values
258 if ((imm & 0xFF) == imm) {
259 emit_al(as, asm_arm_op_mov_imm(rd, imm));
260 } else if (imm < 0 && ((-imm) & 0xFF) == -imm) {
261 emit_al(as, asm_arm_op_mvn_imm(rd, -imm));
262 } else {
263 //Insert immediate into code and jump over it
264 emit_al(as, 0x59f0000 | (rd << 12)); // ldr rd, [pc]
265 emit_al(as, 0xa000000); // b pc
266 emit(as, imm);
267 }
268}
269
270void asm_arm_mov_local_reg(asm_arm_t *as, int local_num, uint rd) {
271 // str rd, [sp, #local_num*4]
272 emit_al(as, 0x58d0000 | (rd << 12) | (local_num << 2));
273}
274
275void asm_arm_mov_reg_local(asm_arm_t *as, uint rd, int local_num) {
276 // ldr rd, [sp, #local_num*4]
277 emit_al(as, 0x59d0000 | (rd << 12) | (local_num << 2));
278}
279
280void asm_arm_cmp_reg_i8(asm_arm_t *as, uint rd, int imm) {
281 // cmp rd, #imm
282 emit_al(as, 0x3500000 | (rd << 16) | (imm & 0xFF));
283}
284
285void asm_arm_cmp_reg_reg(asm_arm_t *as, uint rd, uint rn) {
286 // cmp rd, rn
287 emit_al(as, 0x1500000 | (rd << 16) | rn);
288}
289
290void asm_arm_less_op(asm_arm_t *as, uint rd, uint rn) {
291 asm_arm_cmp_reg_reg(as, rd, rn); // cmp rd, rn
292 emit(as, asm_arm_op_mov_imm(REG_RET, 1) | ARM_CC_LT); // movlt REG_RET, #1
293 emit(as, asm_arm_op_mov_imm(REG_RET, 0) | ARM_CC_GE); // movge REG_RET, #0
294}
295
296void asm_arm_add_reg(asm_arm_t *as, uint rd, uint rn, uint rm) {
297 // add rd, rn, rm
298 emit_al(as, asm_arm_op_add_reg(rd, rn, rm));
299}
300
301void asm_arm_mov_reg_local_addr(asm_arm_t *as, uint rd, int local_num) {
302 // add rd, sp, #local_num*4
303 emit_al(as, asm_arm_op_add_imm(rd, REG_SP, local_num << 2));
304}
305
306void asm_arm_bcc_label(asm_arm_t *as, int cond, uint label) {
307 assert(label < as->max_num_labels);
308 int dest = as->label_offsets[label];
309 int rel = dest - as->code_offset;
310 rel -= 8; // account for instruction prefetch, PC is 8 bytes ahead of this instruction
311 rel >>= 2; // in ARM mode the branch target is 32-bit aligned, so the 2 LSB are omitted
312
313 if (SIGNED_FIT24(rel)) {
314 emit(as, cond | 0xa000000 | (rel & 0xffffff));
315 } else {
316 printf("asm_arm_bcc: branch does not fit in 24 bits\n");
317 }
318}
319
320void asm_arm_b_label(asm_arm_t *as, uint label) {
321 asm_arm_bcc_label(as, ARM_CC_AL, label);
322}
323
324void asm_arm_bl_ind(asm_arm_t *as, void *fun_ptr, uint fun_id, uint reg_temp) {
325 // If the table offset fits into the ldr instruction
326 if(fun_id < (0x1000 / 4)) {
327 emit_al(as, asm_arm_op_mov_reg(REG_LR, REG_PC)); // mov lr, pc
328 emit_al(as, 0x597f000 | (fun_id << 2)); // ldr pc, [r7, #fun_id*4]
329 return;
330 }
331
332 emit_al(as, 0x59f0004 | (reg_temp << 12)); // ldr rd, [pc, #4]
333 // Set lr after fun_ptr
334 emit_al(as, asm_arm_op_add_imm(REG_LR, REG_PC, 4)); // add lr, pc, #4
335 emit_al(as, asm_arm_op_mov_reg(REG_PC, reg_temp)); // mov pc, reg_temp
336 emit(as, (uint) fun_ptr);
337}
338
339#endif // MICROPY_EMIT_ARM