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Fabian Vogtfe3d16e2014-08-16 22:55:53 +02001/*
2 * This file is part of the Micro Python project, http://micropython.org/
3 *
4 * The MIT License (MIT)
5 *
Fabian Vogt16ee30c2014-08-28 01:18:56 +02006 * Copyright (c) 2014 Fabian Vogt
7 * Copyright (c) 2013, 2014 Damien P. George
Fabian Vogtfe3d16e2014-08-16 22:55:53 +02008 *
9 * Permission is hereby granted, free of charge, to any person obtaining a copy
10 * of this software and associated documentation files (the "Software"), to deal
11 * in the Software without restriction, including without limitation the rights
12 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
13 * copies of the Software, and to permit persons to whom the Software is
14 * furnished to do so, subject to the following conditions:
15 *
16 * The above copyright notice and this permission notice shall be included in
17 * all copies or substantial portions of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
22 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
24 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 * THE SOFTWARE.
26 */
27
28#include <stdio.h>
29#include <assert.h>
30#include <string.h>
31
32#include "mpconfig.h"
33#include "misc.h"
34#include "asmarm.h"
35
36// wrapper around everything in this file
37#if MICROPY_EMIT_ARM
38
39#define SIGNED_FIT24(x) (((x) & 0xff800000) == 0) || (((x) & 0xff000000) == 0xff000000)
40
41struct _asm_arm_t {
42 uint pass;
Fabian Vogtb7235b82014-09-03 16:59:33 +020043 mp_uint_t code_offset;
44 mp_uint_t code_size;
Fabian Vogtfe3d16e2014-08-16 22:55:53 +020045 byte *code_base;
46 byte dummy_data[4];
47
48 uint max_num_labels;
49 int *label_offsets;
50 int num_locals;
51 uint push_reglist;
52 uint stack_adjust;
53};
54
55asm_arm_t *asm_arm_new(uint max_num_labels) {
56 asm_arm_t *as;
57
58 as = m_new0(asm_arm_t, 1);
59 as->max_num_labels = max_num_labels;
60 as->label_offsets = m_new(int, max_num_labels);
61
62 return as;
63}
64
65void asm_arm_free(asm_arm_t *as, bool free_code) {
66 if (free_code) {
Fabian Vogtb7235b82014-09-03 16:59:33 +020067 MP_PLAT_FREE_EXEC(as->code_base, as->code_size);
Fabian Vogtfe3d16e2014-08-16 22:55:53 +020068 }
69
70 m_del_obj(asm_arm_t, as);
71}
72
73void asm_arm_start_pass(asm_arm_t *as, uint pass) {
74 as->pass = pass;
75 as->code_offset = 0;
76 if (pass == ASM_ARM_PASS_COMPUTE) {
77 memset(as->label_offsets, -1, as->max_num_labels * sizeof(int));
78 }
79}
80
81void asm_arm_end_pass(asm_arm_t *as) {
82 if (as->pass == ASM_ARM_PASS_COMPUTE) {
Fabian Vogtb7235b82014-09-03 16:59:33 +020083 MP_PLAT_ALLOC_EXEC(as->code_offset, (void**) &as->code_base, &as->code_size);
84 if(as->code_base == NULL) {
85 assert(0);
86 }
87 }
88 else if(as->pass == ASM_ARM_PASS_EMIT) {
89#ifdef __arm__
90 // flush I- and D-cache
91 asm volatile(
92 "0:"
93 "mrc p15, 0, r15, c7, c10, 3\n"
94 "bne 0b\n"
95 "mov r0, #0\n"
96 "mcr p15, 0, r0, c7, c7, 0\n"
97 : : : "r0", "cc");
98#endif
Fabian Vogtfe3d16e2014-08-16 22:55:53 +020099 }
100}
101
102// all functions must go through this one to emit bytes
103// if as->pass < ASM_ARM_PASS_EMIT, then this function only returns a buffer of 4 bytes length
104STATIC byte *asm_arm_get_cur_to_write_bytes(asm_arm_t *as, int num_bytes_to_write) {
105 if (as->pass < ASM_ARM_PASS_EMIT) {
106 as->code_offset += num_bytes_to_write;
107 return as->dummy_data;
108 } else {
109 assert(as->code_offset + num_bytes_to_write <= as->code_size);
110 byte *c = as->code_base + as->code_offset;
111 as->code_offset += num_bytes_to_write;
112 return c;
113 }
114}
115
116uint asm_arm_get_code_size(asm_arm_t *as) {
117 return as->code_size;
118}
119
120void *asm_arm_get_code(asm_arm_t *as) {
121 return as->code_base;
122}
123
124// Insert word into instruction flow
125STATIC void emit(asm_arm_t *as, uint op) {
126 *(uint*)asm_arm_get_cur_to_write_bytes(as, 4) = op;
127}
128
129// Insert word into instruction flow, add "ALWAYS" condition code
130STATIC void emit_al(asm_arm_t *as, uint op) {
131 emit(as, op | ARM_CC_AL);
132}
133
134// Basic instructions without condition code
135STATIC uint asm_arm_op_push(uint reglist) {
136 // stmfd sp!, {reglist}
137 return 0x92d0000 | (reglist & 0xFFFF);
138}
139
140STATIC uint asm_arm_op_pop(uint reglist) {
141 // ldmfd sp!, {reglist}
142 return 0x8bd0000 | (reglist & 0xFFFF);
143}
144
145STATIC uint asm_arm_op_mov_reg(uint rd, uint rn) {
146 // mov rd, rn
147 return 0x1a00000 | (rd << 12) | rn;
148}
149
150STATIC uint asm_arm_op_mov_imm(uint rd, uint imm) {
151 // mov rd, #imm
152 return 0x3a00000 | (rd << 12) | imm;
153}
154
155STATIC uint asm_arm_op_mvn_imm(uint rd, uint imm) {
156 // mvn rd, #imm
157 return 0x3e00000 | (rd << 12) | imm;
158}
159
160STATIC uint asm_arm_op_add_imm(uint rd, uint rn, uint imm) {
161 // add rd, rn, #imm
162 return 0x2800000 | (rn << 16) | (rd << 12) | (imm & 0xFF);
163}
164
165STATIC uint asm_arm_op_add_reg(uint rd, uint rn, uint rm) {
166 // add rd, rn, rm
167 return 0x0800000 | (rn << 16) | (rd << 12) | rm;
168}
169
170STATIC uint asm_arm_op_sub_imm(uint rd, uint rn, uint imm) {
171 // sub rd, rn, #imm
172 return 0x2400000 | (rn << 16) | (rd << 12) | (imm & 0xFF);
173}
174
175void asm_arm_bkpt(asm_arm_t *as) {
176 // bkpt #0
177 emit_al(as, 0x1200070);
178}
179
180// locals:
181// - stored on the stack in ascending order
182// - numbered 0 through as->num_locals-1
183// - SP points to first local
184//
185// | SP
186// v
187// l0 l1 l2 ... l(n-1)
188// ^ ^
189// | low address | high address in RAM
190
191void asm_arm_entry(asm_arm_t *as, int num_locals) {
192
193 if (num_locals < 0) {
194 num_locals = 0;
195 }
196
197 as->stack_adjust = 0;
198 as->num_locals = num_locals;
199 as->push_reglist = 1 << REG_R1 | 1 << REG_R2 | 1 << REG_R3 | 1 << REG_R4
200 | 1 << REG_R5 | 1 << REG_R6 | 1 << REG_R7 | 1 << REG_R8;
201
202 // Only adjust the stack if there are more locals than usable registers
203 if(num_locals > 3) {
204 as->stack_adjust = num_locals * 4;
205 // Align stack to 8 bytes
206 if(as->num_locals & 1)
207 as->stack_adjust += 4;
208 }
209
210 emit_al(as, asm_arm_op_push(as->push_reglist | 1 << REG_LR));
211 if (as->stack_adjust > 0) {
212 emit_al(as, asm_arm_op_sub_imm(REG_SP, REG_SP, as->stack_adjust));
213 }
214}
215
216void asm_arm_exit(asm_arm_t *as) {
217 if (as->stack_adjust > 0) {
218 emit_al(as, asm_arm_op_add_imm(REG_SP, REG_SP, as->stack_adjust));
219 }
220
221 emit_al(as, asm_arm_op_pop(as->push_reglist | (1 << REG_PC)));
222}
223
224void asm_arm_label_assign(asm_arm_t *as, uint label) {
225 assert(label < as->max_num_labels);
226 if (as->pass < ASM_ARM_PASS_EMIT) {
227 // assign label offset
228 assert(as->label_offsets[label] == -1);
229 as->label_offsets[label] = as->code_offset;
230 } else {
231 // ensure label offset has not changed from PASS_COMPUTE to PASS_EMIT
232 assert(as->label_offsets[label] == as->code_offset);
233 }
234}
235
236void asm_arm_align(asm_arm_t* as, uint align) {
237 // TODO fill unused data with NOPs?
238 as->code_offset = (as->code_offset + align - 1) & (~(align - 1));
239}
240
241void asm_arm_data(asm_arm_t* as, uint bytesize, uint val) {
242 byte *c = asm_arm_get_cur_to_write_bytes(as, bytesize);
243 // only write to the buffer in the emit pass (otherwise we overflow dummy_data)
244 if (as->pass == ASM_ARM_PASS_EMIT) {
245 // little endian
246 for (uint i = 0; i < bytesize; i++) {
247 *c++ = val;
248 val >>= 8;
249 }
250 }
251}
252
253void asm_arm_mov_reg_reg(asm_arm_t *as, uint reg_dest, uint reg_src) {
254 emit_al(as, asm_arm_op_mov_reg(reg_dest, reg_src));
255}
256
257void asm_arm_mov_reg_i32(asm_arm_t *as, uint rd, int imm) {
258 // TODO: There are more variants of immediate values
259 if ((imm & 0xFF) == imm) {
260 emit_al(as, asm_arm_op_mov_imm(rd, imm));
261 } else if (imm < 0 && ((-imm) & 0xFF) == -imm) {
262 emit_al(as, asm_arm_op_mvn_imm(rd, -imm));
263 } else {
264 //Insert immediate into code and jump over it
265 emit_al(as, 0x59f0000 | (rd << 12)); // ldr rd, [pc]
266 emit_al(as, 0xa000000); // b pc
267 emit(as, imm);
268 }
269}
270
271void asm_arm_mov_local_reg(asm_arm_t *as, int local_num, uint rd) {
272 // str rd, [sp, #local_num*4]
273 emit_al(as, 0x58d0000 | (rd << 12) | (local_num << 2));
274}
275
276void asm_arm_mov_reg_local(asm_arm_t *as, uint rd, int local_num) {
277 // ldr rd, [sp, #local_num*4]
278 emit_al(as, 0x59d0000 | (rd << 12) | (local_num << 2));
279}
280
281void asm_arm_cmp_reg_i8(asm_arm_t *as, uint rd, int imm) {
282 // cmp rd, #imm
283 emit_al(as, 0x3500000 | (rd << 16) | (imm & 0xFF));
284}
285
286void asm_arm_cmp_reg_reg(asm_arm_t *as, uint rd, uint rn) {
287 // cmp rd, rn
288 emit_al(as, 0x1500000 | (rd << 16) | rn);
289}
290
291void asm_arm_less_op(asm_arm_t *as, uint rd, uint rn) {
292 asm_arm_cmp_reg_reg(as, rd, rn); // cmp rd, rn
293 emit(as, asm_arm_op_mov_imm(REG_RET, 1) | ARM_CC_LT); // movlt REG_RET, #1
294 emit(as, asm_arm_op_mov_imm(REG_RET, 0) | ARM_CC_GE); // movge REG_RET, #0
295}
296
297void asm_arm_add_reg(asm_arm_t *as, uint rd, uint rn, uint rm) {
298 // add rd, rn, rm
299 emit_al(as, asm_arm_op_add_reg(rd, rn, rm));
300}
301
302void asm_arm_mov_reg_local_addr(asm_arm_t *as, uint rd, int local_num) {
303 // add rd, sp, #local_num*4
304 emit_al(as, asm_arm_op_add_imm(rd, REG_SP, local_num << 2));
305}
306
307void asm_arm_bcc_label(asm_arm_t *as, int cond, uint label) {
308 assert(label < as->max_num_labels);
309 int dest = as->label_offsets[label];
310 int rel = dest - as->code_offset;
311 rel -= 8; // account for instruction prefetch, PC is 8 bytes ahead of this instruction
312 rel >>= 2; // in ARM mode the branch target is 32-bit aligned, so the 2 LSB are omitted
313
314 if (SIGNED_FIT24(rel)) {
315 emit(as, cond | 0xa000000 | (rel & 0xffffff));
316 } else {
317 printf("asm_arm_bcc: branch does not fit in 24 bits\n");
318 }
319}
320
321void asm_arm_b_label(asm_arm_t *as, uint label) {
322 asm_arm_bcc_label(as, ARM_CC_AL, label);
323}
324
325void asm_arm_bl_ind(asm_arm_t *as, void *fun_ptr, uint fun_id, uint reg_temp) {
326 // If the table offset fits into the ldr instruction
327 if(fun_id < (0x1000 / 4)) {
328 emit_al(as, asm_arm_op_mov_reg(REG_LR, REG_PC)); // mov lr, pc
329 emit_al(as, 0x597f000 | (fun_id << 2)); // ldr pc, [r7, #fun_id*4]
330 return;
331 }
332
333 emit_al(as, 0x59f0004 | (reg_temp << 12)); // ldr rd, [pc, #4]
334 // Set lr after fun_ptr
335 emit_al(as, asm_arm_op_add_imm(REG_LR, REG_PC, 4)); // add lr, pc, #4
336 emit_al(as, asm_arm_op_mov_reg(REG_PC, reg_temp)); // mov pc, reg_temp
337 emit(as, (uint) fun_ptr);
338}
339
340#endif // MICROPY_EMIT_ARM