blob: 87bbb7c92eb1937be9b88ca1270879e3fd800ea7 [file] [log] [blame]
Damien George075d5972014-11-27 20:30:33 +00001/******************************************************************************
2 * Copyright 2013-2014 Espressif Systems (Wuxi)
3 *
4 * FileName: uart.c
5 *
6 * Description: Two UART mode configration and interrupt handler.
7 * Check your hardware connection while use this mode.
8 *
9 * Modification history:
10 * 2014/3/12, v1.0 create this file.
11*******************************************************************************/
12#include "ets_sys.h"
13#include "osapi.h"
14#include "uart.h"
15#include "osapi.h"
16#include "uart_register.h"
17#include "etshal.h"
18#include "c_types.h"
Paul Sokolovskyf12ea7c2015-01-16 01:54:40 +020019#include "user_interface.h"
20#include "esp_mphal.h"
Damien George075d5972014-11-27 20:30:33 +000021
22#define RX_BUF_SIZE (256)
23
24// UartDev is defined and initialized in rom code.
25extern UartDevice UartDev;
26
27// circular buffer for RX buffering
28static uint16_t rx_buf_in;
29static uint16_t rx_buf_out;
30static uint8_t rx_buf[RX_BUF_SIZE];
31
Paul Sokolovskyf12ea7c2015-01-16 01:54:40 +020032static os_event_t uart_evt_queue[16];
33
Damien George075d5972014-11-27 20:30:33 +000034static void uart0_rx_intr_handler(void *para);
35
36/******************************************************************************
37 * FunctionName : uart_config
38 * Description : Internal used function
39 * UART0 used for data TX/RX, RX buffer size is 0x100, interrupt enabled
40 * UART1 just used for debug output
41 * Parameters : uart_no, use UART0 or UART1 defined ahead
42 * Returns : NONE
43*******************************************************************************/
44static void ICACHE_FLASH_ATTR uart_config(uint8 uart_no) {
45 if (uart_no == UART1) {
46 PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_U1TXD_BK);
47 } else {
48 ETS_UART_INTR_ATTACH(uart0_rx_intr_handler, NULL);
49 PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0TXD_U);
50 PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD);
51 PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, FUNC_U0RTS);
52 }
53
54 uart_div_modify(uart_no, UART_CLK_FREQ / (UartDev.baut_rate));
55
56 WRITE_PERI_REG(UART_CONF0(uart_no), UartDev.exist_parity
57 | UartDev.parity
58 | (UartDev.stop_bits << UART_STOP_BIT_NUM_S)
59 | (UartDev.data_bits << UART_BIT_NUM_S));
60
61 // clear rx and tx fifo,not ready
62 SET_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST);
63 CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST);
64
65 if (uart_no == UART0) {
66 // set rx fifo trigger
67 WRITE_PERI_REG(UART_CONF1(uart_no),
68 ((0x10 & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S) |
69 ((0x10 & UART_RX_FLOW_THRHD) << UART_RX_FLOW_THRHD_S) |
70 UART_RX_FLOW_EN |
71 (0x02 & UART_RX_TOUT_THRHD) << UART_RX_TOUT_THRHD_S |
72 UART_RX_TOUT_EN);
73 SET_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_RXFIFO_TOUT_INT_ENA |
74 UART_FRM_ERR_INT_ENA);
75 } else {
76 WRITE_PERI_REG(UART_CONF1(uart_no),
77 ((UartDev.rcv_buff.TrigLvl & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S));
78 }
79
80 // clear all interrupt
81 WRITE_PERI_REG(UART_INT_CLR(uart_no), 0xffff);
82 // enable rx_interrupt
83 SET_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_RXFIFO_FULL_INT_ENA);
84
85 // init RX buffer
86 rx_buf_in = 0;
87 rx_buf_out = 0;
88}
89
90/******************************************************************************
91 * FunctionName : uart1_tx_one_char
92 * Description : Internal used function
93 * Use uart1 interface to transfer one char
94 * Parameters : uint8 TxChar - character to tx
95 * Returns : OK
96*******************************************************************************/
97void uart_tx_one_char(uint8 uart, uint8 TxChar) {
98 while (true) {
99 uint32 fifo_cnt = READ_PERI_REG(UART_STATUS(uart)) & (UART_TXFIFO_CNT<<UART_TXFIFO_CNT_S);
100 if ((fifo_cnt >> UART_TXFIFO_CNT_S & UART_TXFIFO_CNT) < 126) {
101 break;
102 }
103 }
104 WRITE_PERI_REG(UART_FIFO(uart), TxChar);
105}
106
107/******************************************************************************
108 * FunctionName : uart1_write_char
109 * Description : Internal used function
110 * Do some special deal while tx char is '\r' or '\n'
111 * Parameters : char c - character to tx
112 * Returns : NONE
113*******************************************************************************/
114static void ICACHE_FLASH_ATTR
115uart1_write_char(char c) {
116 if (c == '\n') {
117 uart_tx_one_char(UART1, '\r');
118 uart_tx_one_char(UART1, '\n');
119 } else if (c == '\r') {
120 } else {
121 uart_tx_one_char(UART1, c);
122 }
123}
124
125/******************************************************************************
126 * FunctionName : uart0_rx_intr_handler
127 * Description : Internal used function
128 * UART0 interrupt handler, add self handle code inside
129 * Parameters : void *para - point to ETS_UART_INTR_ATTACH's arg
130 * Returns : NONE
131*******************************************************************************/
132
133static void uart0_rx_intr_handler(void *para) {
134 /* uart0 and uart1 intr combine togther, when interrupt occur, see reg 0x3ff20020, bit2, bit0 represents
135 * uart1 and uart0 respectively
136 */
137
138 uint8 RcvChar;
139 uint8 uart_no = UART0;
140
141 if (UART_FRM_ERR_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_FRM_ERR_INT_ST)) {
142 // frame error
143 WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_FRM_ERR_INT_CLR);
144 }
145
146 if (UART_RXFIFO_FULL_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_FULL_INT_ST)) {
147 // fifo full
148 WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_RXFIFO_FULL_INT_CLR);
149 goto read_chars;
150 } else if (UART_RXFIFO_TOUT_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_TOUT_INT_ST)) {
151 WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_RXFIFO_TOUT_INT_CLR);
152 read_chars:
153 while (READ_PERI_REG(UART_STATUS(uart_no)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S)) {
154 RcvChar = READ_PERI_REG(UART_FIFO(uart_no)) & 0xff;
Paul Sokolovskyf12ea7c2015-01-16 01:54:40 +0200155#if 1 //MICROPY_REPL_EVENT_DRIVEN is not available here
156 system_os_post(UART_TASK_ID, 0, RcvChar);
157#else
Damien George075d5972014-11-27 20:30:33 +0000158 uint16_t rx_buf_in_next = (rx_buf_in + 1) % RX_BUF_SIZE;
159 if (rx_buf_in_next != rx_buf_out) {
160 rx_buf[rx_buf_in] = RcvChar;
161 rx_buf_in = rx_buf_in_next;
162 }
Paul Sokolovskyf12ea7c2015-01-16 01:54:40 +0200163#endif
Damien George075d5972014-11-27 20:30:33 +0000164 }
165 }
166}
167
168int uart0_rx(void) {
169 if (rx_buf_out != rx_buf_in) {
170 int chr = rx_buf[rx_buf_out];
171 rx_buf_out = (rx_buf_out + 1) % RX_BUF_SIZE;
172 return chr;
173 } else {
174 return -1;
175 }
176}
177
178/******************************************************************************
179 * FunctionName : uart_init
180 * Description : user interface for init uart
181 * Parameters : UartBautRate uart0_br - uart0 bautrate
182 * UartBautRate uart1_br - uart1 bautrate
183 * Returns : NONE
184*******************************************************************************/
185void ICACHE_FLASH_ATTR uart_init(UartBautRate uart0_br, UartBautRate uart1_br) {
186 // rom use 74880 baut_rate, here reinitialize
187 UartDev.baut_rate = uart0_br;
188 uart_config(UART0);
189 UartDev.baut_rate = uart1_br;
190 uart_config(UART1);
191 ETS_UART_INTR_ENABLE();
192
193 // install uart1 putc callback
194 os_install_putc1((void *)uart1_write_char);
195}
196
197void ICACHE_FLASH_ATTR uart_reattach() {
198 uart_init(UART_BIT_RATE_74880, UART_BIT_RATE_74880);
199}
Paul Sokolovskyf12ea7c2015-01-16 01:54:40 +0200200
201// Task-based UART interface
202
Damien Georgec98c1282015-05-06 00:02:58 +0100203#include "py/obj.h"
204#include "stmhal/pyexec.h"
205
206void soft_reset(void);
Paul Sokolovskyf12ea7c2015-01-16 01:54:40 +0200207
208void uart_task_handler(os_event_t *evt) {
Damien Georgec98c1282015-05-06 00:02:58 +0100209 int ret = pyexec_event_repl_process_char(evt->par);
210 if (ret & PYEXEC_FORCED_EXIT) {
211 soft_reset();
212 }
Paul Sokolovskyf12ea7c2015-01-16 01:54:40 +0200213}
214
215void uart_task_init() {
216 system_os_task(uart_task_handler, UART_TASK_ID, uart_evt_queue, sizeof(uart_evt_queue) / sizeof(*uart_evt_queue));
217}