blob: c037b997a46221170fd60a5d6faddc10a059caa7 [file] [log] [blame]
Damien George075d5972014-11-27 20:30:33 +00001/******************************************************************************
2 * Copyright 2013-2014 Espressif Systems (Wuxi)
3 *
4 * FileName: uart.c
5 *
6 * Description: Two UART mode configration and interrupt handler.
7 * Check your hardware connection while use this mode.
8 *
9 * Modification history:
10 * 2014/3/12, v1.0 create this file.
11*******************************************************************************/
12#include "ets_sys.h"
13#include "osapi.h"
14#include "uart.h"
15#include "osapi.h"
16#include "uart_register.h"
17#include "etshal.h"
18#include "c_types.h"
19
20#define RX_BUF_SIZE (256)
21
22// UartDev is defined and initialized in rom code.
23extern UartDevice UartDev;
24
25// circular buffer for RX buffering
26static uint16_t rx_buf_in;
27static uint16_t rx_buf_out;
28static uint8_t rx_buf[RX_BUF_SIZE];
29
30static void uart0_rx_intr_handler(void *para);
31
32/******************************************************************************
33 * FunctionName : uart_config
34 * Description : Internal used function
35 * UART0 used for data TX/RX, RX buffer size is 0x100, interrupt enabled
36 * UART1 just used for debug output
37 * Parameters : uart_no, use UART0 or UART1 defined ahead
38 * Returns : NONE
39*******************************************************************************/
40static void ICACHE_FLASH_ATTR uart_config(uint8 uart_no) {
41 if (uart_no == UART1) {
42 PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_U1TXD_BK);
43 } else {
44 ETS_UART_INTR_ATTACH(uart0_rx_intr_handler, NULL);
45 PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0TXD_U);
46 PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD);
47 PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, FUNC_U0RTS);
48 }
49
50 uart_div_modify(uart_no, UART_CLK_FREQ / (UartDev.baut_rate));
51
52 WRITE_PERI_REG(UART_CONF0(uart_no), UartDev.exist_parity
53 | UartDev.parity
54 | (UartDev.stop_bits << UART_STOP_BIT_NUM_S)
55 | (UartDev.data_bits << UART_BIT_NUM_S));
56
57 // clear rx and tx fifo,not ready
58 SET_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST);
59 CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST);
60
61 if (uart_no == UART0) {
62 // set rx fifo trigger
63 WRITE_PERI_REG(UART_CONF1(uart_no),
64 ((0x10 & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S) |
65 ((0x10 & UART_RX_FLOW_THRHD) << UART_RX_FLOW_THRHD_S) |
66 UART_RX_FLOW_EN |
67 (0x02 & UART_RX_TOUT_THRHD) << UART_RX_TOUT_THRHD_S |
68 UART_RX_TOUT_EN);
69 SET_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_RXFIFO_TOUT_INT_ENA |
70 UART_FRM_ERR_INT_ENA);
71 } else {
72 WRITE_PERI_REG(UART_CONF1(uart_no),
73 ((UartDev.rcv_buff.TrigLvl & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S));
74 }
75
76 // clear all interrupt
77 WRITE_PERI_REG(UART_INT_CLR(uart_no), 0xffff);
78 // enable rx_interrupt
79 SET_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_RXFIFO_FULL_INT_ENA);
80
81 // init RX buffer
82 rx_buf_in = 0;
83 rx_buf_out = 0;
84}
85
86/******************************************************************************
87 * FunctionName : uart1_tx_one_char
88 * Description : Internal used function
89 * Use uart1 interface to transfer one char
90 * Parameters : uint8 TxChar - character to tx
91 * Returns : OK
92*******************************************************************************/
93void uart_tx_one_char(uint8 uart, uint8 TxChar) {
94 while (true) {
95 uint32 fifo_cnt = READ_PERI_REG(UART_STATUS(uart)) & (UART_TXFIFO_CNT<<UART_TXFIFO_CNT_S);
96 if ((fifo_cnt >> UART_TXFIFO_CNT_S & UART_TXFIFO_CNT) < 126) {
97 break;
98 }
99 }
100 WRITE_PERI_REG(UART_FIFO(uart), TxChar);
101}
102
103/******************************************************************************
104 * FunctionName : uart1_write_char
105 * Description : Internal used function
106 * Do some special deal while tx char is '\r' or '\n'
107 * Parameters : char c - character to tx
108 * Returns : NONE
109*******************************************************************************/
110static void ICACHE_FLASH_ATTR
111uart1_write_char(char c) {
112 if (c == '\n') {
113 uart_tx_one_char(UART1, '\r');
114 uart_tx_one_char(UART1, '\n');
115 } else if (c == '\r') {
116 } else {
117 uart_tx_one_char(UART1, c);
118 }
119}
120
121/******************************************************************************
122 * FunctionName : uart0_rx_intr_handler
123 * Description : Internal used function
124 * UART0 interrupt handler, add self handle code inside
125 * Parameters : void *para - point to ETS_UART_INTR_ATTACH's arg
126 * Returns : NONE
127*******************************************************************************/
128
129static void uart0_rx_intr_handler(void *para) {
130 /* uart0 and uart1 intr combine togther, when interrupt occur, see reg 0x3ff20020, bit2, bit0 represents
131 * uart1 and uart0 respectively
132 */
133
134 uint8 RcvChar;
135 uint8 uart_no = UART0;
136
137 if (UART_FRM_ERR_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_FRM_ERR_INT_ST)) {
138 // frame error
139 WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_FRM_ERR_INT_CLR);
140 }
141
142 if (UART_RXFIFO_FULL_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_FULL_INT_ST)) {
143 // fifo full
144 WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_RXFIFO_FULL_INT_CLR);
145 goto read_chars;
146 } else if (UART_RXFIFO_TOUT_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_TOUT_INT_ST)) {
147 WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_RXFIFO_TOUT_INT_CLR);
148 read_chars:
149 while (READ_PERI_REG(UART_STATUS(uart_no)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S)) {
150 RcvChar = READ_PERI_REG(UART_FIFO(uart_no)) & 0xff;
151 uint16_t rx_buf_in_next = (rx_buf_in + 1) % RX_BUF_SIZE;
152 if (rx_buf_in_next != rx_buf_out) {
153 rx_buf[rx_buf_in] = RcvChar;
154 rx_buf_in = rx_buf_in_next;
155 }
156 }
157 }
158}
159
160int uart0_rx(void) {
161 if (rx_buf_out != rx_buf_in) {
162 int chr = rx_buf[rx_buf_out];
163 rx_buf_out = (rx_buf_out + 1) % RX_BUF_SIZE;
164 return chr;
165 } else {
166 return -1;
167 }
168}
169
170/******************************************************************************
171 * FunctionName : uart_init
172 * Description : user interface for init uart
173 * Parameters : UartBautRate uart0_br - uart0 bautrate
174 * UartBautRate uart1_br - uart1 bautrate
175 * Returns : NONE
176*******************************************************************************/
177void ICACHE_FLASH_ATTR uart_init(UartBautRate uart0_br, UartBautRate uart1_br) {
178 // rom use 74880 baut_rate, here reinitialize
179 UartDev.baut_rate = uart0_br;
180 uart_config(UART0);
181 UartDev.baut_rate = uart1_br;
182 uart_config(UART1);
183 ETS_UART_INTR_ENABLE();
184
185 // install uart1 putc callback
186 os_install_putc1((void *)uart1_write_char);
187}
188
189void ICACHE_FLASH_ATTR uart_reattach() {
190 uart_init(UART_BIT_RATE_74880, UART_BIT_RATE_74880);
191}