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Aneesh V16dc7022011-09-08 11:05:49 -04001/*
2 * (C) Copyright 2010
3 * Texas Instruments Incorporated.
4 * Aneesh V <aneesh@ti.com>
5 * Steve Sakoman <steve@sakoman.com>
6 *
7 * TI OMAP4 common configuration settings
8 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28#ifndef __CONFIG_OMAP4_COMMON_H
29#define __CONFIG_OMAP4_COMMON_H
30
31/*
32 * High Level Configuration Options
33 */
34#define CONFIG_ARMV7 1 /* This is an ARM V7 CPU core */
35#define CONFIG_OMAP 1 /* in a TI OMAP core */
36#define CONFIG_OMAP44XX 1 /* which is a 44XX */
37#define CONFIG_OMAP4430 1 /* which is in a 4430 */
Aneesh V16dc7022011-09-08 11:05:49 -040038
39/* Get CPU defs */
40#include <asm/arch/cpu.h>
Sricharan508a58f2011-11-15 09:49:55 -050041#include <asm/arch/omap.h>
Aneesh V16dc7022011-09-08 11:05:49 -040042
43/* Display CPU and Board Info */
44#define CONFIG_DISPLAY_CPUINFO 1
45#define CONFIG_DISPLAY_BOARDINFO 1
46
47/* Clock Defines */
48#define V_OSCK 38400000 /* Clock output from T2 */
49#define V_SCLK V_OSCK
50
51#undef CONFIG_USE_IRQ /* no support for IRQs */
52#define CONFIG_MISC_INIT_R
53
54#define CONFIG_OF_LIBFDT 1
55
56#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
57#define CONFIG_SETUP_MEMORY_TAGS 1
58#define CONFIG_INITRD_TAG 1
59#define CONFIG_REVISION_TAG 1
60
61/*
62 * Size of malloc() pool
63 * Total Size Environment - 128k
64 * Malloc - add 256k
65 */
66#define CONFIG_ENV_SIZE (128 << 10)
67#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (256 << 10))
68/* Vector Base */
69#define CONFIG_SYS_CA9_VECTOR_BASE SRAM_ROM_VECT_BASE
70
71/*
72 * Hardware drivers
73 */
74
75/*
76 * serial port - NS16550 compatible
77 */
78#define V_NS16550_CLK 48000000
79
80#define CONFIG_SYS_NS16550
81#define CONFIG_SYS_NS16550_SERIAL
82#define CONFIG_SYS_NS16550_REG_SIZE (-4)
83#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
84#define CONFIG_CONS_INDEX 3
85#define CONFIG_SYS_NS16550_COM3 UART3_BASE
86
87#define CONFIG_BAUDRATE 115200
88#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
89 115200}
90/* I2C */
91#define CONFIG_HARD_I2C 1
92#define CONFIG_SYS_I2C_SPEED 100000
93#define CONFIG_SYS_I2C_SLAVE 1
94#define CONFIG_SYS_I2C_BUS 0
95#define CONFIG_SYS_I2C_BUS_SELECT 1
96#define CONFIG_DRIVER_OMAP34XX_I2C 1
97#define CONFIG_I2C_MULTI_BUS 1
98
99/* TWL6030 */
Balaji T K14fa2dd2011-09-08 06:34:57 +0000100#ifndef CONFIG_SPL_BUILD
Aneesh V16dc7022011-09-08 11:05:49 -0400101#define CONFIG_TWL6030_POWER 1
Balaji T K14fa2dd2011-09-08 06:34:57 +0000102#endif
Aneesh V16dc7022011-09-08 11:05:49 -0400103
104/* MMC */
105#define CONFIG_GENERIC_MMC 1
106#define CONFIG_MMC 1
107#define CONFIG_OMAP_HSMMC 1
Aneesh V16dc7022011-09-08 11:05:49 -0400108#define CONFIG_DOS_PARTITION 1
109
110
111/* USB */
112#define CONFIG_MUSB_UDC 1
113#define CONFIG_USB_OMAP3 1
114
115/* USB device configuration */
116#define CONFIG_USB_DEVICE 1
John Rigby51b3a852011-10-18 21:19:17 -0600117#ifndef CONFIG_SPL_USB
Aneesh V16dc7022011-09-08 11:05:49 -0400118#define CONFIG_USB_TTY 1
John Rigby51b3a852011-10-18 21:19:17 -0600119#endif
Aneesh V16dc7022011-09-08 11:05:49 -0400120#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
121
122/* Flash */
123#define CONFIG_SYS_NO_FLASH 1
124
125/* commands to include */
126#include <config_cmd_default.h>
127
128/* Enabled commands */
129#define CONFIG_CMD_EXT2 /* EXT2 Support */
130#define CONFIG_CMD_FAT /* FAT support */
131#define CONFIG_CMD_I2C /* I2C serial bus support */
132#define CONFIG_CMD_MMC /* MMC support */
133
134/* Disabled commands */
135#undef CONFIG_CMD_NET
136#undef CONFIG_CMD_NFS
137#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
138#undef CONFIG_CMD_IMLS /* List all found images */
139
140/*
141 * Environment setup
142 */
143
144#define CONFIG_BOOTDELAY 3
145
146#define CONFIG_ENV_OVERWRITE
147
148#define CONFIG_EXTRA_ENV_SETTINGS \
149 "loadaddr=0x82000000\0" \
Aneesh Vd71a4912011-11-21 23:38:58 +0000150 "console=ttyO2,115200n8\0" \
Jon Hunterc176dd02012-05-01 10:05:08 +0000151 "fdt_high=0xffffffff\0" \
Aneesh V16dc7022011-09-08 11:05:49 -0400152 "usbtty=cdc_acm\0" \
153 "vram=16M\0" \
154 "mmcdev=0\0" \
155 "mmcroot=/dev/mmcblk0p2 rw\0" \
156 "mmcrootfstype=ext3 rootwait\0" \
157 "mmcargs=setenv bootargs console=${console} " \
158 "vram=${vram} " \
159 "root=${mmcroot} " \
160 "rootfstype=${mmcrootfstype}\0" \
John Rigbyb80fc382011-07-01 00:10:49 +0100161 "bootscr=boot.scr\0" \
162 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} ${bootscr}\0" \
Aneesh V16dc7022011-09-08 11:05:49 -0400163 "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
164 "source ${loadaddr}\0" \
John Rigbyb80fc382011-07-01 00:10:49 +0100165 "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
166 "importbootenv=echo Importing environment from mmc ...; " \
167 "env import -t $loadaddr $filesize\0" \
Aneesh V16dc7022011-09-08 11:05:49 -0400168 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
169 "mmcboot=echo Booting from mmc${mmcdev} ...; " \
170 "run mmcargs; " \
171 "bootm ${loadaddr}\0" \
John Rigbybd753912011-09-19 23:02:52 -0600172 "kernel_addr_r=0x88000000\0" \
173 "ramdisk_addr_r=0x81600000\0" \
174 "pxefile_addr_r=0x86000000\0"
Aneesh V16dc7022011-09-08 11:05:49 -0400175
Robie Basak8b622af2012-02-16 09:02:17 -0700176#ifdef CONFIG_SPL_USB
177#define CONFIG_BOOTCOMMAND \
178 "if usb start; then " \
179 "set autoload no; "\
180 "bootp; "\
181 "pxe get;" \
182 "pxe boot;" \
183 "fi"
184#else
Aneesh V16dc7022011-09-08 11:05:49 -0400185#define CONFIG_BOOTCOMMAND \
186 "if mmc rescan ${mmcdev}; then " \
John Rigbyb80fc382011-07-01 00:10:49 +0100187 "if run loadbootenv; then " \
188 "echo Loaded environment from ${bootenv};" \
189 "run importbootenv;" \
190 "if test -n $uenvcmd; then " \
191 "echo Running uenvcmd ...;" \
192 "run uenvcmd;" \
193 "fi;" \
194 "elif run loadbootscript; then " \
195 "echo Loaded script from ${bootscr};" \
Aneesh V16dc7022011-09-08 11:05:49 -0400196 "run bootscript; " \
197 "else " \
198 "if run loaduimage; then " \
199 "run mmcboot; " \
200 "fi; " \
201 "fi; " \
John Rigby2c9ca282011-08-15 15:17:03 -0600202 "fi; " \
203 "if usb start; then " \
204 "set autoload no; "\
205 "bootp; "\
206 "pxe get;" \
207 "pxe boot;" \
Aneesh V16dc7022011-09-08 11:05:49 -0400208 "fi"
Robie Basak8b622af2012-02-16 09:02:17 -0700209#endif
Aneesh V16dc7022011-09-08 11:05:49 -0400210
211#define CONFIG_AUTO_COMPLETE 1
212
213/*
214 * Miscellaneous configurable options
215 */
216
John Rigby09b9feb2011-07-01 01:30:45 +0100217#define CONFIG_CMDLINE_EDITING
Aneesh V16dc7022011-09-08 11:05:49 -0400218#define CONFIG_SYS_LONGHELP /* undef to save memory */
219#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
Aneesh V16dc7022011-09-08 11:05:49 -0400220#define CONFIG_SYS_CBSIZE 512
221/* Print Buffer Size */
222#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
223 sizeof(CONFIG_SYS_PROMPT) + 16)
224#define CONFIG_SYS_MAXARGS 16
225/* Boot Argument Buffer Size */
226#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
227
228/*
229 * memtest setup
230 */
231#define CONFIG_SYS_MEMTEST_START 0x80000000
232#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (32 << 20))
233
234/* Default load address */
235#define CONFIG_SYS_LOAD_ADDR 0x80000000
236
237/* Use General purpose timer 1 */
238#define CONFIG_SYS_TIMERBASE GPT2_BASE
239#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
240#define CONFIG_SYS_HZ 1000
241
242/*
243 * Stack sizes
244 *
245 * The stack sizes are set up in start.S using the settings below
246 */
247#define CONFIG_STACKSIZE (128 << 10) /* Regular stack */
248#ifdef CONFIG_USE_IRQ
249#define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack */
250#define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack */
251#endif
252
253/*
254 * SDRAM Memory Map
255 * Even though we use two CS all the memory
256 * is mapped to one contiguous block
257 */
258#define CONFIG_NR_DRAM_BANKS 1
259
260#define CONFIG_SYS_SDRAM_BASE 0x80000000
261#define CONFIG_SYS_INIT_RAM_ADDR 0x4030D800
262#define CONFIG_SYS_INIT_RAM_SIZE 0x800
263#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
264 CONFIG_SYS_INIT_RAM_SIZE - \
265 GENERATED_GBL_DATA_SIZE)
266
267#ifndef CONFIG_SYS_L2CACHE_OFF
268#define CONFIG_SYS_L2_PL310 1
269#define CONFIG_SYS_PL310_BASE 0x48242000
270#endif
Aneesh V8e408522011-11-21 23:38:59 +0000271#define CONFIG_SYS_CACHELINE_SIZE 32
Aneesh V16dc7022011-09-08 11:05:49 -0400272
273/* Defines for SDRAM init */
SRICHARAN R8e706912011-09-27 01:43:18 +0000274#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
275
Aneesh V16dc7022011-09-08 11:05:49 -0400276#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
277#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
278#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
279#endif
280
281/* Defines for SPL */
282#define CONFIG_SPL
283#define CONFIG_SPL_TEXT_BASE 0x40304350
284#define CONFIG_SPL_MAX_SIZE (38 * 1024)
285#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
286
Aneesh V2d01dd92011-10-21 12:29:34 -0400287/*
Aneesh V2d01dd92011-10-21 12:29:34 -0400288 * 64 bytes before this address should be set aside for u-boot.img's
Aneesh Vf6ddfdd2011-11-21 23:39:04 +0000289 * header. That is 80E7FFC0--0x80E80000 should not be used for any
Aneesh V2d01dd92011-10-21 12:29:34 -0400290 * other needs.
291 */
Aneesh Vf6ddfdd2011-11-21 23:39:04 +0000292#define CONFIG_SYS_TEXT_BASE 0x80E80000
Aneesh V2d01dd92011-10-21 12:29:34 -0400293
Aneesh Vf6ddfdd2011-11-21 23:39:04 +0000294/*
295 * BSS and malloc area 64MB into memory to allow enough
296 * space for the kernel at the beginning of memory
297 */
298#define CONFIG_SPL_BSS_START_ADDR 0x84000000
299#define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */
300#define CONFIG_SYS_SPL_MALLOC_START 0x84100000
301#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */
Aneesh V16dc7022011-09-08 11:05:49 -0400302
303#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
304#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
305#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
306#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
307
308#define CONFIG_SPL_LIBCOMMON_SUPPORT
309#define CONFIG_SPL_LIBDISK_SUPPORT
310#define CONFIG_SPL_I2C_SUPPORT
John Rigby51b3a852011-10-18 21:19:17 -0600311/*
312 * TODO: Fix this:
313 * Because of spl image size issues, usb peripheral boot
314 * and mmc/fat boot can not be enabled at the same time
315 */
316#ifdef CONFIG_SPL_USB
317#define CONFIG_SPL_DSU_SUPPORT
318#define CONFIG_SPL_USB_SUPPORT
319#define CONFIG_SPL_MUSB_SUPPORT
320#else
Aneesh V16dc7022011-09-08 11:05:49 -0400321#define CONFIG_SPL_MMC_SUPPORT
322#define CONFIG_SPL_FAT_SUPPORT
John Rigbydf4985e2011-10-21 11:43:36 -0600323#endif
Aneesh V16dc7022011-09-08 11:05:49 -0400324#define CONFIG_SPL_LIBGENERIC_SUPPORT
325#define CONFIG_SPL_SERIAL_SUPPORT
Thomas Weberd1df0fd2012-05-14 10:28:54 +0000326#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
Aneesh V16dc7022011-09-08 11:05:49 -0400327
Aneesh V20c63122012-03-08 07:20:22 +0000328#define CONFIG_SYS_THUMB_BUILD
329
Aneesh V16dc7022011-09-08 11:05:49 -0400330#endif /* __CONFIG_OMAP4_COMMON_H */