commit 8e40852f0d60ab0b1381d43e38b31a6b3bcd6549
author Aneesh V <aneesh@ti.com> Mon Nov 21 23:38:59 2011 +0000
committer Albert ARIBAUD <albert.u.boot@aribaud.net> Tue Dec 06 23:59:34 2011 +0100
tree ed3cb1001847a9de5227d390aaad97e22eae7c3d
parent d71a4916d6ed3a60c254d800b992fc039a04c762

omap: fix cache line size for omap3/omap4 boards

Acked-by: Tom Rini <trini@ti.com>
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>

include/configs/omap4_common.h

diff --git a/include/configs/omap4_common.h b/include/configs/omap4_common.h
index a058700..613aef2 100644
--- a/include/configs/omap4_common.h
+++ b/include/configs/omap4_common.h
@@ -239,6 +239,7 @@
 #define CONFIG_SYS_L2_PL310		1
 #define CONFIG_SYS_PL310_BASE	0x48242000
 #endif
+#define CONFIG_SYS_CACHELINE_SIZE	32
 
 /* Defines for SDRAM init */
 #define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS