armvixl | 5289c59 | 2015-03-02 13:52:04 +0000 | [diff] [blame] | 1 | // Copyright 2014, ARM Limited |
armvixl | 578645f | 2013-08-15 17:21:42 +0100 | [diff] [blame] | 2 | // All rights reserved. |
| 3 | // |
| 4 | // Redistribution and use in source and binary forms, with or without |
| 5 | // modification, are permitted provided that the following conditions are met: |
| 6 | // |
| 7 | // * Redistributions of source code must retain the above copyright notice, |
| 8 | // this list of conditions and the following disclaimer. |
| 9 | // * Redistributions in binary form must reproduce the above copyright notice, |
| 10 | // this list of conditions and the following disclaimer in the documentation |
| 11 | // and/or other materials provided with the distribution. |
| 12 | // * Neither the name of ARM Limited nor the names of its contributors may be |
| 13 | // used to endorse or promote products derived from this software without |
| 14 | // specific prior written permission. |
| 15 | // |
| 16 | // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND |
| 17 | // ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
| 18 | // WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| 19 | // DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE |
| 20 | // FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| 21 | // DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| 22 | // SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| 23 | // CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| 24 | // OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| 25 | // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 26 | |
| 27 | #include <stdlib.h> |
Alexandre Rames | b68bacb | 2016-05-24 08:56:23 +0100 | [diff] [blame] | 28 | |
armvixl | 330dc71 | 2014-11-25 10:38:32 +0000 | [diff] [blame] | 29 | #include "test-runner.h" |
armvixl | 578645f | 2013-08-15 17:21:42 +0100 | [diff] [blame] | 30 | |
Alexandre Rames | 39c32a6 | 2016-05-23 15:47:22 +0100 | [diff] [blame] | 31 | #include "a64/decoder-a64.h" |
| 32 | #include "a64/disasm-a64.h" |
armvixl | 578645f | 2013-08-15 17:21:42 +0100 | [diff] [blame] | 33 | |
| 34 | #define TEST(name) TEST_(FUZZ_##name) |
| 35 | |
| 36 | |
| 37 | namespace vixl { |
| 38 | |
| 39 | |
| 40 | TEST(decoder) { |
| 41 | // Feed noise into the decoder to check that it doesn't crash. |
| 42 | // 43 million = ~1% of the instruction space. |
| 43 | static const int instruction_count = 43 * 1024 * 1024; |
| 44 | |
| 45 | uint16_t seed[3] = {1, 2, 3}; |
| 46 | seed48(seed); |
| 47 | |
| 48 | Decoder decoder; |
| 49 | Instruction buffer[kInstructionSize]; |
| 50 | |
| 51 | for (int i = 0; i < instruction_count; i++) { |
armvixl | db64434 | 2015-07-21 11:37:10 +0100 | [diff] [blame] | 52 | uint32_t instr = static_cast<uint32_t>(mrand48()); |
armvixl | 578645f | 2013-08-15 17:21:42 +0100 | [diff] [blame] | 53 | buffer->SetInstructionBits(instr); |
| 54 | decoder.Decode(buffer); |
| 55 | } |
| 56 | } |
| 57 | |
| 58 | TEST(disasm) { |
| 59 | // Feed noise into the disassembler to check that it doesn't crash. |
| 60 | // 9 million = ~0.2% of the instruction space. |
| 61 | static const int instruction_count = 9 * 1024 * 1024; |
| 62 | |
| 63 | uint16_t seed[3] = {42, 43, 44}; |
| 64 | seed48(seed); |
| 65 | |
| 66 | Decoder decoder; |
| 67 | Disassembler disasm; |
| 68 | Instruction buffer[kInstructionSize]; |
| 69 | |
| 70 | decoder.AppendVisitor(&disasm); |
| 71 | for (int i = 0; i < instruction_count; i++) { |
armvixl | db64434 | 2015-07-21 11:37:10 +0100 | [diff] [blame] | 72 | uint32_t instr = static_cast<uint32_t>(mrand48()); |
armvixl | 578645f | 2013-08-15 17:21:42 +0100 | [diff] [blame] | 73 | buffer->SetInstructionBits(instr); |
| 74 | decoder.Decode(buffer); |
| 75 | } |
| 76 | } |
| 77 | |
| 78 | #if 0 |
| 79 | // These tests are commented out as they take a long time to run, causing the |
armvixl | 330dc71 | 2014-11-25 10:38:32 +0000 | [diff] [blame] | 80 | // test script to timeout. After enabling them, they are best run manually: |
armvixl | 578645f | 2013-08-15 17:21:42 +0100 | [diff] [blame] | 81 | // |
armvixl | 330dc71 | 2014-11-25 10:38:32 +0000 | [diff] [blame] | 82 | // test-runner_sim FUZZ_decoder_pedantic |
| 83 | // test-runner_sim FUZZ_disasm_pedantic |
armvixl | 578645f | 2013-08-15 17:21:42 +0100 | [diff] [blame] | 84 | // |
armvixl | 330dc71 | 2014-11-25 10:38:32 +0000 | [diff] [blame] | 85 | // or test-runner_sim_g for debug builds. |
armvixl | 578645f | 2013-08-15 17:21:42 +0100 | [diff] [blame] | 86 | |
| 87 | TEST(decoder_pedantic) { |
| 88 | // Test the entire instruction space. |
| 89 | Decoder decoder; |
| 90 | Instruction buffer[kInstructionSize]; |
| 91 | |
armvixl | b0c8ae2 | 2014-03-21 14:03:59 +0000 | [diff] [blame] | 92 | for (uint64_t i = 0; i < (UINT64_C(1) << 32); i++) { |
armvixl | 578645f | 2013-08-15 17:21:42 +0100 | [diff] [blame] | 93 | if ((i & 0xffffff) == 0) { |
| 94 | fprintf(stderr, "0x%08" PRIx32 "\n", static_cast<uint32_t>(i)); |
| 95 | } |
| 96 | buffer->SetInstructionBits(static_cast<uint32_t>(i)); |
| 97 | decoder.Decode(buffer); |
| 98 | } |
| 99 | } |
| 100 | |
| 101 | TEST(disasm_pedantic) { |
| 102 | // Test the entire instruction space. Warning: takes about 30 minutes on a |
| 103 | // high-end CPU. |
| 104 | Decoder decoder; |
| 105 | PrintDisassembler disasm(stdout); |
| 106 | Instruction buffer[kInstructionSize]; |
| 107 | |
| 108 | decoder.AppendVisitor(&disasm); |
armvixl | b0c8ae2 | 2014-03-21 14:03:59 +0000 | [diff] [blame] | 109 | for (uint64_t i = 0; i < (UINT64_C(1) << 32); i++) { |
armvixl | 578645f | 2013-08-15 17:21:42 +0100 | [diff] [blame] | 110 | if ((i & 0xffff) == 0) { |
| 111 | fprintf(stderr, "0x%08" PRIx32 "\n", static_cast<uint32_t>(i)); |
| 112 | } |
| 113 | buffer->SetInstructionBits(static_cast<uint32_t>(i)); |
| 114 | decoder.Decode(buffer); |
| 115 | } |
| 116 | } |
| 117 | #endif |
| 118 | |
| 119 | } // namespace vixl |