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armvixl5289c592015-03-02 13:52:04 +00001// Copyright 2014, ARM Limited
armvixl578645f2013-08-15 17:21:42 +01002// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are met:
6//
7// * Redistributions of source code must retain the above copyright notice,
8// this list of conditions and the following disclaimer.
9// * Redistributions in binary form must reproduce the above copyright notice,
10// this list of conditions and the following disclaimer in the documentation
11// and/or other materials provided with the distribution.
12// * Neither the name of ARM Limited nor the names of its contributors may be
13// used to endorse or promote products derived from this software without
14// specific prior written permission.
15//
16// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
17// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
20// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
23// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26
27#include <stdlib.h>
armvixl330dc712014-11-25 10:38:32 +000028#include "test-runner.h"
armvixl578645f2013-08-15 17:21:42 +010029
armvixl6e2c8272015-03-31 11:04:14 +010030#include "vixl/a64/decoder-a64.h"
31#include "vixl/a64/disasm-a64.h"
armvixl578645f2013-08-15 17:21:42 +010032
33#define TEST(name) TEST_(FUZZ_##name)
34
35
36namespace vixl {
37
38
39TEST(decoder) {
40 // Feed noise into the decoder to check that it doesn't crash.
41 // 43 million = ~1% of the instruction space.
42 static const int instruction_count = 43 * 1024 * 1024;
43
44 uint16_t seed[3] = {1, 2, 3};
45 seed48(seed);
46
47 Decoder decoder;
48 Instruction buffer[kInstructionSize];
49
50 for (int i = 0; i < instruction_count; i++) {
armvixldb644342015-07-21 11:37:10 +010051 uint32_t instr = static_cast<uint32_t>(mrand48());
armvixl578645f2013-08-15 17:21:42 +010052 buffer->SetInstructionBits(instr);
53 decoder.Decode(buffer);
54 }
55}
56
57TEST(disasm) {
58 // Feed noise into the disassembler to check that it doesn't crash.
59 // 9 million = ~0.2% of the instruction space.
60 static const int instruction_count = 9 * 1024 * 1024;
61
62 uint16_t seed[3] = {42, 43, 44};
63 seed48(seed);
64
65 Decoder decoder;
66 Disassembler disasm;
67 Instruction buffer[kInstructionSize];
68
69 decoder.AppendVisitor(&disasm);
70 for (int i = 0; i < instruction_count; i++) {
armvixldb644342015-07-21 11:37:10 +010071 uint32_t instr = static_cast<uint32_t>(mrand48());
armvixl578645f2013-08-15 17:21:42 +010072 buffer->SetInstructionBits(instr);
73 decoder.Decode(buffer);
74 }
75}
76
77#if 0
78// These tests are commented out as they take a long time to run, causing the
armvixl330dc712014-11-25 10:38:32 +000079// test script to timeout. After enabling them, they are best run manually:
armvixl578645f2013-08-15 17:21:42 +010080//
armvixl330dc712014-11-25 10:38:32 +000081// test-runner_sim FUZZ_decoder_pedantic
82// test-runner_sim FUZZ_disasm_pedantic
armvixl578645f2013-08-15 17:21:42 +010083//
armvixl330dc712014-11-25 10:38:32 +000084// or test-runner_sim_g for debug builds.
armvixl578645f2013-08-15 17:21:42 +010085
86TEST(decoder_pedantic) {
87 // Test the entire instruction space.
88 Decoder decoder;
89 Instruction buffer[kInstructionSize];
90
armvixlb0c8ae22014-03-21 14:03:59 +000091 for (uint64_t i = 0; i < (UINT64_C(1) << 32); i++) {
armvixl578645f2013-08-15 17:21:42 +010092 if ((i & 0xffffff) == 0) {
93 fprintf(stderr, "0x%08" PRIx32 "\n", static_cast<uint32_t>(i));
94 }
95 buffer->SetInstructionBits(static_cast<uint32_t>(i));
96 decoder.Decode(buffer);
97 }
98}
99
100TEST(disasm_pedantic) {
101 // Test the entire instruction space. Warning: takes about 30 minutes on a
102 // high-end CPU.
103 Decoder decoder;
104 PrintDisassembler disasm(stdout);
105 Instruction buffer[kInstructionSize];
106
107 decoder.AppendVisitor(&disasm);
armvixlb0c8ae22014-03-21 14:03:59 +0000108 for (uint64_t i = 0; i < (UINT64_C(1) << 32); i++) {
armvixl578645f2013-08-15 17:21:42 +0100109 if ((i & 0xffff) == 0) {
110 fprintf(stderr, "0x%08" PRIx32 "\n", static_cast<uint32_t>(i));
111 }
112 buffer->SetInstructionBits(static_cast<uint32_t>(i));
113 decoder.Decode(buffer);
114 }
115}
116#endif
117
118} // namespace vixl