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-rw-r--r--hw/acpi/ich9.c24
-rw-r--r--hw/isa/lpc_ich9.c40
-rw-r--r--hw/pci-host/q35.c10
-rw-r--r--include/hw/acpi/ich9.h2
-rw-r--r--include/hw/i386/ich9.h2
-rw-r--r--include/hw/pci-host/q35.h2
6 files changed, 80 insertions, 0 deletions
diff --git a/hw/acpi/ich9.c b/hw/acpi/ich9.c
index 3fb443d06d..7e0429e0f9 100644
--- a/hw/acpi/ich9.c
+++ b/hw/acpi/ich9.c
@@ -24,6 +24,7 @@
* GNU GPL, version 2 or (at your option) any later version.
*/
#include "hw/hw.h"
+#include "qapi/visitor.h"
#include "hw/i386/pc.h"
#include "hw/pci/pci.h"
#include "qemu/timer.h"
@@ -228,3 +229,26 @@ void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm,
pm->powerdown_notifier.notify = pm_powerdown_req;
qemu_register_powerdown_notifier(&pm->powerdown_notifier);
}
+
+static void ich9_pm_get_gpe0_blk(Object *obj, Visitor *v,
+ void *opaque, const char *name,
+ Error **errp)
+{
+ ICH9LPCPMRegs *pm = opaque;
+ uint32_t value = pm->pm_io_base + ICH9_PMIO_GPE0_STS;
+
+ visit_type_uint32(v, &value, name, errp);
+}
+
+void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs *pm, Error **errp)
+{
+ static const uint32_t gpe0_len = ICH9_PMIO_GPE0_LEN;
+
+ object_property_add_uint32_ptr(obj, ACPI_PM_PROP_PM_IO_BASE,
+ &pm->pm_io_base, errp);
+ object_property_add(obj, ACPI_PM_PROP_GPE0_BLK, "uint32",
+ ich9_pm_get_gpe0_blk,
+ NULL, NULL, pm, NULL);
+ object_property_add_uint32_ptr(obj, ACPI_PM_PROP_GPE0_BLK_LEN,
+ &gpe0_len, errp);
+}
diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
index 5633d08b62..19b2198fa6 100644
--- a/hw/isa/lpc_ich9.c
+++ b/hw/isa/lpc_ich9.c
@@ -29,6 +29,7 @@
*/
#include "qemu-common.h"
#include "hw/hw.h"
+#include "qapi/visitor.h"
#include "qemu/range.h"
#include "hw/isa/isa.h"
#include "hw/sysbus.h"
@@ -525,6 +526,43 @@ static const MemoryRegionOps ich9_rst_cnt_ops = {
.endianness = DEVICE_LITTLE_ENDIAN
};
+Object *ich9_lpc_find(void)
+{
+ bool ambig;
+ Object *o = object_resolve_path_type("", TYPE_ICH9_LPC_DEVICE, &ambig);
+
+ if (ambig) {
+ return NULL;
+ }
+ return o;
+}
+
+static void ich9_lpc_get_sci_int(Object *obj, Visitor *v,
+ void *opaque, const char *name,
+ Error **errp)
+{
+ ICH9LPCState *lpc = ICH9_LPC_DEVICE(obj);
+ uint32_t value = ich9_lpc_sci_irq(lpc);
+
+ visit_type_uint32(v, &value, name, errp);
+}
+
+static void ich9_lpc_add_properties(ICH9LPCState *lpc)
+{
+ static const uint8_t acpi_enable_cmd = ICH9_APM_ACPI_ENABLE;
+ static const uint8_t acpi_disable_cmd = ICH9_APM_ACPI_DISABLE;
+
+ object_property_add(OBJECT(lpc), ACPI_PM_PROP_SCI_INT, "uint32",
+ ich9_lpc_get_sci_int,
+ NULL, NULL, NULL, NULL);
+ object_property_add_uint8_ptr(OBJECT(lpc), ACPI_PM_PROP_ACPI_ENABLE_CMD,
+ &acpi_enable_cmd, NULL);
+ object_property_add_uint8_ptr(OBJECT(lpc), ACPI_PM_PROP_ACPI_DISABLE_CMD,
+ &acpi_disable_cmd, NULL);
+
+ ich9_pm_add_properties(OBJECT(lpc), &lpc->pm, NULL);
+}
+
static int ich9_lpc_initfn(PCIDevice *d)
{
ICH9LPCState *lpc = ICH9_LPC_DEVICE(d);
@@ -552,6 +590,8 @@ static int ich9_lpc_initfn(PCIDevice *d)
ICH9_RST_CNT_IOPORT, &lpc->rst_cnt_mem,
1);
+ ich9_lpc_add_properties(lpc);
+
return 0;
}
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index a051b58ba7..50063f83f3 100644
--- a/hw/pci-host/q35.c
+++ b/hw/pci-host/q35.c
@@ -389,6 +389,16 @@ static int mch_init(PCIDevice *d)
return 0;
}
+uint64_t mch_mcfg_base(void)
+{
+ bool ambiguous;
+ Object *o = object_resolve_path_type("", TYPE_MCH_PCI_DEVICE, &ambiguous);
+ if (!o) {
+ return 0;
+ }
+ return MCH_HOST_BRIDGE_PCIEXBAR_DEFAULT;
+}
+
static void mch_class_init(ObjectClass *klass, void *data)
{
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
diff --git a/include/hw/acpi/ich9.h b/include/hw/acpi/ich9.h
index b1fe71faf5..82fcf9f2eb 100644
--- a/include/hw/acpi/ich9.h
+++ b/include/hw/acpi/ich9.h
@@ -49,4 +49,6 @@ void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm,
void ich9_pm_iospace_update(ICH9LPCPMRegs *pm, uint32_t pm_io_base);
extern const VMStateDescription vmstate_ich9_pm;
+void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs *pm, Error **errp);
+
#endif /* HW_ACPI_ICH9_H */
diff --git a/include/hw/i386/ich9.h b/include/hw/i386/ich9.h
index c5f637bffd..4a68b359a6 100644
--- a/include/hw/i386/ich9.h
+++ b/include/hw/i386/ich9.h
@@ -66,6 +66,8 @@ typedef struct ICH9LPCState {
qemu_irq *ioapic;
} ICH9LPCState;
+Object *ich9_lpc_find(void);
+
#define Q35_MASK(bit, ms_bit, ls_bit) \
((uint##bit##_t)(((1ULL << ((ms_bit) + 1)) - 1) & ~((1ULL << ls_bit) - 1)))
diff --git a/include/hw/pci-host/q35.h b/include/hw/pci-host/q35.h
index 6eb7ab676f..f9db770104 100644
--- a/include/hw/pci-host/q35.h
+++ b/include/hw/pci-host/q35.h
@@ -156,4 +156,6 @@ typedef struct Q35PCIHost {
#define MCH_PCIE_DEV 1
#define MCH_PCIE_FUNC 0
+uint64_t mch_mcfg_base(void);
+
#endif /* HW_Q35_H */