diff options
| -rw-r--r-- | exec.c | 6 | ||||
| -rw-r--r-- | hw/pxa2xx_gpio.c | 2 | ||||
| -rw-r--r-- | include/exec/cpu-all.h | 1 | ||||
| -rw-r--r-- | include/qom/cpu.h | 10 | ||||
| -rw-r--r-- | target-mips/op_helper.c | 11 |
5 files changed, 22 insertions, 8 deletions
@@ -247,10 +247,10 @@ static const VMStateDescription vmstate_cpu_common = { }; #endif -CPUArchState *qemu_get_cpu(int index) +CPUState *qemu_get_cpu(int index) { CPUArchState *env = first_cpu; - CPUState *cpu; + CPUState *cpu = NULL; while (env) { cpu = ENV_GET_CPU(env); @@ -260,7 +260,7 @@ CPUArchState *qemu_get_cpu(int index) env = env->next_cpu; } - return env; + return cpu; } void cpu_exec_init(CPUArchState *env) diff --git a/hw/pxa2xx_gpio.c b/hw/pxa2xx_gpio.c index c02c295af4..eec2ea3f1c 100644 --- a/hw/pxa2xx_gpio.c +++ b/hw/pxa2xx_gpio.c @@ -277,7 +277,7 @@ static int pxa2xx_gpio_initfn(SysBusDevice *dev) s = FROM_SYSBUS(PXA2xxGPIOInfo, dev); - s->cpu = arm_env_get_cpu(qemu_get_cpu(s->ncpu)); + s->cpu = ARM_CPU(qemu_get_cpu(s->ncpu)); qdev_init_gpio_in(&dev->qdev, pxa2xx_gpio_set, s->lines); qdev_init_gpio_out(&dev->qdev, s->handler, s->lines); diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 439e88deb4..249e0464f2 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -354,7 +354,6 @@ int page_check_range(target_ulong start, target_ulong len, int flags); #endif CPUArchState *cpu_copy(CPUArchState *env); -CPUArchState *qemu_get_cpu(int cpu); #define CPU_DUMP_CODE 0x00010000 #define CPU_DUMP_FPU 0x00020000 /* dump FPU register state, not just integer */ diff --git a/include/qom/cpu.h b/include/qom/cpu.h index d5e0a4057a..773caf9fa1 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -156,5 +156,15 @@ bool cpu_is_stopped(CPUState *cpu); */ void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data); +/** + * qemu_get_cpu: + * @index: The CPUState@cpu_index value of the CPU to obtain. + * + * Gets a CPU matching @index. + * + * Returns: The CPU or %NULL if there is no matching CPU. + */ +CPUState *qemu_get_cpu(int index); + #endif diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c index 1816a0ec8d..1bca4a159e 100644 --- a/target-mips/op_helper.c +++ b/target-mips/op_helper.c @@ -585,8 +585,9 @@ static inline void mips_tc_sleep(MIPSCPU *cpu, int tc) walking the list of CPUMIPSStates. */ static CPUMIPSState *mips_cpu_map_tc(CPUMIPSState *env, int *tc) { + MIPSCPU *cpu; CPUState *cs; - CPUMIPSState *other; + CPUState *other_cs; int vpe_idx; int tc_idx = *tc; @@ -599,8 +600,12 @@ static CPUMIPSState *mips_cpu_map_tc(CPUMIPSState *env, int *tc) cs = CPU(mips_env_get_cpu(env)); vpe_idx = tc_idx / cs->nr_threads; *tc = tc_idx % cs->nr_threads; - other = qemu_get_cpu(vpe_idx); - return other ? other : env; + other_cs = qemu_get_cpu(vpe_idx); + if (other_cs == NULL) { + return env; + } + cpu = MIPS_CPU(other_cs); + return &cpu->env; } /* The per VPE CP0_Status register shares some fields with the per TC |