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authorDamien George <damien.p.george@gmail.com>2018-09-24 12:55:15 +1000
committerDamien George <damien.p.george@gmail.com>2018-09-24 12:55:15 +1000
commit1acf58c08f0f29408522a99cc7ef1d6270c21c09 (patch)
treeb1535511dd46522637ccabb955d63b628c6e5c01 /ports
parent4df1943948d357f6f62c6f23a241476490dcd3b4 (diff)
stm32/modmachine: Re-enable PLLSAI[1] after waking from stop mode.
On F7s PLLSAI is used as a 48MHz clock source if the main PLL cannot provide such a frequency, and on L4s PLLSAI1 is always used as a clock source for the peripherals. This commit makes sure these PLLs are re-enabled upon waking from stop mode so the peripherals work. See issues #4022 and #4178 (L4 specific).
Diffstat (limited to 'ports')
-rw-r--r--ports/stm32/modmachine.c16
1 files changed, 16 insertions, 0 deletions
diff --git a/ports/stm32/modmachine.c b/ports/stm32/modmachine.c
index 6e0c08605..7c24b0867 100644
--- a/ports/stm32/modmachine.c
+++ b/ports/stm32/modmachine.c
@@ -568,6 +568,22 @@ STATIC mp_obj_t machine_sleep(void) {
#endif
}
+ #if defined(STM32F7)
+ if (RCC->DCKCFGR2 & RCC_DCKCFGR2_CK48MSEL) {
+ // Enable PLLSAI if it is selected as 48MHz source
+ RCC->CR |= RCC_CR_PLLSAION;
+ while (!(RCC->CR & RCC_CR_PLLSAIRDY)) {
+ }
+ }
+ #endif
+
+ #if defined(STM32L4)
+ // Enable PLLSAI1 for peripherals that use it
+ RCC->CR |= RCC_CR_PLLSAI1ON;
+ while (!(RCC->CR & RCC_CR_PLLSAI1RDY)) {
+ }
+ #endif
+
#endif
return mp_const_none;