diff options
Diffstat (limited to 'test/CodeGen/AMDGPU/opt-sgpr-to-vgpr-copy.mir')
| -rw-r--r-- | test/CodeGen/AMDGPU/opt-sgpr-to-vgpr-copy.mir | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/test/CodeGen/AMDGPU/opt-sgpr-to-vgpr-copy.mir b/test/CodeGen/AMDGPU/opt-sgpr-to-vgpr-copy.mir index 6c6590a154a..9702d18d905 100644 --- a/test/CodeGen/AMDGPU/opt-sgpr-to-vgpr-copy.mir +++ b/test/CodeGen/AMDGPU/opt-sgpr-to-vgpr-copy.mir @@ -5,19 +5,19 @@ # GCN-LABEL: {{^}}name: const_to_sgpr{{$}} # GCN: %[[HI:[0-9]+]]:sreg_32_xm0 = S_MOV_B32 0 # GCN-NEXT: %[[LO:[0-9]+]]:sreg_32_xm0 = S_MOV_B32 1048576 -# GCN-NEXT: %[[SGPR_PAIR:[0-9]+]]:sreg_64 = REG_SEQUENCE killed %[[LO]], 1, killed %[[HI]], 2 +# GCN-NEXT: %[[SGPR_PAIR:[0-9]+]]:sreg_64 = REG_SEQUENCE killed %[[LO]], %subreg.sub0, killed %[[HI]], %subreg.sub1 # GCN-NEXT: V_CMP_LT_U64_e64 killed %{{[0-9]+}}, %[[SGPR_PAIR]], implicit %exec # GCN-LABEL: {{^}}name: const_to_sgpr_multiple_use{{$}} # GCN: %[[HI:[0-9]+]]:sreg_32_xm0 = S_MOV_B32 0 # GCN-NEXT: %[[LO:[0-9]+]]:sreg_32_xm0 = S_MOV_B32 1048576 -# GCN-NEXT: %[[SGPR_PAIR:[0-9]+]]:sreg_64 = REG_SEQUENCE killed %[[LO]], 1, killed %[[HI]], 2 +# GCN-NEXT: %[[SGPR_PAIR:[0-9]+]]:sreg_64 = REG_SEQUENCE killed %[[LO]], %subreg.sub0, killed %[[HI]], %subreg.sub1 # GCN-NEXT: V_CMP_LT_U64_e64 killed %{{[0-9]+}}, %[[SGPR_PAIR]], implicit %exec # GCN-NEXT: V_CMP_LT_U64_e64 killed %{{[0-9]+}}, %[[SGPR_PAIR]], implicit %exec # GCN-LABEL: {{^}}name: const_to_sgpr_subreg{{$}} -# GCN: %[[OP0:[0-9]+]]:vreg_64 = REG_SEQUENCE killed %{{[0-9]+}}, 1, killed %{{[0-9]+}}, 2 +# GCN: %[[OP0:[0-9]+]]:vreg_64 = REG_SEQUENCE killed %{{[0-9]+}}, %subreg.sub0, killed %{{[0-9]+}}, %subreg.sub1 # GCN-NEXT: V_CMP_LT_U32_e64 killed %[[OP0]].sub0, 12, implicit %exec --- | @@ -109,7 +109,7 @@ body: | %8 = S_LOAD_DWORDX2_IMM %3, 11, 0 %6 = COPY %7 %9 = S_MOV_B32 0 - %10 = REG_SEQUENCE %2, 1, killed %9, 2 + %10 = REG_SEQUENCE %2, %subreg.sub0, killed %9, %subreg.sub1 %0 = COPY %10 %11 = COPY %10.sub0 %12 = COPY %10.sub1 @@ -117,10 +117,10 @@ body: | %14 = COPY %8.sub1 %15 = S_ADD_U32 killed %11, killed %13, implicit-def %scc %16 = S_ADDC_U32 killed %12, killed %14, implicit-def dead %scc, implicit %scc - %17 = REG_SEQUENCE killed %15, 1, killed %16, 2 + %17 = REG_SEQUENCE killed %15, %subreg.sub0, killed %16, %subreg.sub1 %18 = S_MOV_B32 0 %19 = S_MOV_B32 1048576 - %20 = REG_SEQUENCE killed %19, 1, killed %18, 2 + %20 = REG_SEQUENCE killed %19, %subreg.sub0, killed %18, %subreg.sub1 %22 = COPY killed %20 %21 = V_CMP_LT_U64_e64 killed %17, %22, implicit %exec %1 = SI_IF killed %21, %bb.2.bb2, implicit-def dead %exec, implicit-def dead %scc, implicit %exec @@ -133,7 +133,7 @@ body: | %24 = S_LSHL_B64 %0, killed %23, implicit-def dead %scc %25 = S_MOV_B32 61440 %26 = S_MOV_B32 0 - %27 = REG_SEQUENCE killed %26, 1, killed %25, 2 + %27 = REG_SEQUENCE killed %26, %subreg.sub0, killed %25, %subreg.sub1 %28 = REG_SEQUENCE %6, 17, killed %27, 18 %29 = V_MOV_B32_e32 0, implicit %exec %30 = COPY %24 @@ -208,7 +208,7 @@ body: | %9 = S_LOAD_DWORDX2_IMM %3, 13, 0 %6 = COPY %7 %10 = S_MOV_B32 0 - %11 = REG_SEQUENCE %2, 1, killed %10, 2 + %11 = REG_SEQUENCE %2, %subreg.sub0, killed %10, %subreg.sub1 %0 = COPY %11 %12 = COPY %11.sub0 %13 = COPY %11.sub1 @@ -216,15 +216,15 @@ body: | %15 = COPY %8.sub1 %16 = S_ADD_U32 %12, killed %14, implicit-def %scc %17 = S_ADDC_U32 %13, killed %15, implicit-def dead %scc, implicit %scc - %18 = REG_SEQUENCE killed %16, 1, killed %17, 2 + %18 = REG_SEQUENCE killed %16, %subreg.sub0, killed %17, %subreg.sub1 %19 = COPY %9.sub0 %20 = COPY %9.sub1 %21 = S_ADD_U32 %12, killed %19, implicit-def %scc %22 = S_ADDC_U32 %13, killed %20, implicit-def dead %scc, implicit %scc - %23 = REG_SEQUENCE killed %21, 1, killed %22, 2 + %23 = REG_SEQUENCE killed %21, %subreg.sub0, killed %22, %subreg.sub1 %24 = S_MOV_B32 0 %25 = S_MOV_B32 1048576 - %26 = REG_SEQUENCE killed %25, 1, killed %24, 2 + %26 = REG_SEQUENCE killed %25, %subreg.sub0, killed %24, %subreg.sub1 %28 = COPY %26 %27 = V_CMP_LT_U64_e64 killed %18, %28, implicit %exec %29 = V_CMP_LT_U64_e64 killed %23, %28, implicit %exec @@ -239,7 +239,7 @@ body: | %33 = S_LSHL_B64 %0, killed %32, implicit-def dead %scc %34 = S_MOV_B32 61440 %35 = S_MOV_B32 0 - %36 = REG_SEQUENCE killed %35, 1, killed %34, 2 + %36 = REG_SEQUENCE killed %35, %subreg.sub0, killed %34, %subreg.sub1 %37 = REG_SEQUENCE %6, 17, killed %36, 18 %38 = V_MOV_B32_e32 0, implicit %exec %39 = COPY %33 @@ -304,7 +304,7 @@ body: | %8 = S_LOAD_DWORDX2_IMM %3, 11, 0 %6 = COPY %7 %9 = S_MOV_B32 0 - %10 = REG_SEQUENCE %2, 1, killed %9, 2 + %10 = REG_SEQUENCE %2, %subreg.sub0, killed %9, %subreg.sub1 %0 = COPY %10 %11 = COPY %10.sub0 %12 = COPY %10.sub1 @@ -312,10 +312,10 @@ body: | %14 = COPY %8.sub1 %15 = S_ADD_U32 killed %11, killed %13, implicit-def %scc %16 = S_ADDC_U32 killed %12, killed %14, implicit-def dead %scc, implicit %scc - %17 = REG_SEQUENCE killed %15, 1, killed %16, 2 + %17 = REG_SEQUENCE killed %15, %subreg.sub0, killed %16, %subreg.sub1 %18 = S_MOV_B32 12 %19 = S_MOV_B32 1048576 - %20 = REG_SEQUENCE killed %19, 1, killed %18, 2 + %20 = REG_SEQUENCE killed %19, %subreg.sub0, killed %18, %subreg.sub1 %22 = COPY killed %20.sub1 %21 = V_CMP_LT_U32_e64 killed %17.sub0, %22, implicit %exec %1 = SI_IF killed %21, %bb.2.bb2, implicit-def dead %exec, implicit-def dead %scc, implicit %exec @@ -328,7 +328,7 @@ body: | %24 = S_LSHL_B64 %0, killed %23, implicit-def dead %scc %25 = S_MOV_B32 61440 %26 = S_MOV_B32 0 - %27 = REG_SEQUENCE killed %26, 1, killed %25, 2 + %27 = REG_SEQUENCE killed %26, %subreg.sub0, killed %25, %subreg.sub1 %28 = REG_SEQUENCE %6, 17, killed %27, 18 %29 = V_MOV_B32_e32 0, implicit %exec %30 = COPY %24 |