aboutsummaryrefslogtreecommitdiff
path: root/lib/Target/AArch64/AArch64SchedCyclone.td
diff options
context:
space:
mode:
Diffstat (limited to 'lib/Target/AArch64/AArch64SchedCyclone.td')
-rw-r--r--lib/Target/AArch64/AArch64SchedCyclone.td2
1 files changed, 2 insertions, 0 deletions
diff --git a/lib/Target/AArch64/AArch64SchedCyclone.td b/lib/Target/AArch64/AArch64SchedCyclone.td
index 9fd3ae6818e..7a474ba8ef9 100644
--- a/lib/Target/AArch64/AArch64SchedCyclone.td
+++ b/lib/Target/AArch64/AArch64SchedCyclone.td
@@ -18,6 +18,8 @@ def CycloneModel : SchedMachineModel {
let LoadLatency = 4; // Optimistic load latency.
let MispredictPenalty = 16; // 14-19 cycles are typical.
let CompleteModel = 1;
+
+ list<Predicate> UnsupportedFeatures = [HasSVE];
}
//===----------------------------------------------------------------------===//