[X86] Fix XSAVE64 and similar instructions to not be allowed by the assembler in 32-bit mode.

There was a top level "let Predicates =" in the .td file that was overriding the Requires on each instruction.

I've added an assert to the code emitter to catch more cases like this. I'm sure this isn't the only place where the right predicates aren't being applied. This assert already found that we don't block btq/btsq/btrq in 32-bit mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320830 91177308-0d34-0410-b5e6-96231b3b80d8

4 files changed, 34 insertions, 43 deletions

diff --git a/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp b/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
index 272c6f23014..a7059c6914d 100644
--- a/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
+++ b/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
@@ -1130,6 +1130,8 @@ bool X86MCCodeEmitter::emitOpcodePrefix(uint64_t TSFlags, unsigned &CurByte,
       EmitByte(0x40 | REX, CurByte, OS);
       Ret = true;
     }
+  } else {
+    assert(!(TSFlags & X86II::REX_W) && "REX.W requires 64bit mode.");
   }
 
   // 0x0F escape code must be emitted just before the opcode.
diff --git a/lib/Target/X86/X86InstrFPStack.td b/lib/Target/X86/X86InstrFPStack.td
index 51cfa5c7839..7e89a4111d8 100644
--- a/lib/Target/X86/X86InstrFPStack.td
+++ b/lib/Target/X86/X86InstrFPStack.td
@@ -697,19 +697,18 @@ def FSCALE : I<0xD9, MRM_FD, (outs), (ins), "fscale", [], IIC_FSCALE>;
 def FCOMPP : I<0xDE, MRM_D9, (outs), (ins), "fcompp", [], IIC_FCOMPP>;
 } // Defs = [FPSW]
 
-let Predicates = [HasFXSR] in {
-  def FXSAVE : I<0xAE, MRM0m, (outs), (ins opaque512mem:$dst),
-               "fxsave\t$dst", [(int_x86_fxsave addr:$dst)], IIC_FXSAVE>, TB;
-  def FXSAVE64 : RI<0xAE, MRM0m, (outs), (ins opaque512mem:$dst),
-                 "fxsave64\t$dst", [(int_x86_fxsave64 addr:$dst)],
-                 IIC_FXSAVE>, TB, Requires<[In64BitMode]>;
-  def FXRSTOR : I<0xAE, MRM1m, (outs), (ins opaque512mem:$src),
-                "fxrstor\t$src", [(int_x86_fxrstor addr:$src)], IIC_FXRSTOR>, 
-                TB;
-  def FXRSTOR64 : RI<0xAE, MRM1m, (outs), (ins opaque512mem:$src),
-                  "fxrstor64\t$src", [(int_x86_fxrstor64 addr:$src)],
-                  IIC_FXRSTOR>, TB, Requires<[In64BitMode]>;
-} // Predicates = [FeatureFXSR]
+def FXSAVE : I<0xAE, MRM0m, (outs), (ins opaque512mem:$dst),
+             "fxsave\t$dst", [(int_x86_fxsave addr:$dst)], IIC_FXSAVE>, TB,
+             Requires<[HasFXSR]>;
+def FXSAVE64 : RI<0xAE, MRM0m, (outs), (ins opaque512mem:$dst),
+               "fxsave64\t$dst", [(int_x86_fxsave64 addr:$dst)],
+               IIC_FXSAVE>, TB, Requires<[HasFXSR, In64BitMode]>;
+def FXRSTOR : I<0xAE, MRM1m, (outs), (ins opaque512mem:$src),
+              "fxrstor\t$src", [(int_x86_fxrstor addr:$src)], IIC_FXRSTOR>,
+              TB, Requires<[HasFXSR]>;
+def FXRSTOR64 : RI<0xAE, MRM1m, (outs), (ins opaque512mem:$src),
+                "fxrstor64\t$src", [(int_x86_fxrstor64 addr:$src)],
+                IIC_FXRSTOR>, TB, Requires<[HasFXSR, In64BitMode]>;
 } // SchedRW
 
 //===----------------------------------------------------------------------===//
diff --git a/lib/Target/X86/X86InstrSystem.td b/lib/Target/X86/X86InstrSystem.td
index cf6b36fe1c2..44d8444d97c 100644
--- a/lib/Target/X86/X86InstrSystem.td
+++ b/lib/Target/X86/X86InstrSystem.td
@@ -555,49 +555,47 @@ let Uses = [EDX, EAX, ECX] in
 } // HasXSAVE
 
 let Uses = [EDX, EAX] in {
-let Predicates = [HasXSAVE] in {
-  def XSAVE : I<0xAE, MRM4m, (outs), (ins opaque512mem:$dst),
-                "xsave\t$dst",
-                [(int_x86_xsave addr:$dst, EDX, EAX)]>, PS;
-  def XSAVE64 : RI<0xAE, MRM4m, (outs), (ins opaque512mem:$dst),
-                   "xsave64\t$dst",
-                   [(int_x86_xsave64 addr:$dst, EDX, EAX)]>, PS, Requires<[In64BitMode]>;
-  def XRSTOR : I<0xAE, MRM5m, (outs), (ins opaque512mem:$dst),
-                 "xrstor\t$dst",
-                 [(int_x86_xrstor addr:$dst, EDX, EAX)]>, PS;
-  def XRSTOR64 : RI<0xAE, MRM5m, (outs), (ins opaque512mem:$dst),
-                    "xrstor64\t$dst",
-                    [(int_x86_xrstor64 addr:$dst, EDX, EAX)]>, PS, Requires<[In64BitMode]>;
-}
+def XSAVE : I<0xAE, MRM4m, (outs), (ins opaque512mem:$dst),
+              "xsave\t$dst",
+              [(int_x86_xsave addr:$dst, EDX, EAX)]>, PS, Requires<[HasXSAVE]>;
+def XSAVE64 : RI<0xAE, MRM4m, (outs), (ins opaque512mem:$dst),
+                 "xsave64\t$dst",
+                 [(int_x86_xsave64 addr:$dst, EDX, EAX)]>, PS, Requires<[HasXSAVE, In64BitMode]>;
+def XRSTOR : I<0xAE, MRM5m, (outs), (ins opaque512mem:$dst),
+               "xrstor\t$dst",
+               [(int_x86_xrstor addr:$dst, EDX, EAX)]>, PS, Requires<[HasXSAVE]>;
+def XRSTOR64 : RI<0xAE, MRM5m, (outs), (ins opaque512mem:$dst),
+                  "xrstor64\t$dst",
+                  [(int_x86_xrstor64 addr:$dst, EDX, EAX)]>, PS, Requires<[HasXSAVE, In64BitMode]>;
 let Predicates = [HasXSAVEOPT] in {
   def XSAVEOPT : I<0xAE, MRM6m, (outs), (ins opaque512mem:$dst),
                    "xsaveopt\t$dst",
-                   [(int_x86_xsaveopt addr:$dst, EDX, EAX)]>, PS;
+                   [(int_x86_xsaveopt addr:$dst, EDX, EAX)]>, PS, Requires<[HasXSAVEOPT]>;
   def XSAVEOPT64 : RI<0xAE, MRM6m, (outs), (ins opaque512mem:$dst),
                       "xsaveopt64\t$dst",
-                      [(int_x86_xsaveopt64 addr:$dst, EDX, EAX)]>, PS, Requires<[In64BitMode]>;
+                      [(int_x86_xsaveopt64 addr:$dst, EDX, EAX)]>, PS, Requires<[HasXSAVEOPT, In64BitMode]>;
 }
 let Predicates = [HasXSAVEC] in {
   def XSAVEC : I<0xC7, MRM4m, (outs), (ins opaque512mem:$dst),
                  "xsavec\t$dst",
-                 [(int_x86_xsavec addr:$dst, EDX, EAX)]>, TB;
+                 [(int_x86_xsavec addr:$dst, EDX, EAX)]>, TB, Requires<[HasXSAVEC]>;
   def XSAVEC64 : RI<0xC7, MRM4m, (outs), (ins opaque512mem:$dst),
                    "xsavec64\t$dst",
-                   [(int_x86_xsavec64 addr:$dst, EDX, EAX)]>, TB, Requires<[In64BitMode]>;
+                   [(int_x86_xsavec64 addr:$dst, EDX, EAX)]>, TB, Requires<[HasXSAVEC, In64BitMode]>;
 }
 let Predicates = [HasXSAVES] in {
   def XSAVES : I<0xC7, MRM5m, (outs), (ins opaque512mem:$dst),
                  "xsaves\t$dst",
-                 [(int_x86_xsaves addr:$dst, EDX, EAX)]>, TB;
+                 [(int_x86_xsaves addr:$dst, EDX, EAX)]>, TB, Requires<[HasXSAVES]>;
   def XSAVES64 : RI<0xC7, MRM5m, (outs), (ins opaque512mem:$dst),
                     "xsaves64\t$dst",
-                    [(int_x86_xsaves64 addr:$dst, EDX, EAX)]>, TB, Requires<[In64BitMode]>;
+                    [(int_x86_xsaves64 addr:$dst, EDX, EAX)]>, TB, Requires<[HasXSAVE, In64BitMode]>;
   def XRSTORS : I<0xC7, MRM3m, (outs), (ins opaque512mem:$dst),
                   "xrstors\t$dst",
-                  [(int_x86_xrstors addr:$dst, EDX, EAX)]>, TB;
+                  [(int_x86_xrstors addr:$dst, EDX, EAX)]>, TB, Requires<[HasXSAVES]>;
   def XRSTORS64 : RI<0xC7, MRM3m, (outs), (ins opaque512mem:$dst),
                      "xrstors64\t$dst",
-                     [(int_x86_xrstors64 addr:$dst, EDX, EAX)]>, TB, Requires<[In64BitMode]>;
+                     [(int_x86_xrstors64 addr:$dst, EDX, EAX)]>, TB, Requires<[HasXSAVES, In64BitMode]>;
 }
 } // Uses
 } // SchedRW
diff --git a/test/MC/X86/x86-32-coverage.s b/test/MC/X86/x86-32-coverage.s
index f15ece17049..03be55fa4be 100644
--- a/test/MC/X86/x86-32-coverage.s
+++ b/test/MC/X86/x86-32-coverage.s
@@ -10601,35 +10601,27 @@ blendvps %xmm0, (%eax), %xmm1
 // CHECK: btl $4, (%eax)
 // CHECK: btw $4, (%eax)
 // CHECK: btl $4, (%eax)
-// CHECK: btq $4, (%eax)
 // CHECK: btsl $4, (%eax)
 // CHECK: btsw $4, (%eax)
 // CHECK: btsl $4, (%eax)
-// CHECK: btsq $4, (%eax)
 // CHECK: btrl $4, (%eax)
 // CHECK: btrw $4, (%eax)
 // CHECK: btrl $4, (%eax)
-// CHECK: btrq $4, (%eax)
 // CHECK: btcl $4, (%eax)
 // CHECK: btcw $4, (%eax)
 // CHECK: btcl $4, (%eax)
-// CHECK: btcq $4, (%eax)
 bt $4, (%eax)
 btw $4, (%eax)
 btl $4, (%eax)
-btq $4, (%eax)
 bts $4, (%eax)
 btsw $4, (%eax)
 btsl $4, (%eax)
-btsq $4, (%eax)
 btr $4, (%eax)
 btrw $4, (%eax)
 btrl $4, (%eax)
-btrq $4, (%eax)
 btc $4, (%eax)
 btcw $4, (%eax)
 btcl $4, (%eax)
-btcq $4, (%eax)
 
 // CHECK: clflushopt	3735928559(%ebx,%ecx,8)
 // CHECK:  encoding: [0x66,0x0f,0xae,0xbc,0xcb,0xef,0xbe,0xad,0xde]