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path: root/tools/verify_assembler_traces.py
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2022-08-03Spelling (#41)Josh Soref
This PR corrects misspellings identified by the check-spelling action. The misspellings have been reported at jsoref@72c5ec8#commitcomment-78705631 * spelling: achieved * spelling: activated * spelling: address * spelling: anonymous * spelling: architecture * spelling: are_consecutive * spelling: assemble * spelling: becoming * spelling: been * spelling: clobbered * spelling: coercion * spelling: condition * spelling: convenience * spelling: correctly * spelling: correspondence * spelling: corresponding * spelling: depend * spelling: dictionary * spelling: emitted * spelling: everything * spelling: excluding * spelling: explicitly * spelling: implementation * spelling: implicitly * spelling: included * spelling: indices * spelling: instruction * spelling: instructions * spelling: labels * spelling: locations * spelling: maximum * spelling: mechanisms * spelling: modifiers * spelling: multiple * spelling: omitted * spelling: one * spelling: overridden * spelling: overwrite * spelling: performed * spelling: predicate * spelling: registers * spelling: reproducible * spelling: separate * spelling: shift * spelling: substitution * spelling: temporary * spelling: test_sve * spelling: the * spelling: threshold * spelling: unconditional * spelling: usually * spelling: variables Signed-off-by: Josh Soref <2119212+jsoref@users.noreply.github.com>
2017-05-16[test] Add preliminary FP tests for OP.<dt> <Dd>, <Dn>, <Dm>Pierre Langlois
Add floating point tests for instructions taking three D registers as operands. We have assembler tests for the following instrutions with F32 and F64: - VABD - VADD - VCEQ - VCGE - VCGT - VCLE - VCLT - VMAX - VMIN - VPADD - VPMAX - VPMIN - VSUB And simulation (as in execution on hardware) for the following instructions, only with F64 as a datatype. - VADD - VSUB Change-Id: I784ee821bd551a9ceb8b3fa3e66cc40fd0e12869
2016-09-29Use assembler directly in generated assembler testsPierre Langlois
A recent patch taught the MacroAssembler to optimize some instructions before calling to the asssembler. These optimizations do not rely on delegates. However, this introduced failures in our assembler tests since we were relying on the MacroAssembler calling the Assembler directly, for convevience in the test generator. For example, the MacroAssembler does not generate any instructions when one calls "Add(reg, reg, 0)" for example. But of course, the Assembler should still generate an instruction and it should be tested that it does. This means we cannot get away with using the MacroAssembler in generated tests anymore. This patch changes the test generator to have assembler tests call assembler methods instead of macro-assembler methods. We still use a MacroAssembler object, but generate the instruction under test using a AssemblerAccurateScope. One major change in this patch is how we handle generating IT instructions. Of course, we could previously rely on the MacroAssembler to generate them, we now need to do it ourselves. Finally, this patch also adds an assertion in generated assembler test that actually fails the test! It seems I forgot to add it before and we didn't see the regressions, sorry about that. Change-Id: Ia904a8a11613cf33abe197858c8a8ce66e4e7add
2016-07-04Update naming to `aarch32` and `aarch64`.Alexandre Rames
Change-Id: I40a929b1095ee3e1b2ca5ef879c7006d8b59acc9
2016-07-04Add an `AUTHORS` file and update copyright notices.Alexandre Rames
Change-Id: Ifb505e5664996c1af41e38376e58ba49864213a3
2016-06-03Add assembler, macro-assembler and disassembler support for AArch32Pierre Langlois
Add support for the A32 and T32 instruction set architectures in seperate a32 directories. Note that this commit introduces aarch32 and aarch64 namespaces so existing client code will need to be adjusted. Refer to doc/getting-started-a32.md for an introduction. Change-Id: Iaf3e5f496ec4e19d77d304128e6920daa4549e78