| Age | Commit message (Expand) | Author |
|---|---|---|
| 2017-02-20 | [tests] Allow generating one description to support two ISA | Pierre Langlois |
| 2017-01-10 | Allow conditional inclusion of A32, T32 and A64. | Rodolph Perfetta |
| 2016-11-30 | AArch32: Use the shared code generation scope `ExactAssemblyScope`. | Alexandre Rames |
| 2016-11-07 | Isolate each generated tests into anonymous namespaces | Pierre Langlois |
| 2016-10-24 | Create a base class for assemblers. | Alexandre Rames |
| 2016-09-29 | Remove implicit 64 to 32 bit narrowing | Pierre Langlois |
| 2016-09-29 | Use assembler directly in generated assembler tests | Pierre Langlois |
| 2016-08-11 | [test] Make generated tests satisfy VIXL's clang-format | Pierre Langlois |
| 2016-08-03 | AArch32: Improve the API for selecting the ISA. | Jacob Bramley |
| 2016-07-04 | Update naming to `aarch32` and `aarch64`. | Alexandre Rames |
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index : vixl.git | |
| mirror of https://github.com/Linaro/vixl |
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