3 files changed, 30 insertions, 3 deletions
diff --git a/test/aarch64/test-assembler-aarch64.cc b/test/aarch64/test-assembler-aarch64.cc
index 9ccf7920..7bd54517 100644
--- a/test/aarch64/test-assembler-aarch64.cc
+++ b/test/aarch64/test-assembler-aarch64.cc
@@ -21791,14 +21791,36 @@ TEST(system_dc) {
   START();
   __ Mov(x20, msg_addr);
   __ Dc(CVAC, x20);
-  __ Mov(x21, x20);
+  __ Mov(x21, msg_addr);
   __ Dc(CVAU, x21);
-  __ Mov(x22, x21);
+  __ Mov(x22, msg_addr);
   __ Dc(CIVAC, x22);
   // TODO: Add tests to check ZVA.
   END();
 
   RUN();
+  ASSERT_EQUAL_64(msg_addr, x20);
+  ASSERT_EQUAL_64(msg_addr, x21);
+  ASSERT_EQUAL_64(msg_addr, x22);
+
+  TEARDOWN();
+}
+
+
+TEST(system_dcpop) {
+  SETUP_WITH_FEATURES(CPUFeatures::kDCPoP);
+  const char* msg = "DCPoP test!";
+  uintptr_t msg_addr = reinterpret_cast<uintptr_t>(msg);
+
+  START();
+  __ Mov(x20, msg_addr);
+  __ Dc(CVAP, x20);
+  END();
+
+#ifdef VIXL_INCLUDE_SIMULATOR_AARCH64
+  RUN();
+  ASSERT_EQUAL_64(msg_addr, x20);
+#endif
 
   TEARDOWN();
 }
diff --git a/test/aarch64/test-cpu-features-aarch64.cc b/test/aarch64/test-cpu-features-aarch64.cc
index a4c35cda..8152f550 100644
--- a/test/aarch64/test-cpu-features-aarch64.cc
+++ b/test/aarch64/test-cpu-features-aarch64.cc
@@ -2774,6 +2774,10 @@ TEST_CRC32(crc32ch_0, crc32ch(w0, w1, w2))
 TEST_CRC32(crc32cw_0, crc32cw(w0, w1, w2))
 TEST_CRC32(crc32cx_0, crc32cx(w0, w1, x2))
 
+#define TEST_DCPOP(NAME, ASM) \
+  TEST_TEMPLATE(CPUFeatures(CPUFeatures::kDCPoP), DCPoP_##NAME, ASM)
+TEST_DCPOP(dc_0, dc(CVAP, x0))
+
 #define TEST_PAUTH(NAME, ASM) \
   TEST_TEMPLATE(CPUFeatures(CPUFeatures::kPAuth), PAuth_##NAME, ASM)
 TEST_PAUTH(autda_0, autda(x0, x1))
diff --git a/test/aarch64/test-disasm-aarch64.cc b/test/aarch64/test-disasm-aarch64.cc
index c42d07a0..38a3609b 100644
--- a/test/aarch64/test-disasm-aarch64.cc
+++ b/test/aarch64/test-disasm-aarch64.cc
@@ -3197,7 +3197,8 @@ TEST(system_dc) {
 
   COMPARE(dc(CVAC, x2), "dc cvac, x2");
   COMPARE(dc(CVAU, x3), "dc cvau, x3");
-  COMPARE(dc(CIVAC, x4), "dc civac, x4");
+  COMPARE(dc(CVAP, x4), "dc cvap, x4");
+  COMPARE(dc(CIVAC, x5), "dc civac, x5");
   COMPARE(dc(ZVA, x0), "dc zva, x0");
   COMPARE(dc(ZVA, xzr), "dc zva, xzr");