diff options
author | Greg Bellows <greg.bellows@linaro.org> | 2014-09-12 15:29:45 -0500 |
---|---|---|
committer | Greg Bellows <greg.bellows@linaro.org> | 2014-09-12 15:29:45 -0500 |
commit | 5db4ba09d5d6df5eb52f0f6dda5ae04a12a12a85 (patch) | |
tree | 92cefd4042c57b3f18bc35acfadc68d7b7b2a6b0 | |
parent | ef3d487d011616f5f5a355364fd2538575e2c74f (diff) |
Cleanup secure code name space
Removed the tztest moniker form the secure side code to better delineate the
secure code infrastructure from the actual test code.
Signed-off-by: Greg Bellows <greg.bellows@linaro.org>
-rw-r--r-- | arm/Makefile.tztest | 2 | ||||
-rw-r--r-- | arm/monitor.c | 8 | ||||
-rw-r--r-- | arm/monitor_asm.S | 2 | ||||
-rw-r--r-- | arm/secure_init.S | 14 | ||||
-rw-r--r-- | arm/secure_svc.c (renamed from arm/tztest_secure_svc.c) | 24 |
5 files changed, 25 insertions, 25 deletions
diff --git a/arm/Makefile.tztest b/arm/Makefile.tztest index 3df49b1..c3bb363 100644 --- a/arm/Makefile.tztest +++ b/arm/Makefile.tztest @@ -7,7 +7,7 @@ TZBOOT = $(ARCH)/tzboot.o TZSECLOAD = $(ARCH)/tztest_secure.lds TZNSECLOAD = $(ARCH)/tztest_nonsecure.lds TZSECOBJS = $(ARCH)/secure_init.o \ - $(ARCH)/tztest_secure_svc.o \ + $(ARCH)/secure_svc.o \ $(ARCH)/secure_asm.o \ $(ARCH)/monitor.o \ $(ARCH)/monitor_asm.o \ diff --git a/arm/monitor.c b/arm/monitor.c index 90b44b4..a188c0d 100644 --- a/arm/monitor.c +++ b/arm/monitor.c @@ -14,3 +14,11 @@ void monitor_init_ns_entry(uint32_t entry_point) nsec_ctx->mon_spsr = CPSR_MODE_SVC | CPSR_I; } + +void monitor_dispatch(tztest_smc_desc_t *desc) +{ + uint32_t (*func)(uint32_t) = desc->dispatch.func; + DEBUG_MSG("Entered\n"); + desc->dispatch.ret = func(desc->dispatch.arg); + DEBUG_MSG("Exiting\n"); +} diff --git a/arm/monitor_asm.S b/arm/monitor_asm.S index f6824af..ed17fc9 100644 --- a/arm/monitor_asm.S +++ b/arm/monitor_asm.S @@ -21,7 +21,7 @@ monitor_smc_vect: beq 1f push {r0-r3} mov r0, r1 - bl tztest_dispatch_monitor + bl monitor_dispatch pop {r0-r3} 1: rfefd sp! diff --git a/arm/secure_init.S b/arm/secure_init.S index 10a480d..9ad4846 100644 --- a/arm/secure_init.S +++ b/arm/secure_init.S @@ -16,7 +16,7 @@ secure_vectors: secure_undef_vec: srsdb sp!, #CPSR_MODE_UND push {r10} - ldr r10, =sec_undef_handler + ldr r10, =secure_undef_handler blx r10 pop {r10} rfefd sp! @@ -24,13 +24,13 @@ secure_undef_vec: secure_pabort_vec: mrc p15, 0, r0, c5, c0, 1 /* IFSR */ mrc p15, 0, r1, c6, c0, 2 /* IFAR */ - bl sec_pabort_handler + bl secure_pabort_handler b end secure_dabort_vec: mrc p15, 0, r0, c5, c0, 0 /* DFSR */ mrc p15, 0, r1, c6, c0, 0 /* DFAR */ - bl sec_dabort_handler + bl secure_dabort_handler b end secure_svc_vec: @@ -49,7 +49,7 @@ secure_svc_vec: 1: srsdb sp!, #CPSR_MODE_SVC push {r10} - ldr r10, =sec_svc_handler + ldr r10, =secure_svc_handler blx r10 pop {r10} rfefd sp! @@ -106,7 +106,7 @@ secure_mmu_init: mcr p15, 0, r10, c3, c0, 0 /* Set-up the initial secure page tables */ - bl tztest_secure_pagetable_init + bl secure_pagetable_init /* Set TTBR0 to the initialized address plus enable shareable write-back * write-allocate. @@ -139,7 +139,7 @@ secure_remap_vecs: /* Check that are entry state makes sense before initializing the monitor * mode. */ - bl check_init_mode + bl secure_check_init #endif secure_init_monitor: @@ -159,7 +159,7 @@ secure_init_monitor: * secure-side monitor loop. The only way out is to issue an EXIT SMC call * to the secure world. */ - bl tztest_secure_svc_loop + bl secure_svc_loop /* If we get here we are on the way out, poweroff the device */ end: diff --git a/arm/tztest_secure_svc.c b/arm/secure_svc.c index 2d7eddd..d34f180 100644 --- a/arm/tztest_secure_svc.c +++ b/arm/secure_svc.c @@ -7,7 +7,7 @@ extern int _ram_nsec_base; int secure_dispatch_usr(int, int); -void tztest_secure_svc_loop(int initial_r0, int initial_r1); +void secure_svc_loop(int initial_r0, int initial_r1); void *sec_allocate_secure_memory(int); extern uint32_t _sec_l1_page_table; uint32_t *sec_l1_page_table = &_sec_l1_page_table; @@ -50,7 +50,7 @@ pagetable_map_entry_t sysreg_pagetable_entries[] = { NONSECURE }, }; -void sec_svc_handler(volatile uint32_t op, volatile tztest_svc_desc_t *desc) +void secure_svc_handler(volatile uint32_t op, volatile tztest_svc_desc_t *desc) { DEBUG_MSG("Entered\n"); switch (op) { @@ -70,20 +70,20 @@ void sec_svc_handler(volatile uint32_t op, volatile tztest_svc_desc_t *desc) return; } -void sec_undef_handler() { +void secure_undef_handler() { DEBUG_MSG("Undefined exception taken\n"); *tztest_exception = CPSR_MODE_UND; *tztest_exception_status = 0; } -void sec_pabort_handler(int status, int addr) { +void secure_pabort_handler(int status, int addr) { DEBUG_MSG("status = 0x%x\taddress = 0x%x\n", status, addr); *tztest_exception = CPSR_MODE_ABT; *tztest_exception_addr = addr; *tztest_exception_status = status & 0x1f; } -void sec_dabort_handler(int status, int addr) { +void secure_dabort_handler(int status, int addr) { DEBUG_MSG("Data Abort: %s\n", FAULT_STR(status & 0x1f)); DEBUG_MSG("status = 0x%x\taddress = 0x%x\n", status & 0x1f, addr); @@ -92,7 +92,7 @@ void sec_dabort_handler(int status, int addr) { *tztest_exception_status = status & 0x1f; } -void check_init_mode() +void secure_check_init() { printf("\nValidating startup state:\n"); @@ -134,7 +134,7 @@ void check_init_mode() } } -void tztest_secure_svc_loop(int initial_op, int initial_data) +void secure_svc_loop(int initial_op, int initial_data) { volatile int op = initial_op; tztest_smc_desc_t *data = (tztest_smc_desc_t *)initial_data; @@ -166,7 +166,7 @@ void tztest_secure_svc_loop(int initial_op, int initial_data) DEBUG_MSG("Exiting\n"); } -void tztest_secure_pagetable_init() +void secure_pagetable_init() { pagetable_map_entry_t sec_pagetable_entries[] = { {.va = (uint32_t)0xFFFF0000, .pa = (uint32_t)ram_secvecs_start, @@ -194,11 +194,3 @@ void tztest_secure_pagetable_init() pagetable_init_common(sec_l1_page_table); } - -void tztest_dispatch_monitor(tztest_smc_desc_t *desc) -{ - uint32_t (*func)(uint32_t) = desc->dispatch.func; - DEBUG_MSG("Entered\n"); - desc->dispatch.ret = func(desc->dispatch.arg); - DEBUG_MSG("Exiting\n"); -} |