binutils-gdb.git -

Age	Commit message (Expand)	Author
2023-07-24	Updated Serbian translations for bfd, gold and opcodes	Nick Clifton
2023-07-19	Updated Romanian translation for the opcodes directory	Nick Clifton
2023-07-19	Fix loongarch build with gcc-4.5	Alan Modra
2023-07-04	Updated Ukranian, Romanian and German translations for various sub-directories	Nick Clifton
2023-07-03	Change version number to 2.40.90 and regenerate files	Nick Clifton
2023-07-03	Add markers for the 2.41 branch	Nick Clifton
2023-07-03	opcodes/loongarch: Mark address offset operands of LVZ/LBT insns as such	WANG Xuerui
2023-07-01	RISC-V: Add support for the Zvksh ISA extension	Christoph Müllner
2023-07-01	RISC-V: Add support for the Zvksed ISA extension	Christoph Müllner
2023-07-01	RISC-V: Add support for the Zvknh[a,b] ISA extensions	Christoph Müllner
2023-07-01	RISC-V: Add support for the Zvkned ISA extension	Christoph Müllner
2023-07-01	RISC-V: Add support for the Zvkg ISA extension	Christoph Müllner
2023-07-01	RISC-V: Add support for the Zvbc extension	Nathan Huckleberry
2023-07-01	RISC-V: Add support for the Zvbb ISA extension	Christoph Müllner
2023-06-30	RISC-V: Add support for the Zfa extension	Christoph Müllner
2023-06-30	LoongArch: gas: Fix code style issues	mengqinggang
2023-06-30	LoongArch: gas: Add LVZ and LBT instructions support	mengqinggang
2023-06-30	LoongArch: Deprecate $v[01], $fv[01] and $x names per spec	WANG Xuerui
2023-06-30	opcodes/loongarch: print unrecognized insn words with the .word directive	WANG Xuerui
2023-06-30	opcodes/loongarch: do not print hex notation for signed immediates	WANG Xuerui
2023-06-30	opcodes/loongarch: style disassembled address offsets as such	WANG Xuerui
2023-06-30	opcodes/loongarch: implement style support in the disassembler	WANG Xuerui
2023-06-30	opcodes/loongarch: remove unused code	WANG Xuerui
2023-06-30	LoongArch: support disassembling certain pseudo-instructions	WANG Xuerui
2023-06-28	aarch64: Remove version dependencies from features	Andrew Carlotti
2023-06-28	LoongArch: gas: Add lsx and lasx instructions support	mengqinggang
2023-06-27	RISC-V: Support Zicond extension	Philipp Tomsich
2023-06-25	LoongArch: Support referring to FCSRs as $fcsrX	Feiyang Chen
2023-06-21	x86: fix expansion of %XV	Jan Beulich
2023-06-16	x86: shrink Masking insn attribute to a single bit (boolean)	Jan Beulich
2023-06-15	Add additional missing Allegrex CPU instructions	David Guillen Fandos
2023-06-15	Add rotation instructions to MIPS Allegrex CPU	David Guillen Fandos
2023-06-15	Add MIPS Allegrex CPU as a MIPS2-based CPU	David Guillen Fandos
2023-06-15	Revert "MIPS: add MT ASE support for micromips32"	Maciej W. Rozycki
2023-06-15	Revert "MIPS: sync oprand char usage between mips and micromips"	Maciej W. Rozycki
2023-06-05	MIPS: sync oprand char usage between mips and micromips	YunQiang Su
2023-06-05	MIPS: add MT ASE support for micromips32	YunQiang Su
2023-06-05	Revert "MIPS: add MT ASE support for micromips32"	YunQiang Su
2023-06-05	MIPS: add MT ASE support for micromips32	YunQiang Su
2023-06-01	RISC-V: PR30449, Add lga assembler macro support.	Jim Wilson
2023-05-30	LoongArch: opcodes: Add support for linker relaxation.	mengqinggang
2023-05-26	x86: fix disassembler build after 1a3b4f90bc5f	Jan Beulich
2023-05-26	x86: convert two pointers to (indexing) integers	Jan Beulich
2023-05-26	x86: disassembling over-long insns	Jan Beulich
2023-05-26	x86: use fixed-width type for codep and friends	Jan Beulich
2023-05-23	Updated Swedish translation for the opcodes directory	Nick Clifton
2023-05-23	Support Intel FRED LKGS	Zhang, Jun
2023-05-23	Revert "Support Intel FRED LKGS"	liuhongt
2023-05-23	Support Intel FRED LKGS	Zhang, Jun
2023-05-19	RISC-V: Minor improvements for dis-assembler.	Nelson Chu