Jia Liu | e67db06 | 2012-07-20 15:50:39 +0800 | [diff] [blame] | 1 | /* |
| 2 | * QEMU OpenRISC CPU |
| 3 | * |
| 4 | * Copyright (c) 2012 Jia Liu <proljc@gmail.com> |
| 5 | * |
| 6 | * This library is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU Lesser General Public |
| 8 | * License as published by the Free Software Foundation; either |
| 9 | * version 2 of the License, or (at your option) any later version. |
| 10 | * |
| 11 | * This library is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 14 | * Lesser General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU Lesser General Public |
| 17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
| 18 | */ |
| 19 | |
| 20 | #include "cpu.h" |
| 21 | #include "qemu-common.h" |
| 22 | |
Andreas Färber | f45748f | 2013-06-21 19:09:18 +0200 | [diff] [blame] | 23 | static void openrisc_cpu_set_pc(CPUState *cs, vaddr value) |
| 24 | { |
| 25 | OpenRISCCPU *cpu = OPENRISC_CPU(cs); |
| 26 | |
| 27 | cpu->env.pc = value; |
| 28 | } |
| 29 | |
Jia Liu | e67db06 | 2012-07-20 15:50:39 +0800 | [diff] [blame] | 30 | /* CPUClass::reset() */ |
| 31 | static void openrisc_cpu_reset(CPUState *s) |
| 32 | { |
| 33 | OpenRISCCPU *cpu = OPENRISC_CPU(s); |
| 34 | OpenRISCCPUClass *occ = OPENRISC_CPU_GET_CLASS(cpu); |
| 35 | |
Jia Liu | e67db06 | 2012-07-20 15:50:39 +0800 | [diff] [blame] | 36 | occ->parent_reset(s); |
| 37 | |
| 38 | memset(&cpu->env, 0, offsetof(CPUOpenRISCState, breakpoints)); |
| 39 | |
| 40 | tlb_flush(&cpu->env, 1); |
| 41 | /*tb_flush(&cpu->env); FIXME: Do we need it? */ |
| 42 | |
| 43 | cpu->env.pc = 0x100; |
| 44 | cpu->env.sr = SR_FO | SR_SM; |
| 45 | cpu->env.exception_index = -1; |
| 46 | |
| 47 | cpu->env.upr = UPR_UP | UPR_DMP | UPR_IMP | UPR_PICP | UPR_TTP; |
| 48 | cpu->env.cpucfgr = CPUCFGR_OB32S | CPUCFGR_OF32S; |
| 49 | cpu->env.dmmucfgr = (DMMUCFGR_NTW & (0 << 2)) | (DMMUCFGR_NTS & (6 << 2)); |
| 50 | cpu->env.immucfgr = (IMMUCFGR_NTW & (0 << 2)) | (IMMUCFGR_NTS & (6 << 2)); |
| 51 | |
| 52 | #ifndef CONFIG_USER_ONLY |
| 53 | cpu->env.picmr = 0x00000000; |
| 54 | cpu->env.picsr = 0x00000000; |
| 55 | |
| 56 | cpu->env.ttmr = 0x00000000; |
| 57 | cpu->env.ttcr = 0x00000000; |
| 58 | #endif |
| 59 | } |
| 60 | |
| 61 | static inline void set_feature(OpenRISCCPU *cpu, int feature) |
| 62 | { |
| 63 | cpu->feature |= feature; |
| 64 | cpu->env.cpucfgr = cpu->feature; |
| 65 | } |
| 66 | |
Andreas Färber | c296262 | 2013-01-05 14:11:07 +0100 | [diff] [blame] | 67 | static void openrisc_cpu_realizefn(DeviceState *dev, Error **errp) |
Jia Liu | e67db06 | 2012-07-20 15:50:39 +0800 | [diff] [blame] | 68 | { |
Andreas Färber | 14a10fc | 2013-07-27 02:53:25 +0200 | [diff] [blame] | 69 | CPUState *cs = CPU(dev); |
Andreas Färber | c296262 | 2013-01-05 14:11:07 +0100 | [diff] [blame] | 70 | OpenRISCCPUClass *occ = OPENRISC_CPU_GET_CLASS(dev); |
Jia Liu | e67db06 | 2012-07-20 15:50:39 +0800 | [diff] [blame] | 71 | |
Andreas Färber | 14a10fc | 2013-07-27 02:53:25 +0200 | [diff] [blame] | 72 | qemu_init_vcpu(cs); |
| 73 | cpu_reset(cs); |
Andreas Färber | c296262 | 2013-01-05 14:11:07 +0100 | [diff] [blame] | 74 | |
| 75 | occ->parent_realize(dev, errp); |
Jia Liu | e67db06 | 2012-07-20 15:50:39 +0800 | [diff] [blame] | 76 | } |
| 77 | |
| 78 | static void openrisc_cpu_initfn(Object *obj) |
| 79 | { |
Andreas Färber | c05efcb | 2013-01-17 12:13:41 +0100 | [diff] [blame] | 80 | CPUState *cs = CPU(obj); |
Jia Liu | e67db06 | 2012-07-20 15:50:39 +0800 | [diff] [blame] | 81 | OpenRISCCPU *cpu = OPENRISC_CPU(obj); |
| 82 | static int inited; |
| 83 | |
Andreas Färber | c05efcb | 2013-01-17 12:13:41 +0100 | [diff] [blame] | 84 | cs->env_ptr = &cpu->env; |
Jia Liu | e67db06 | 2012-07-20 15:50:39 +0800 | [diff] [blame] | 85 | cpu_exec_init(&cpu->env); |
| 86 | |
| 87 | #ifndef CONFIG_USER_ONLY |
| 88 | cpu_openrisc_mmu_init(cpu); |
| 89 | #endif |
| 90 | |
| 91 | if (tcg_enabled() && !inited) { |
| 92 | inited = 1; |
| 93 | openrisc_translate_init(); |
| 94 | } |
| 95 | } |
| 96 | |
| 97 | /* CPU models */ |
Andreas Färber | bd039ce | 2013-01-23 11:17:14 +0100 | [diff] [blame] | 98 | |
| 99 | static ObjectClass *openrisc_cpu_class_by_name(const char *cpu_model) |
| 100 | { |
| 101 | ObjectClass *oc; |
Dongxue Zhang | 071b336 | 2013-07-02 17:11:55 +0800 | [diff] [blame] | 102 | char *typename; |
Andreas Färber | bd039ce | 2013-01-23 11:17:14 +0100 | [diff] [blame] | 103 | |
| 104 | if (cpu_model == NULL) { |
| 105 | return NULL; |
| 106 | } |
| 107 | |
Dongxue Zhang | 071b336 | 2013-07-02 17:11:55 +0800 | [diff] [blame] | 108 | typename = g_strdup_printf("%s-" TYPE_OPENRISC_CPU, cpu_model); |
| 109 | oc = object_class_by_name(typename); |
Jia Liu | 9b146e9 | 2013-07-23 18:32:30 +0800 | [diff] [blame] | 110 | g_free(typename); |
Andreas Färber | c432b78 | 2013-01-23 12:39:38 +0100 | [diff] [blame] | 111 | if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_OPENRISC_CPU) || |
| 112 | object_class_is_abstract(oc))) { |
Andreas Färber | bd039ce | 2013-01-23 11:17:14 +0100 | [diff] [blame] | 113 | return NULL; |
| 114 | } |
| 115 | return oc; |
| 116 | } |
| 117 | |
Jia Liu | e67db06 | 2012-07-20 15:50:39 +0800 | [diff] [blame] | 118 | static void or1200_initfn(Object *obj) |
| 119 | { |
| 120 | OpenRISCCPU *cpu = OPENRISC_CPU(obj); |
| 121 | |
| 122 | set_feature(cpu, OPENRISC_FEATURE_OB32S); |
| 123 | set_feature(cpu, OPENRISC_FEATURE_OF32S); |
| 124 | } |
| 125 | |
| 126 | static void openrisc_any_initfn(Object *obj) |
| 127 | { |
| 128 | OpenRISCCPU *cpu = OPENRISC_CPU(obj); |
| 129 | |
| 130 | set_feature(cpu, OPENRISC_FEATURE_OB32S); |
| 131 | } |
| 132 | |
| 133 | typedef struct OpenRISCCPUInfo { |
| 134 | const char *name; |
| 135 | void (*initfn)(Object *obj); |
| 136 | } OpenRISCCPUInfo; |
| 137 | |
| 138 | static const OpenRISCCPUInfo openrisc_cpus[] = { |
| 139 | { .name = "or1200", .initfn = or1200_initfn }, |
| 140 | { .name = "any", .initfn = openrisc_any_initfn }, |
| 141 | }; |
| 142 | |
| 143 | static void openrisc_cpu_class_init(ObjectClass *oc, void *data) |
| 144 | { |
| 145 | OpenRISCCPUClass *occ = OPENRISC_CPU_CLASS(oc); |
| 146 | CPUClass *cc = CPU_CLASS(occ); |
Andreas Färber | c296262 | 2013-01-05 14:11:07 +0100 | [diff] [blame] | 147 | DeviceClass *dc = DEVICE_CLASS(oc); |
| 148 | |
| 149 | occ->parent_realize = dc->realize; |
| 150 | dc->realize = openrisc_cpu_realizefn; |
Jia Liu | e67db06 | 2012-07-20 15:50:39 +0800 | [diff] [blame] | 151 | |
| 152 | occ->parent_reset = cc->reset; |
| 153 | cc->reset = openrisc_cpu_reset; |
Andreas Färber | bd039ce | 2013-01-23 11:17:14 +0100 | [diff] [blame] | 154 | |
| 155 | cc->class_by_name = openrisc_cpu_class_by_name; |
Andreas Färber | 97a8ea5 | 2013-02-02 10:57:51 +0100 | [diff] [blame] | 156 | cc->do_interrupt = openrisc_cpu_do_interrupt; |
Andreas Färber | 878096e | 2013-05-27 01:33:50 +0200 | [diff] [blame] | 157 | cc->dump_state = openrisc_cpu_dump_state; |
Andreas Färber | f45748f | 2013-06-21 19:09:18 +0200 | [diff] [blame] | 158 | cc->set_pc = openrisc_cpu_set_pc; |
Andreas Färber | 5b50e79 | 2013-06-29 04:18:45 +0200 | [diff] [blame] | 159 | cc->gdb_read_register = openrisc_cpu_gdb_read_register; |
| 160 | cc->gdb_write_register = openrisc_cpu_gdb_write_register; |
Andreas Färber | 00b941e | 2013-06-29 18:55:54 +0200 | [diff] [blame] | 161 | #ifndef CONFIG_USER_ONLY |
| 162 | cc->get_phys_page_debug = openrisc_cpu_get_phys_page_debug; |
| 163 | dc->vmsd = &vmstate_openrisc_cpu; |
| 164 | #endif |
Andreas Färber | a0e372f | 2013-06-28 23:18:47 +0200 | [diff] [blame] | 165 | cc->gdb_num_core_regs = 32 + 3; |
Jia Liu | e67db06 | 2012-07-20 15:50:39 +0800 | [diff] [blame] | 166 | } |
| 167 | |
| 168 | static void cpu_register(const OpenRISCCPUInfo *info) |
| 169 | { |
| 170 | TypeInfo type_info = { |
Jia Liu | e67db06 | 2012-07-20 15:50:39 +0800 | [diff] [blame] | 171 | .parent = TYPE_OPENRISC_CPU, |
| 172 | .instance_size = sizeof(OpenRISCCPU), |
| 173 | .instance_init = info->initfn, |
| 174 | .class_size = sizeof(OpenRISCCPUClass), |
| 175 | }; |
| 176 | |
Andreas Färber | 478032a | 2013-01-27 22:50:35 +0100 | [diff] [blame] | 177 | type_info.name = g_strdup_printf("%s-" TYPE_OPENRISC_CPU, info->name); |
Andreas Färber | a1ebd6c | 2013-01-23 11:10:14 +0100 | [diff] [blame] | 178 | type_register(&type_info); |
Andreas Färber | 478032a | 2013-01-27 22:50:35 +0100 | [diff] [blame] | 179 | g_free((void *)type_info.name); |
Jia Liu | e67db06 | 2012-07-20 15:50:39 +0800 | [diff] [blame] | 180 | } |
| 181 | |
| 182 | static const TypeInfo openrisc_cpu_type_info = { |
| 183 | .name = TYPE_OPENRISC_CPU, |
| 184 | .parent = TYPE_CPU, |
| 185 | .instance_size = sizeof(OpenRISCCPU), |
| 186 | .instance_init = openrisc_cpu_initfn, |
Andreas Färber | bc755a0 | 2013-01-27 22:27:17 +0100 | [diff] [blame] | 187 | .abstract = true, |
Jia Liu | e67db06 | 2012-07-20 15:50:39 +0800 | [diff] [blame] | 188 | .class_size = sizeof(OpenRISCCPUClass), |
| 189 | .class_init = openrisc_cpu_class_init, |
| 190 | }; |
| 191 | |
| 192 | static void openrisc_cpu_register_types(void) |
| 193 | { |
| 194 | int i; |
| 195 | |
| 196 | type_register_static(&openrisc_cpu_type_info); |
| 197 | for (i = 0; i < ARRAY_SIZE(openrisc_cpus); i++) { |
| 198 | cpu_register(&openrisc_cpus[i]); |
| 199 | } |
| 200 | } |
| 201 | |
| 202 | OpenRISCCPU *cpu_openrisc_init(const char *cpu_model) |
| 203 | { |
| 204 | OpenRISCCPU *cpu; |
Andreas Färber | bd039ce | 2013-01-23 11:17:14 +0100 | [diff] [blame] | 205 | ObjectClass *oc; |
Jia Liu | e67db06 | 2012-07-20 15:50:39 +0800 | [diff] [blame] | 206 | |
Andreas Färber | bd039ce | 2013-01-23 11:17:14 +0100 | [diff] [blame] | 207 | oc = openrisc_cpu_class_by_name(cpu_model); |
| 208 | if (oc == NULL) { |
Jia Liu | e67db06 | 2012-07-20 15:50:39 +0800 | [diff] [blame] | 209 | return NULL; |
| 210 | } |
Andreas Färber | bd039ce | 2013-01-23 11:17:14 +0100 | [diff] [blame] | 211 | cpu = OPENRISC_CPU(object_new(object_class_get_name(oc))); |
Jia Liu | e67db06 | 2012-07-20 15:50:39 +0800 | [diff] [blame] | 212 | |
Andreas Färber | c296262 | 2013-01-05 14:11:07 +0100 | [diff] [blame] | 213 | object_property_set_bool(OBJECT(cpu), true, "realized", NULL); |
Jia Liu | e67db06 | 2012-07-20 15:50:39 +0800 | [diff] [blame] | 214 | |
| 215 | return cpu; |
| 216 | } |
| 217 | |
Jia Liu | e67db06 | 2012-07-20 15:50:39 +0800 | [diff] [blame] | 218 | /* Sort alphabetically by type name, except for "any". */ |
| 219 | static gint openrisc_cpu_list_compare(gconstpointer a, gconstpointer b) |
| 220 | { |
| 221 | ObjectClass *class_a = (ObjectClass *)a; |
| 222 | ObjectClass *class_b = (ObjectClass *)b; |
| 223 | const char *name_a, *name_b; |
| 224 | |
| 225 | name_a = object_class_get_name(class_a); |
| 226 | name_b = object_class_get_name(class_b); |
Andreas Färber | 478032a | 2013-01-27 22:50:35 +0100 | [diff] [blame] | 227 | if (strcmp(name_a, "any-" TYPE_OPENRISC_CPU) == 0) { |
Jia Liu | e67db06 | 2012-07-20 15:50:39 +0800 | [diff] [blame] | 228 | return 1; |
Andreas Färber | 478032a | 2013-01-27 22:50:35 +0100 | [diff] [blame] | 229 | } else if (strcmp(name_b, "any-" TYPE_OPENRISC_CPU) == 0) { |
Jia Liu | e67db06 | 2012-07-20 15:50:39 +0800 | [diff] [blame] | 230 | return -1; |
| 231 | } else { |
| 232 | return strcmp(name_a, name_b); |
| 233 | } |
| 234 | } |
| 235 | |
| 236 | static void openrisc_cpu_list_entry(gpointer data, gpointer user_data) |
| 237 | { |
| 238 | ObjectClass *oc = data; |
Andreas Färber | 8486af9 | 2013-01-05 14:14:27 +0100 | [diff] [blame] | 239 | CPUListState *s = user_data; |
Andreas Färber | 478032a | 2013-01-27 22:50:35 +0100 | [diff] [blame] | 240 | const char *typename; |
| 241 | char *name; |
Jia Liu | e67db06 | 2012-07-20 15:50:39 +0800 | [diff] [blame] | 242 | |
Andreas Färber | 478032a | 2013-01-27 22:50:35 +0100 | [diff] [blame] | 243 | typename = object_class_get_name(oc); |
| 244 | name = g_strndup(typename, |
| 245 | strlen(typename) - strlen("-" TYPE_OPENRISC_CPU)); |
Jia Liu | e67db06 | 2012-07-20 15:50:39 +0800 | [diff] [blame] | 246 | (*s->cpu_fprintf)(s->file, " %s\n", |
Andreas Färber | 478032a | 2013-01-27 22:50:35 +0100 | [diff] [blame] | 247 | name); |
| 248 | g_free(name); |
Jia Liu | e67db06 | 2012-07-20 15:50:39 +0800 | [diff] [blame] | 249 | } |
| 250 | |
| 251 | void cpu_openrisc_list(FILE *f, fprintf_function cpu_fprintf) |
| 252 | { |
Andreas Färber | 8486af9 | 2013-01-05 14:14:27 +0100 | [diff] [blame] | 253 | CPUListState s = { |
Jia Liu | e67db06 | 2012-07-20 15:50:39 +0800 | [diff] [blame] | 254 | .file = f, |
| 255 | .cpu_fprintf = cpu_fprintf, |
| 256 | }; |
| 257 | GSList *list; |
| 258 | |
| 259 | list = object_class_get_list(TYPE_OPENRISC_CPU, false); |
| 260 | list = g_slist_sort(list, openrisc_cpu_list_compare); |
| 261 | (*cpu_fprintf)(f, "Available CPUs:\n"); |
| 262 | g_slist_foreach(list, openrisc_cpu_list_entry, &s); |
| 263 | g_slist_free(list); |
| 264 | } |
| 265 | |
| 266 | type_init(openrisc_cpu_register_types) |