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Paul Brook1ad21342009-05-19 16:17:58 +01001#ifndef CPU_COMMON_H
2#define CPU_COMMON_H 1
3
Dong Xu Wang07f35072011-11-22 18:06:26 +08004/* CPU interfaces that are target independent. */
Paul Brook1ad21342009-05-19 16:17:58 +01005
Paolo Bonzini37b76cf2010-04-01 19:57:10 +02006#ifdef TARGET_PHYS_ADDR_BITS
7#include "targphys.h"
8#endif
9
10#ifndef NEED_CPU_H
11#include "poison.h"
12#endif
13
Paul Brook1ad21342009-05-19 16:17:58 +010014#include "bswap.h"
Michael S. Tsirkinf6f3fbc2010-01-27 22:06:57 +020015#include "qemu-queue.h"
Paul Brook1ad21342009-05-19 16:17:58 +010016
Paul Brookb3755a92010-03-12 16:54:58 +000017#if !defined(CONFIG_USER_ONLY)
18
Alexander Grafdd310532010-12-08 12:05:36 +010019enum device_endian {
20 DEVICE_NATIVE_ENDIAN,
21 DEVICE_BIG_ENDIAN,
22 DEVICE_LITTLE_ENDIAN,
23};
24
Paul Brook1ad21342009-05-19 16:17:58 +010025/* address in the RAM (different from a physical address) */
Anthony PERARDf15fbc42011-07-20 08:17:42 +000026#if defined(CONFIG_XEN_BACKEND) && TARGET_PHYS_ADDR_BITS == 64
27typedef uint64_t ram_addr_t;
28# define RAM_ADDR_MAX UINT64_MAX
29# define RAM_ADDR_FMT "%" PRIx64
30#else
Stefan Weil53576992012-03-02 23:30:02 +010031typedef uintptr_t ram_addr_t;
32# define RAM_ADDR_MAX UINTPTR_MAX
33# define RAM_ADDR_FMT "%" PRIxPTR
Anthony PERARDf15fbc42011-07-20 08:17:42 +000034#endif
Paul Brook1ad21342009-05-19 16:17:58 +010035
36/* memory API */
37
Anthony Liguoric227f092009-10-01 16:12:16 -050038typedef void CPUWriteMemoryFunc(void *opaque, target_phys_addr_t addr, uint32_t value);
39typedef uint32_t CPUReadMemoryFunc(void *opaque, target_phys_addr_t addr);
Paul Brook1ad21342009-05-19 16:17:58 +010040
Huang Yingcd19cfa2011-03-02 08:56:19 +010041void qemu_ram_remap(ram_addr_t addr, ram_addr_t length);
Paul Brook1ad21342009-05-19 16:17:58 +010042/* This should only be used for ram local to a device. */
Anthony Liguoric227f092009-10-01 16:12:16 -050043void *qemu_get_ram_ptr(ram_addr_t addr);
Stefano Stabellini8ab934f2011-06-27 18:26:06 +010044void *qemu_ram_ptr_length(ram_addr_t addr, ram_addr_t *size);
Michael S. Tsirkinb2e0a132010-11-22 19:52:34 +020045/* Same but slower, to use for migration, where the order of
46 * RAMBlocks must not change. */
47void *qemu_safe_ram_ptr(ram_addr_t addr);
Anthony PERARD050a0dd2010-09-16 13:57:49 +010048void qemu_put_ram_ptr(void *addr);
Paul Brook1ad21342009-05-19 16:17:58 +010049/* This should not be used by devices. */
Marcelo Tosattie8902612010-10-11 15:31:19 -030050int qemu_ram_addr_from_host(void *ptr, ram_addr_t *ram_addr);
51ram_addr_t qemu_ram_addr_from_host_nofail(void *ptr);
Avi Kivityc5705a72011-12-20 15:59:12 +020052void qemu_ram_set_idstr(ram_addr_t addr, const char *name, DeviceState *dev);
Paul Brook1ad21342009-05-19 16:17:58 +010053
Anthony Liguoric227f092009-10-01 16:12:16 -050054void cpu_physical_memory_rw(target_phys_addr_t addr, uint8_t *buf,
Paul Brook1ad21342009-05-19 16:17:58 +010055 int len, int is_write);
Anthony Liguoric227f092009-10-01 16:12:16 -050056static inline void cpu_physical_memory_read(target_phys_addr_t addr,
Stefan Weil3bad9812011-04-10 17:28:56 +020057 void *buf, int len)
Paul Brook1ad21342009-05-19 16:17:58 +010058{
59 cpu_physical_memory_rw(addr, buf, len, 0);
60}
Anthony Liguoric227f092009-10-01 16:12:16 -050061static inline void cpu_physical_memory_write(target_phys_addr_t addr,
Stefan Weil3bad9812011-04-10 17:28:56 +020062 const void *buf, int len)
Paul Brook1ad21342009-05-19 16:17:58 +010063{
Stefan Weil3bad9812011-04-10 17:28:56 +020064 cpu_physical_memory_rw(addr, (void *)buf, len, 1);
Paul Brook1ad21342009-05-19 16:17:58 +010065}
Anthony Liguoric227f092009-10-01 16:12:16 -050066void *cpu_physical_memory_map(target_phys_addr_t addr,
67 target_phys_addr_t *plen,
Paul Brook1ad21342009-05-19 16:17:58 +010068 int is_write);
Anthony Liguoric227f092009-10-01 16:12:16 -050069void cpu_physical_memory_unmap(void *buffer, target_phys_addr_t len,
70 int is_write, target_phys_addr_t access_len);
Paul Brook1ad21342009-05-19 16:17:58 +010071void *cpu_register_map_client(void *opaque, void (*callback)(void *opaque));
72void cpu_unregister_map_client(void *cookie);
73
Wen Congyang76f35532012-05-07 12:04:18 +080074#ifndef CONFIG_USER_ONLY
75bool cpu_physical_memory_is_io(target_phys_addr_t phys_addr);
76#endif
77
Blue Swirl6842a082010-03-21 19:47:13 +000078/* Coalesced MMIO regions are areas where write operations can be reordered.
79 * This usually implies that write operations are side-effect free. This allows
80 * batching which can make a major impact on performance when using
81 * virtualization.
82 */
Blue Swirl6842a082010-03-21 19:47:13 +000083void qemu_flush_coalesced_mmio_buffer(void);
84
Anthony Liguoric227f092009-10-01 16:12:16 -050085uint32_t ldub_phys(target_phys_addr_t addr);
Alexander Graf1e78bcc2011-07-06 09:09:23 +020086uint32_t lduw_le_phys(target_phys_addr_t addr);
87uint32_t lduw_be_phys(target_phys_addr_t addr);
Alexander Graf1e78bcc2011-07-06 09:09:23 +020088uint32_t ldl_le_phys(target_phys_addr_t addr);
89uint32_t ldl_be_phys(target_phys_addr_t addr);
Alexander Graf1e78bcc2011-07-06 09:09:23 +020090uint64_t ldq_le_phys(target_phys_addr_t addr);
91uint64_t ldq_be_phys(target_phys_addr_t addr);
Anthony Liguoric227f092009-10-01 16:12:16 -050092void stb_phys(target_phys_addr_t addr, uint32_t val);
Alexander Graf1e78bcc2011-07-06 09:09:23 +020093void stw_le_phys(target_phys_addr_t addr, uint32_t val);
94void stw_be_phys(target_phys_addr_t addr, uint32_t val);
Alexander Graf1e78bcc2011-07-06 09:09:23 +020095void stl_le_phys(target_phys_addr_t addr, uint32_t val);
96void stl_be_phys(target_phys_addr_t addr, uint32_t val);
Alexander Graf1e78bcc2011-07-06 09:09:23 +020097void stq_le_phys(target_phys_addr_t addr, uint64_t val);
98void stq_be_phys(target_phys_addr_t addr, uint64_t val);
Paul Brook1ad21342009-05-19 16:17:58 +010099
Blue Swirl21673cd2011-07-14 15:22:20 +0000100#ifdef NEED_CPU_H
101uint32_t lduw_phys(target_phys_addr_t addr);
102uint32_t ldl_phys(target_phys_addr_t addr);
103uint64_t ldq_phys(target_phys_addr_t addr);
104void stl_phys_notdirty(target_phys_addr_t addr, uint32_t val);
105void stq_phys_notdirty(target_phys_addr_t addr, uint64_t val);
106void stw_phys(target_phys_addr_t addr, uint32_t val);
107void stl_phys(target_phys_addr_t addr, uint32_t val);
108void stq_phys(target_phys_addr_t addr, uint64_t val);
109#endif
110
Anthony Liguoric227f092009-10-01 16:12:16 -0500111void cpu_physical_memory_write_rom(target_phys_addr_t addr,
Paul Brook1ad21342009-05-19 16:17:58 +0100112 const uint8_t *buf, int len);
113
Avi Kivity0e0df1e2012-01-02 00:32:15 +0200114extern struct MemoryRegion io_mem_ram;
115extern struct MemoryRegion io_mem_rom;
116extern struct MemoryRegion io_mem_unassigned;
117extern struct MemoryRegion io_mem_notdirty;
Paul Brook1ad21342009-05-19 16:17:58 +0100118
Paul Brookb3755a92010-03-12 16:54:58 +0000119#endif
120
Paul Brook1ad21342009-05-19 16:17:58 +0100121#endif /* !CPU_COMMON_H */