pbrook | d597536 | 2008-06-07 20:50:51 +0000 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (c) 2003 Fabrice Bellard |
| 3 | * |
| 4 | * This library is free software; you can redistribute it and/or |
| 5 | * modify it under the terms of the GNU Lesser General Public |
| 6 | * License as published by the Free Software Foundation; either |
| 7 | * version 2 of the License, or (at your option) any later version. |
| 8 | * |
| 9 | * This library is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 12 | * Lesser General Public License for more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU Lesser General Public |
| 15 | * License along with this library; if not, write to the Free Software |
| 16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 17 | */ |
| 18 | |
| 19 | /* Locking primitives. Most of this code should be redundant - |
| 20 | system emulation doesn't need/use locking, NPTL userspace uses |
| 21 | pthread mutexes, and non-NPTL userspace isn't threadsafe anyway. |
| 22 | In either case a spinlock is probably the wrong kind of lock. |
| 23 | Spinlocks are only good if you know annother CPU has the lock and is |
| 24 | likely to release it soon. In environments where you have more threads |
| 25 | than physical CPUs (the extreme case being a single CPU host) a spinlock |
| 26 | simply wastes CPU until the OS decides to preempt it. */ |
| 27 | #if defined(USE_NPTL) |
| 28 | |
| 29 | #include <pthread.h> |
| 30 | #define spin_lock pthread_mutex_lock |
| 31 | #define spin_unlock pthread_mutex_unlock |
| 32 | #define spinlock_t pthread_mutex_t |
| 33 | #define SPIN_LOCK_UNLOCKED PTHREAD_MUTEX_INITIALIZER |
| 34 | |
| 35 | #else |
| 36 | |
| 37 | #if defined(__hppa__) |
| 38 | |
| 39 | typedef int spinlock_t[4]; |
| 40 | |
| 41 | #define SPIN_LOCK_UNLOCKED { 1, 1, 1, 1 } |
| 42 | |
| 43 | static inline void resetlock (spinlock_t *p) |
| 44 | { |
| 45 | (*p)[0] = (*p)[1] = (*p)[2] = (*p)[3] = 1; |
| 46 | } |
| 47 | |
| 48 | #else |
| 49 | |
| 50 | typedef int spinlock_t; |
| 51 | |
| 52 | #define SPIN_LOCK_UNLOCKED 0 |
| 53 | |
| 54 | static inline void resetlock (spinlock_t *p) |
| 55 | { |
| 56 | *p = SPIN_LOCK_UNLOCKED; |
| 57 | } |
| 58 | |
| 59 | #endif |
| 60 | |
| 61 | #if defined(__powerpc__) |
| 62 | static inline int testandset (int *p) |
| 63 | { |
| 64 | int ret; |
| 65 | __asm__ __volatile__ ( |
| 66 | "0: lwarx %0,0,%1\n" |
| 67 | " xor. %0,%3,%0\n" |
| 68 | " bne 1f\n" |
| 69 | " stwcx. %2,0,%1\n" |
| 70 | " bne- 0b\n" |
| 71 | "1: " |
| 72 | : "=&r" (ret) |
| 73 | : "r" (p), "r" (1), "r" (0) |
| 74 | : "cr0", "memory"); |
| 75 | return ret; |
| 76 | } |
| 77 | #elif defined(__i386__) |
| 78 | static inline int testandset (int *p) |
| 79 | { |
| 80 | long int readval = 0; |
| 81 | |
| 82 | __asm__ __volatile__ ("lock; cmpxchgl %2, %0" |
| 83 | : "+m" (*p), "+a" (readval) |
| 84 | : "r" (1) |
| 85 | : "cc"); |
| 86 | return readval; |
| 87 | } |
| 88 | #elif defined(__x86_64__) |
| 89 | static inline int testandset (int *p) |
| 90 | { |
| 91 | long int readval = 0; |
| 92 | |
| 93 | __asm__ __volatile__ ("lock; cmpxchgl %2, %0" |
| 94 | : "+m" (*p), "+a" (readval) |
| 95 | : "r" (1) |
| 96 | : "cc"); |
| 97 | return readval; |
| 98 | } |
| 99 | #elif defined(__s390__) |
| 100 | static inline int testandset (int *p) |
| 101 | { |
| 102 | int ret; |
| 103 | |
| 104 | __asm__ __volatile__ ("0: cs %0,%1,0(%2)\n" |
| 105 | " jl 0b" |
| 106 | : "=&d" (ret) |
| 107 | : "r" (1), "a" (p), "0" (*p) |
| 108 | : "cc", "memory" ); |
| 109 | return ret; |
| 110 | } |
| 111 | #elif defined(__alpha__) |
| 112 | static inline int testandset (int *p) |
| 113 | { |
| 114 | int ret; |
| 115 | unsigned long one; |
| 116 | |
| 117 | __asm__ __volatile__ ("0: mov 1,%2\n" |
| 118 | " ldl_l %0,%1\n" |
| 119 | " stl_c %2,%1\n" |
| 120 | " beq %2,1f\n" |
| 121 | ".subsection 2\n" |
| 122 | "1: br 0b\n" |
| 123 | ".previous" |
| 124 | : "=r" (ret), "=m" (*p), "=r" (one) |
| 125 | : "m" (*p)); |
| 126 | return ret; |
| 127 | } |
| 128 | #elif defined(__sparc__) |
| 129 | static inline int testandset (int *p) |
| 130 | { |
| 131 | int ret; |
| 132 | |
| 133 | __asm__ __volatile__("ldstub [%1], %0" |
| 134 | : "=r" (ret) |
| 135 | : "r" (p) |
| 136 | : "memory"); |
| 137 | |
| 138 | return (ret ? 1 : 0); |
| 139 | } |
| 140 | #elif defined(__arm__) |
| 141 | static inline int testandset (int *spinlock) |
| 142 | { |
| 143 | register unsigned int ret; |
| 144 | __asm__ __volatile__("swp %0, %1, [%2]" |
| 145 | : "=r"(ret) |
| 146 | : "0"(1), "r"(spinlock)); |
| 147 | |
| 148 | return ret; |
| 149 | } |
| 150 | #elif defined(__mc68000) |
| 151 | static inline int testandset (int *p) |
| 152 | { |
| 153 | char ret; |
| 154 | __asm__ __volatile__("tas %1; sne %0" |
| 155 | : "=r" (ret) |
| 156 | : "m" (p) |
| 157 | : "cc","memory"); |
| 158 | return ret; |
| 159 | } |
| 160 | #elif defined(__hppa__) |
| 161 | |
| 162 | /* Because malloc only guarantees 8-byte alignment for malloc'd data, |
| 163 | and GCC only guarantees 8-byte alignment for stack locals, we can't |
| 164 | be assured of 16-byte alignment for atomic lock data even if we |
| 165 | specify "__attribute ((aligned(16)))" in the type declaration. So, |
| 166 | we use a struct containing an array of four ints for the atomic lock |
| 167 | type and dynamically select the 16-byte aligned int from the array |
| 168 | for the semaphore. */ |
| 169 | #define __PA_LDCW_ALIGNMENT 16 |
| 170 | static inline void *ldcw_align (void *p) { |
| 171 | unsigned long a = (unsigned long)p; |
| 172 | a = (a + __PA_LDCW_ALIGNMENT - 1) & ~(__PA_LDCW_ALIGNMENT - 1); |
| 173 | return (void *)a; |
| 174 | } |
| 175 | |
| 176 | static inline int testandset (spinlock_t *p) |
| 177 | { |
| 178 | unsigned int ret; |
| 179 | p = ldcw_align(p); |
| 180 | __asm__ __volatile__("ldcw 0(%1),%0" |
| 181 | : "=r" (ret) |
| 182 | : "r" (p) |
| 183 | : "memory" ); |
| 184 | return !ret; |
| 185 | } |
| 186 | |
| 187 | #elif defined(__ia64) |
| 188 | |
| 189 | #include <ia64intrin.h> |
| 190 | |
| 191 | static inline int testandset (int *p) |
| 192 | { |
| 193 | return __sync_lock_test_and_set (p, 1); |
| 194 | } |
| 195 | #elif defined(__mips__) |
| 196 | static inline int testandset (int *p) |
| 197 | { |
| 198 | int ret; |
| 199 | |
| 200 | __asm__ __volatile__ ( |
| 201 | " .set push \n" |
| 202 | " .set noat \n" |
| 203 | " .set mips2 \n" |
| 204 | "1: li $1, 1 \n" |
| 205 | " ll %0, %1 \n" |
| 206 | " sc $1, %1 \n" |
| 207 | " beqz $1, 1b \n" |
| 208 | " .set pop " |
| 209 | : "=r" (ret), "+R" (*p) |
| 210 | : |
| 211 | : "memory"); |
| 212 | |
| 213 | return ret; |
| 214 | } |
| 215 | #else |
| 216 | #error unimplemented CPU support |
| 217 | #endif |
| 218 | |
| 219 | #if defined(CONFIG_USER_ONLY) |
| 220 | static inline void spin_lock(spinlock_t *lock) |
| 221 | { |
| 222 | while (testandset(lock)); |
| 223 | } |
| 224 | |
| 225 | static inline void spin_unlock(spinlock_t *lock) |
| 226 | { |
| 227 | resetlock(lock); |
| 228 | } |
| 229 | |
| 230 | static inline int spin_trylock(spinlock_t *lock) |
| 231 | { |
| 232 | return !testandset(lock); |
| 233 | } |
| 234 | #else |
| 235 | static inline void spin_lock(spinlock_t *lock) |
| 236 | { |
| 237 | } |
| 238 | |
| 239 | static inline void spin_unlock(spinlock_t *lock) |
| 240 | { |
| 241 | } |
| 242 | |
| 243 | static inline int spin_trylock(spinlock_t *lock) |
| 244 | { |
| 245 | return 1; |
| 246 | } |
| 247 | #endif |
| 248 | |
| 249 | #endif |