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bellardab93bbe2003-08-10 21:35:13 +00001/*
2 * common defines for all CPUs
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef CPU_DEFS_H
21#define CPU_DEFS_H
22
23#include "config.h"
24#include <setjmp.h>
bellarded1c0bc2004-02-16 22:17:43 +000025#include <inttypes.h>
26#include "osdep.h"
bellardab93bbe2003-08-10 21:35:13 +000027
bellard35b66fc2004-01-24 15:26:06 +000028#ifndef TARGET_LONG_BITS
29#error TARGET_LONG_BITS must be defined before including this header
30#endif
31
bellard4f2ac232004-04-26 19:44:02 +000032#if defined(__alpha__) || defined (__ia64__) || defined(__x86_64__)
33#define HOST_LONG_BITS 64
34#else
35#define HOST_LONG_BITS 32
36#endif
37
bellardab6d9602004-04-25 21:25:15 +000038#ifndef TARGET_PHYS_ADDR_BITS
bellard4f2ac232004-04-26 19:44:02 +000039#if TARGET_LONG_BITS >= HOST_LONG_BITS
bellardab6d9602004-04-25 21:25:15 +000040#define TARGET_PHYS_ADDR_BITS TARGET_LONG_BITS
bellard4f2ac232004-04-26 19:44:02 +000041#else
42#define TARGET_PHYS_ADDR_BITS HOST_LONG_BITS
43#endif
bellardab6d9602004-04-25 21:25:15 +000044#endif
45
bellard35b66fc2004-01-24 15:26:06 +000046#define TARGET_LONG_SIZE (TARGET_LONG_BITS / 8)
47
bellardab6d9602004-04-25 21:25:15 +000048/* target_ulong is the type of a virtual address */
bellard35b66fc2004-01-24 15:26:06 +000049#if TARGET_LONG_SIZE == 4
50typedef int32_t target_long;
51typedef uint32_t target_ulong;
bellardc27004e2005-01-03 23:35:10 +000052#define TARGET_FMT_lx "%08x"
bellard35b66fc2004-01-24 15:26:06 +000053#elif TARGET_LONG_SIZE == 8
54typedef int64_t target_long;
55typedef uint64_t target_ulong;
bellardc27004e2005-01-03 23:35:10 +000056#define TARGET_FMT_lx "%016llx"
bellard35b66fc2004-01-24 15:26:06 +000057#else
58#error TARGET_LONG_SIZE undefined
59#endif
60
bellardab6d9602004-04-25 21:25:15 +000061/* target_phys_addr_t is the type of a physical address (its size can
bellard4f2ac232004-04-26 19:44:02 +000062 be different from 'target_ulong'). We have sizeof(target_phys_addr)
63 = max(sizeof(unsigned long),
64 sizeof(size_of_target_physical_address)) because we must pass a
65 host pointer to memory operations in some cases */
66
bellardab6d9602004-04-25 21:25:15 +000067#if TARGET_PHYS_ADDR_BITS == 32
68typedef uint32_t target_phys_addr_t;
69#elif TARGET_PHYS_ADDR_BITS == 64
70typedef uint64_t target_phys_addr_t;
71#else
72#error TARGET_PHYS_ADDR_BITS undefined
73#endif
74
bellardf193c792004-03-21 17:06:25 +000075#define HOST_LONG_SIZE (HOST_LONG_BITS / 8)
76
bellardab93bbe2003-08-10 21:35:13 +000077#define EXCP_INTERRUPT 256 /* async interruption */
78#define EXCP_HLT 257 /* hlt instruction reached */
79#define EXCP_DEBUG 258 /* cpu stopped after a breakpoint or singlestep */
80
81#define MAX_BREAKPOINTS 32
82
83#define CPU_TLB_SIZE 256
84
85typedef struct CPUTLBEntry {
bellarddb8d7462003-10-27 21:12:17 +000086 /* bit 31 to TARGET_PAGE_BITS : virtual address
87 bit TARGET_PAGE_BITS-1..IO_MEM_SHIFT : if non zero, memory io
88 zone number
89 bit 3 : indicates that the entry is invalid
90 bit 2..0 : zero
91 */
bellard4f2ac232004-04-26 19:44:02 +000092 target_ulong address;
bellarddb8d7462003-10-27 21:12:17 +000093 /* addend to virtual address to get physical address */
bellard4f2ac232004-04-26 19:44:02 +000094 target_phys_addr_t addend;
bellardab93bbe2003-08-10 21:35:13 +000095} CPUTLBEntry;
96
97#endif