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bellard54936002003-05-13 00:25:15 +00001/*
Blue Swirl5b6dd862012-12-02 16:04:43 +00002 * Virtual page mapping
ths5fafdf22007-09-16 21:08:06 +00003 *
bellard54936002003-05-13 00:25:15 +00004 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
Blue Swirl8167ee82009-07-16 20:47:01 +000017 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
bellard54936002003-05-13 00:25:15 +000018 */
bellard67b915a2004-03-31 23:37:16 +000019#include "config.h"
bellardd5a8f072004-09-29 21:15:28 +000020#ifdef _WIN32
21#include <windows.h>
22#else
bellarda98d49b2004-11-14 16:22:05 +000023#include <sys/types.h>
bellardd5a8f072004-09-29 21:15:28 +000024#include <sys/mman.h>
25#endif
bellard54936002003-05-13 00:25:15 +000026
Stefan Weil055403b2010-10-22 23:03:32 +020027#include "qemu-common.h"
bellard6180a182003-09-30 21:04:53 +000028#include "cpu.h"
bellardb67d9a52008-05-23 09:57:34 +000029#include "tcg.h"
pbrookb3c77242008-06-30 16:31:04 +000030#include "hw/hw.h"
Alex Williamsoncc9e98c2010-06-25 11:09:43 -060031#include "hw/qdev.h"
Paolo Bonzini1de7afc2012-12-17 18:20:00 +010032#include "qemu/osdep.h"
Paolo Bonzini9c17d612012-12-17 18:20:04 +010033#include "sysemu/kvm.h"
Paolo Bonzini0d09e412013-02-05 17:06:20 +010034#include "hw/xen/xen.h"
Paolo Bonzini1de7afc2012-12-17 18:20:00 +010035#include "qemu/timer.h"
36#include "qemu/config-file.h"
Paolo Bonzini022c62c2012-12-17 18:19:49 +010037#include "exec/memory.h"
Paolo Bonzini9c17d612012-12-17 18:20:04 +010038#include "sysemu/dma.h"
Paolo Bonzini022c62c2012-12-17 18:19:49 +010039#include "exec/address-spaces.h"
pbrook53a59602006-03-25 19:31:22 +000040#if defined(CONFIG_USER_ONLY)
41#include <qemu.h>
Jun Nakajima432d2682010-08-31 16:41:25 +010042#else /* !CONFIG_USER_ONLY */
Paolo Bonzini9c17d612012-12-17 18:20:04 +010043#include "sysemu/xen-mapcache.h"
Stefano Stabellini6506e4f2011-05-19 18:35:44 +010044#include "trace.h"
pbrook53a59602006-03-25 19:31:22 +000045#endif
Paolo Bonzini0d6d3c82012-11-14 15:45:02 +010046#include "exec/cpu-all.h"
bellard54936002003-05-13 00:25:15 +000047
Paolo Bonzini022c62c2012-12-17 18:19:49 +010048#include "exec/cputlb.h"
Blue Swirl5b6dd862012-12-02 16:04:43 +000049#include "translate-all.h"
Blue Swirl0cac1b62012-04-09 16:50:52 +000050
Paolo Bonzini022c62c2012-12-17 18:19:49 +010051#include "exec/memory-internal.h"
Avi Kivity67d95c12011-12-15 15:25:22 +020052
blueswir1db7b5422007-05-26 17:36:03 +000053//#define DEBUG_SUBPAGE
ths1196be32007-03-17 15:17:58 +000054
pbrook99773bd2006-04-16 15:14:59 +000055#if !defined(CONFIG_USER_ONLY)
bellard9fa3e852004-01-04 18:06:42 +000056int phys_ram_fd;
aliguori74576192008-10-06 14:02:03 +000057static int in_migration;
pbrook94a6b542009-04-11 17:15:54 +000058
Paolo Bonzinia3161032012-11-14 15:54:48 +010059RAMList ram_list = { .blocks = QTAILQ_HEAD_INITIALIZER(ram_list.blocks) };
Avi Kivity62152b82011-07-26 14:26:14 +030060
61static MemoryRegion *system_memory;
Avi Kivity309cb472011-08-08 16:09:03 +030062static MemoryRegion *system_io;
Avi Kivity62152b82011-07-26 14:26:14 +030063
Avi Kivityf6790af2012-10-02 20:13:51 +020064AddressSpace address_space_io;
65AddressSpace address_space_memory;
Avi Kivity2673a5d2012-10-02 18:49:28 +020066
Paolo Bonzini0844e002013-05-24 14:37:28 +020067MemoryRegion io_mem_rom, io_mem_notdirty;
Jan Kiszkaacc9d802013-05-26 21:55:37 +020068static MemoryRegion io_mem_unassigned;
Avi Kivity0e0df1e2012-01-02 00:32:15 +020069
pbrooke2eef172008-06-08 01:09:01 +000070#endif
bellard9fa3e852004-01-04 18:06:42 +000071
Andreas Färber9349b4f2012-03-14 01:38:32 +010072CPUArchState *first_cpu;
bellard6a00d602005-11-21 23:25:50 +000073/* current CPU in the current thread. It is only valid inside
74 cpu_exec() */
Andreas Färber9349b4f2012-03-14 01:38:32 +010075DEFINE_TLS(CPUArchState *,cpu_single_env);
pbrook2e70f6e2008-06-29 01:03:05 +000076/* 0 = Do not count executed instructions.
thsbf20dc02008-06-30 17:22:19 +000077 1 = Precise instruction counting.
pbrook2e70f6e2008-06-29 01:03:05 +000078 2 = Adaptive rate instruction counting. */
Paolo Bonzini5708fc62012-11-26 15:36:40 +010079int use_icount;
bellard6a00d602005-11-21 23:25:50 +000080
pbrooke2eef172008-06-08 01:09:01 +000081#if !defined(CONFIG_USER_ONLY)
Avi Kivity4346ae32012-02-10 17:00:01 +020082
Paolo Bonzini1db8abb2013-05-21 12:07:21 +020083typedef struct PhysPageEntry PhysPageEntry;
84
85struct PhysPageEntry {
86 uint16_t is_leaf : 1;
87 /* index into phys_sections (is_leaf) or phys_map_nodes (!is_leaf) */
88 uint16_t ptr : 15;
89};
90
Paolo Bonzini0475d942013-05-29 12:28:21 +020091typedef PhysPageEntry Node[L2_SIZE];
92
Paolo Bonzini1db8abb2013-05-21 12:07:21 +020093struct AddressSpaceDispatch {
94 /* This is a multi-level map on the physical address space.
95 * The bottom level has pointers to MemoryRegionSections.
96 */
97 PhysPageEntry phys_map;
Paolo Bonzini0475d942013-05-29 12:28:21 +020098 Node *nodes;
99 MemoryRegionSection *sections;
Jan Kiszkaacc9d802013-05-26 21:55:37 +0200100 AddressSpace *as;
Paolo Bonzini1db8abb2013-05-21 12:07:21 +0200101};
102
Jan Kiszka90260c62013-05-26 21:46:51 +0200103#define SUBPAGE_IDX(addr) ((addr) & ~TARGET_PAGE_MASK)
104typedef struct subpage_t {
105 MemoryRegion iomem;
Jan Kiszkaacc9d802013-05-26 21:55:37 +0200106 AddressSpace *as;
Jan Kiszka90260c62013-05-26 21:46:51 +0200107 hwaddr base;
108 uint16_t sub_section[TARGET_PAGE_SIZE];
109} subpage_t;
110
Liu Ping Fanb41aac42013-05-29 11:09:17 +0200111#define PHYS_SECTION_UNASSIGNED 0
112#define PHYS_SECTION_NOTDIRTY 1
113#define PHYS_SECTION_ROM 2
114#define PHYS_SECTION_WATCH 3
Avi Kivity5312bd82012-02-12 18:32:55 +0200115
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200116typedef struct PhysPageMap {
117 unsigned sections_nb;
118 unsigned sections_nb_alloc;
119 unsigned nodes_nb;
120 unsigned nodes_nb_alloc;
121 Node *nodes;
122 MemoryRegionSection *sections;
123} PhysPageMap;
124
Paolo Bonzini60926662013-05-29 12:30:26 +0200125static PhysPageMap *prev_map;
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200126static PhysPageMap next_map;
Avi Kivityd6f2ea22012-02-12 20:12:49 +0200127
Avi Kivity07f07b32012-02-13 20:45:32 +0200128#define PHYS_MAP_NODE_NIL (((uint16_t)~0) >> 1)
Avi Kivityd6f2ea22012-02-12 20:12:49 +0200129
pbrooke2eef172008-06-08 01:09:01 +0000130static void io_mem_init(void);
Avi Kivity62152b82011-07-26 14:26:14 +0300131static void memory_map_init(void);
Blue Swirl8b9c99d2012-10-28 11:04:51 +0000132static void *qemu_safe_ram_ptr(ram_addr_t addr);
pbrooke2eef172008-06-08 01:09:01 +0000133
Avi Kivity1ec9b902012-01-02 12:47:48 +0200134static MemoryRegion io_mem_watch;
pbrook6658ffb2007-03-16 23:58:11 +0000135#endif
bellard54936002003-05-13 00:25:15 +0000136
Paul Brook6d9a1302010-02-28 23:55:53 +0000137#if !defined(CONFIG_USER_ONLY)
Avi Kivityd6f2ea22012-02-12 20:12:49 +0200138
Avi Kivityf7bf5462012-02-13 20:12:05 +0200139static void phys_map_node_reserve(unsigned nodes)
140{
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200141 if (next_map.nodes_nb + nodes > next_map.nodes_nb_alloc) {
142 next_map.nodes_nb_alloc = MAX(next_map.nodes_nb_alloc * 2,
143 16);
144 next_map.nodes_nb_alloc = MAX(next_map.nodes_nb_alloc,
145 next_map.nodes_nb + nodes);
146 next_map.nodes = g_renew(Node, next_map.nodes,
147 next_map.nodes_nb_alloc);
Avi Kivityf7bf5462012-02-13 20:12:05 +0200148 }
149}
150
151static uint16_t phys_map_node_alloc(void)
Avi Kivityd6f2ea22012-02-12 20:12:49 +0200152{
153 unsigned i;
154 uint16_t ret;
155
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200156 ret = next_map.nodes_nb++;
Avi Kivityd6f2ea22012-02-12 20:12:49 +0200157 assert(ret != PHYS_MAP_NODE_NIL);
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200158 assert(ret != next_map.nodes_nb_alloc);
Avi Kivityd6f2ea22012-02-12 20:12:49 +0200159 for (i = 0; i < L2_SIZE; ++i) {
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200160 next_map.nodes[ret][i].is_leaf = 0;
161 next_map.nodes[ret][i].ptr = PHYS_MAP_NODE_NIL;
Avi Kivityd6f2ea22012-02-12 20:12:49 +0200162 }
Avi Kivityf7bf5462012-02-13 20:12:05 +0200163 return ret;
Avi Kivityd6f2ea22012-02-12 20:12:49 +0200164}
165
Avi Kivitya8170e52012-10-23 12:30:10 +0200166static void phys_page_set_level(PhysPageEntry *lp, hwaddr *index,
167 hwaddr *nb, uint16_t leaf,
Avi Kivity29990972012-02-13 20:21:20 +0200168 int level)
Avi Kivityf7bf5462012-02-13 20:12:05 +0200169{
170 PhysPageEntry *p;
171 int i;
Avi Kivitya8170e52012-10-23 12:30:10 +0200172 hwaddr step = (hwaddr)1 << (level * L2_BITS);
Avi Kivityf7bf5462012-02-13 20:12:05 +0200173
Avi Kivity07f07b32012-02-13 20:45:32 +0200174 if (!lp->is_leaf && lp->ptr == PHYS_MAP_NODE_NIL) {
Avi Kivityc19e8802012-02-13 20:25:31 +0200175 lp->ptr = phys_map_node_alloc();
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200176 p = next_map.nodes[lp->ptr];
Avi Kivityf7bf5462012-02-13 20:12:05 +0200177 if (level == 0) {
178 for (i = 0; i < L2_SIZE; i++) {
Avi Kivity07f07b32012-02-13 20:45:32 +0200179 p[i].is_leaf = 1;
Liu Ping Fanb41aac42013-05-29 11:09:17 +0200180 p[i].ptr = PHYS_SECTION_UNASSIGNED;
Avi Kivityf7bf5462012-02-13 20:12:05 +0200181 }
182 }
183 } else {
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200184 p = next_map.nodes[lp->ptr];
Avi Kivityf7bf5462012-02-13 20:12:05 +0200185 }
Avi Kivity29990972012-02-13 20:21:20 +0200186 lp = &p[(*index >> (level * L2_BITS)) & (L2_SIZE - 1)];
Avi Kivityf7bf5462012-02-13 20:12:05 +0200187
Avi Kivity29990972012-02-13 20:21:20 +0200188 while (*nb && lp < &p[L2_SIZE]) {
Avi Kivity07f07b32012-02-13 20:45:32 +0200189 if ((*index & (step - 1)) == 0 && *nb >= step) {
190 lp->is_leaf = true;
Avi Kivityc19e8802012-02-13 20:25:31 +0200191 lp->ptr = leaf;
Avi Kivity07f07b32012-02-13 20:45:32 +0200192 *index += step;
193 *nb -= step;
Avi Kivity29990972012-02-13 20:21:20 +0200194 } else {
195 phys_page_set_level(lp, index, nb, leaf, level - 1);
196 }
197 ++lp;
Avi Kivityf7bf5462012-02-13 20:12:05 +0200198 }
199}
200
Avi Kivityac1970f2012-10-03 16:22:53 +0200201static void phys_page_set(AddressSpaceDispatch *d,
Avi Kivitya8170e52012-10-23 12:30:10 +0200202 hwaddr index, hwaddr nb,
Avi Kivity29990972012-02-13 20:21:20 +0200203 uint16_t leaf)
bellard92e873b2004-05-21 14:52:29 +0000204{
Avi Kivity29990972012-02-13 20:21:20 +0200205 /* Wildly overreserve - it doesn't matter much. */
Avi Kivity07f07b32012-02-13 20:45:32 +0200206 phys_map_node_reserve(3 * P_L2_LEVELS);
bellard92e873b2004-05-21 14:52:29 +0000207
Avi Kivityac1970f2012-10-03 16:22:53 +0200208 phys_page_set_level(&d->phys_map, &index, &nb, leaf, P_L2_LEVELS - 1);
bellard92e873b2004-05-21 14:52:29 +0000209}
210
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200211static MemoryRegionSection *phys_page_find(PhysPageEntry lp, hwaddr index,
212 Node *nodes, MemoryRegionSection *sections)
bellard92e873b2004-05-21 14:52:29 +0000213{
Avi Kivity31ab2b42012-02-13 16:44:19 +0200214 PhysPageEntry *p;
215 int i;
Avi Kivityf1f6e3b2011-11-20 17:52:22 +0200216
Avi Kivity07f07b32012-02-13 20:45:32 +0200217 for (i = P_L2_LEVELS - 1; i >= 0 && !lp.is_leaf; i--) {
Avi Kivityc19e8802012-02-13 20:25:31 +0200218 if (lp.ptr == PHYS_MAP_NODE_NIL) {
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200219 return &sections[PHYS_SECTION_UNASSIGNED];
Avi Kivity31ab2b42012-02-13 16:44:19 +0200220 }
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200221 p = nodes[lp.ptr];
Avi Kivity31ab2b42012-02-13 16:44:19 +0200222 lp = p[(index >> (i * L2_BITS)) & (L2_SIZE - 1)];
Avi Kivityf1f6e3b2011-11-20 17:52:22 +0200223 }
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200224 return &sections[lp.ptr];
Avi Kivityf3705d52012-03-08 16:16:34 +0200225}
226
Blue Swirle5548612012-04-21 13:08:33 +0000227bool memory_region_is_unassigned(MemoryRegion *mr)
228{
Paolo Bonzini2a8e7492013-05-24 14:34:08 +0200229 return mr != &io_mem_rom && mr != &io_mem_notdirty && !mr->rom_device
Blue Swirle5548612012-04-21 13:08:33 +0000230 && mr != &io_mem_watch;
231}
Paolo Bonzini149f54b2013-05-24 12:59:37 +0200232
Jan Kiszka9f029602013-05-06 16:48:02 +0200233static MemoryRegionSection *address_space_lookup_region(AddressSpace *as,
Jan Kiszka90260c62013-05-26 21:46:51 +0200234 hwaddr addr,
235 bool resolve_subpage)
Jan Kiszka9f029602013-05-06 16:48:02 +0200236{
Paolo Bonzini0475d942013-05-29 12:28:21 +0200237 AddressSpaceDispatch *d = as->dispatch;
Jan Kiszka90260c62013-05-26 21:46:51 +0200238 MemoryRegionSection *section;
239 subpage_t *subpage;
240
Paolo Bonzini0475d942013-05-29 12:28:21 +0200241 section = phys_page_find(d->phys_map, addr >> TARGET_PAGE_BITS,
242 d->nodes, d->sections);
Jan Kiszka90260c62013-05-26 21:46:51 +0200243 if (resolve_subpage && section->mr->subpage) {
244 subpage = container_of(section->mr, subpage_t, iomem);
Paolo Bonzini0475d942013-05-29 12:28:21 +0200245 section = &d->sections[subpage->sub_section[SUBPAGE_IDX(addr)]];
Jan Kiszka90260c62013-05-26 21:46:51 +0200246 }
247 return section;
Jan Kiszka9f029602013-05-06 16:48:02 +0200248}
249
Jan Kiszka90260c62013-05-26 21:46:51 +0200250static MemoryRegionSection *
251address_space_translate_internal(AddressSpace *as, hwaddr addr, hwaddr *xlat,
252 hwaddr *plen, bool resolve_subpage)
Paolo Bonzini149f54b2013-05-24 12:59:37 +0200253{
254 MemoryRegionSection *section;
255 Int128 diff;
256
Jan Kiszka90260c62013-05-26 21:46:51 +0200257 section = address_space_lookup_region(as, addr, resolve_subpage);
Paolo Bonzini149f54b2013-05-24 12:59:37 +0200258 /* Compute offset within MemoryRegionSection */
259 addr -= section->offset_within_address_space;
260
261 /* Compute offset within MemoryRegion */
262 *xlat = addr + section->offset_within_region;
263
264 diff = int128_sub(section->mr->size, int128_make64(addr));
Peter Maydell3752a032013-06-20 15:18:04 +0100265 *plen = int128_get64(int128_min(diff, int128_make64(*plen)));
Paolo Bonzini149f54b2013-05-24 12:59:37 +0200266 return section;
267}
Jan Kiszka90260c62013-05-26 21:46:51 +0200268
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +0200269MemoryRegion *address_space_translate(AddressSpace *as, hwaddr addr,
270 hwaddr *xlat, hwaddr *plen,
271 bool is_write)
Jan Kiszka90260c62013-05-26 21:46:51 +0200272{
Avi Kivity30951152012-10-30 13:47:46 +0200273 IOMMUTLBEntry iotlb;
274 MemoryRegionSection *section;
275 MemoryRegion *mr;
276 hwaddr len = *plen;
277
278 for (;;) {
279 section = address_space_translate_internal(as, addr, &addr, plen, true);
280 mr = section->mr;
281
282 if (!mr->iommu_ops) {
283 break;
284 }
285
286 iotlb = mr->iommu_ops->translate(mr, addr);
287 addr = ((iotlb.translated_addr & ~iotlb.addr_mask)
288 | (addr & iotlb.addr_mask));
289 len = MIN(len, (addr | iotlb.addr_mask) - addr + 1);
290 if (!(iotlb.perm & (1 << is_write))) {
291 mr = &io_mem_unassigned;
292 break;
293 }
294
295 as = iotlb.target_as;
296 }
297
298 *plen = len;
299 *xlat = addr;
300 return mr;
Jan Kiszka90260c62013-05-26 21:46:51 +0200301}
302
303MemoryRegionSection *
304address_space_translate_for_iotlb(AddressSpace *as, hwaddr addr, hwaddr *xlat,
305 hwaddr *plen)
306{
Avi Kivity30951152012-10-30 13:47:46 +0200307 MemoryRegionSection *section;
308 section = address_space_translate_internal(as, addr, xlat, plen, false);
309
310 assert(!section->mr->iommu_ops);
311 return section;
Jan Kiszka90260c62013-05-26 21:46:51 +0200312}
bellard9fa3e852004-01-04 18:06:42 +0000313#endif
bellardfd6ce8f2003-05-14 19:00:11 +0000314
Jan Kiszkad5ab9712011-08-02 16:10:21 +0200315void cpu_exec_init_all(void)
316{
317#if !defined(CONFIG_USER_ONLY)
Umesh Deshpandeb2a86582011-08-17 00:01:33 -0700318 qemu_mutex_init(&ram_list.mutex);
Jan Kiszkad5ab9712011-08-02 16:10:21 +0200319 memory_map_init();
320 io_mem_init();
321#endif
322}
323
Andreas Färberb170fce2013-01-20 20:23:22 +0100324#if !defined(CONFIG_USER_ONLY)
pbrook9656f322008-07-01 20:01:19 +0000325
Juan Quintelae59fb372009-09-29 22:48:21 +0200326static int cpu_common_post_load(void *opaque, int version_id)
Juan Quintelae7f4eff2009-09-10 03:04:33 +0200327{
Andreas Färber259186a2013-01-17 18:51:17 +0100328 CPUState *cpu = opaque;
Juan Quintelae7f4eff2009-09-10 03:04:33 +0200329
aurel323098dba2009-03-07 21:28:24 +0000330 /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the
331 version_id is increased. */
Andreas Färber259186a2013-01-17 18:51:17 +0100332 cpu->interrupt_request &= ~0x01;
333 tlb_flush(cpu->env_ptr, 1);
pbrook9656f322008-07-01 20:01:19 +0000334
335 return 0;
336}
Juan Quintelae7f4eff2009-09-10 03:04:33 +0200337
Andreas Färber1a1562f2013-06-17 04:09:11 +0200338const VMStateDescription vmstate_cpu_common = {
Juan Quintelae7f4eff2009-09-10 03:04:33 +0200339 .name = "cpu_common",
340 .version_id = 1,
341 .minimum_version_id = 1,
342 .minimum_version_id_old = 1,
Juan Quintelae7f4eff2009-09-10 03:04:33 +0200343 .post_load = cpu_common_post_load,
344 .fields = (VMStateField []) {
Andreas Färber259186a2013-01-17 18:51:17 +0100345 VMSTATE_UINT32(halted, CPUState),
346 VMSTATE_UINT32(interrupt_request, CPUState),
Juan Quintelae7f4eff2009-09-10 03:04:33 +0200347 VMSTATE_END_OF_LIST()
348 }
349};
Andreas Färber1a1562f2013-06-17 04:09:11 +0200350
pbrook9656f322008-07-01 20:01:19 +0000351#endif
352
Andreas Färber38d8f5c2012-12-17 19:47:15 +0100353CPUState *qemu_get_cpu(int index)
Glauber Costa950f1472009-06-09 12:15:18 -0400354{
Andreas Färber9349b4f2012-03-14 01:38:32 +0100355 CPUArchState *env = first_cpu;
Andreas Färber38d8f5c2012-12-17 19:47:15 +0100356 CPUState *cpu = NULL;
Glauber Costa950f1472009-06-09 12:15:18 -0400357
358 while (env) {
Andreas Färber55e5c282012-12-17 06:18:02 +0100359 cpu = ENV_GET_CPU(env);
360 if (cpu->cpu_index == index) {
Glauber Costa950f1472009-06-09 12:15:18 -0400361 break;
Andreas Färber55e5c282012-12-17 06:18:02 +0100362 }
Glauber Costa950f1472009-06-09 12:15:18 -0400363 env = env->next_cpu;
364 }
365
Igor Mammedovd76fdda2013-03-07 19:12:43 +0100366 return env ? cpu : NULL;
Glauber Costa950f1472009-06-09 12:15:18 -0400367}
368
Michael S. Tsirkind6b9e0d2013-04-24 22:58:04 +0200369void qemu_for_each_cpu(void (*func)(CPUState *cpu, void *data), void *data)
370{
371 CPUArchState *env = first_cpu;
372
373 while (env) {
374 func(ENV_GET_CPU(env), data);
375 env = env->next_cpu;
376 }
377}
378
Andreas Färber9349b4f2012-03-14 01:38:32 +0100379void cpu_exec_init(CPUArchState *env)
bellardfd6ce8f2003-05-14 19:00:11 +0000380{
Andreas Färber9f09e182012-05-03 06:59:07 +0200381 CPUState *cpu = ENV_GET_CPU(env);
Andreas Färberb170fce2013-01-20 20:23:22 +0100382 CPUClass *cc = CPU_GET_CLASS(cpu);
Andreas Färber9349b4f2012-03-14 01:38:32 +0100383 CPUArchState **penv;
bellard6a00d602005-11-21 23:25:50 +0000384 int cpu_index;
385
pbrookc2764712009-03-07 15:24:59 +0000386#if defined(CONFIG_USER_ONLY)
387 cpu_list_lock();
388#endif
bellard6a00d602005-11-21 23:25:50 +0000389 env->next_cpu = NULL;
390 penv = &first_cpu;
391 cpu_index = 0;
392 while (*penv != NULL) {
Nathan Froyd1e9fa732009-06-03 11:33:08 -0700393 penv = &(*penv)->next_cpu;
bellard6a00d602005-11-21 23:25:50 +0000394 cpu_index++;
395 }
Andreas Färber55e5c282012-12-17 06:18:02 +0100396 cpu->cpu_index = cpu_index;
Andreas Färber1b1ed8d2012-12-17 04:22:03 +0100397 cpu->numa_node = 0;
Blue Swirl72cf2d42009-09-12 07:36:22 +0000398 QTAILQ_INIT(&env->breakpoints);
399 QTAILQ_INIT(&env->watchpoints);
Jan Kiszkadc7a09c2011-03-15 12:26:31 +0100400#ifndef CONFIG_USER_ONLY
Andreas Färber9f09e182012-05-03 06:59:07 +0200401 cpu->thread_id = qemu_get_thread_id();
Jan Kiszkadc7a09c2011-03-15 12:26:31 +0100402#endif
bellard6a00d602005-11-21 23:25:50 +0000403 *penv = env;
pbrookc2764712009-03-07 15:24:59 +0000404#if defined(CONFIG_USER_ONLY)
405 cpu_list_unlock();
406#endif
Andreas Färber259186a2013-01-17 18:51:17 +0100407 vmstate_register(NULL, cpu_index, &vmstate_cpu_common, cpu);
pbrookb3c77242008-06-30 16:31:04 +0000408#if defined(CPU_SAVE_VERSION) && !defined(CONFIG_USER_ONLY)
Alex Williamson0be71e32010-06-25 11:09:07 -0600409 register_savevm(NULL, "cpu", cpu_index, CPU_SAVE_VERSION,
pbrookb3c77242008-06-30 16:31:04 +0000410 cpu_save, cpu_load, env);
Andreas Färberb170fce2013-01-20 20:23:22 +0100411 assert(cc->vmsd == NULL);
pbrookb3c77242008-06-30 16:31:04 +0000412#endif
Andreas Färberb170fce2013-01-20 20:23:22 +0100413 if (cc->vmsd != NULL) {
414 vmstate_register(NULL, cpu_index, cc->vmsd, cpu);
415 }
bellardfd6ce8f2003-05-14 19:00:11 +0000416}
417
bellard1fddef42005-04-17 19:16:13 +0000418#if defined(TARGET_HAS_ICE)
Paul Brook94df27f2010-02-28 23:47:45 +0000419#if defined(CONFIG_USER_ONLY)
Andreas Färber9349b4f2012-03-14 01:38:32 +0100420static void breakpoint_invalidate(CPUArchState *env, target_ulong pc)
Paul Brook94df27f2010-02-28 23:47:45 +0000421{
422 tb_invalidate_phys_page_range(pc, pc + 1, 0);
423}
424#else
Max Filippov1e7855a2012-04-10 02:48:17 +0400425static void breakpoint_invalidate(CPUArchState *env, target_ulong pc)
426{
Max Filippov9d70c4b2012-05-27 20:21:08 +0400427 tb_invalidate_phys_addr(cpu_get_phys_page_debug(env, pc) |
428 (pc & ~TARGET_PAGE_MASK));
Max Filippov1e7855a2012-04-10 02:48:17 +0400429}
bellardc27004e2005-01-03 23:35:10 +0000430#endif
Paul Brook94df27f2010-02-28 23:47:45 +0000431#endif /* TARGET_HAS_ICE */
bellardd720b932004-04-25 17:57:43 +0000432
Paul Brookc527ee82010-03-01 03:31:14 +0000433#if defined(CONFIG_USER_ONLY)
Andreas Färber9349b4f2012-03-14 01:38:32 +0100434void cpu_watchpoint_remove_all(CPUArchState *env, int mask)
Paul Brookc527ee82010-03-01 03:31:14 +0000435
436{
437}
438
Andreas Färber9349b4f2012-03-14 01:38:32 +0100439int cpu_watchpoint_insert(CPUArchState *env, target_ulong addr, target_ulong len,
Paul Brookc527ee82010-03-01 03:31:14 +0000440 int flags, CPUWatchpoint **watchpoint)
441{
442 return -ENOSYS;
443}
444#else
pbrook6658ffb2007-03-16 23:58:11 +0000445/* Add a watchpoint. */
Andreas Färber9349b4f2012-03-14 01:38:32 +0100446int cpu_watchpoint_insert(CPUArchState *env, target_ulong addr, target_ulong len,
aliguoria1d1bb32008-11-18 20:07:32 +0000447 int flags, CPUWatchpoint **watchpoint)
pbrook6658ffb2007-03-16 23:58:11 +0000448{
aliguorib4051332008-11-18 20:14:20 +0000449 target_ulong len_mask = ~(len - 1);
aliguoric0ce9982008-11-25 22:13:57 +0000450 CPUWatchpoint *wp;
pbrook6658ffb2007-03-16 23:58:11 +0000451
aliguorib4051332008-11-18 20:14:20 +0000452 /* sanity checks: allow power-of-2 lengths, deny unaligned watchpoints */
Max Filippov0dc23822012-01-29 03:15:23 +0400453 if ((len & (len - 1)) || (addr & ~len_mask) ||
454 len == 0 || len > TARGET_PAGE_SIZE) {
aliguorib4051332008-11-18 20:14:20 +0000455 fprintf(stderr, "qemu: tried to set invalid watchpoint at "
456 TARGET_FMT_lx ", len=" TARGET_FMT_lu "\n", addr, len);
457 return -EINVAL;
458 }
Anthony Liguori7267c092011-08-20 22:09:37 -0500459 wp = g_malloc(sizeof(*wp));
pbrook6658ffb2007-03-16 23:58:11 +0000460
aliguoria1d1bb32008-11-18 20:07:32 +0000461 wp->vaddr = addr;
aliguorib4051332008-11-18 20:14:20 +0000462 wp->len_mask = len_mask;
aliguoria1d1bb32008-11-18 20:07:32 +0000463 wp->flags = flags;
464
aliguori2dc9f412008-11-18 20:56:59 +0000465 /* keep all GDB-injected watchpoints in front */
aliguoric0ce9982008-11-25 22:13:57 +0000466 if (flags & BP_GDB)
Blue Swirl72cf2d42009-09-12 07:36:22 +0000467 QTAILQ_INSERT_HEAD(&env->watchpoints, wp, entry);
aliguoric0ce9982008-11-25 22:13:57 +0000468 else
Blue Swirl72cf2d42009-09-12 07:36:22 +0000469 QTAILQ_INSERT_TAIL(&env->watchpoints, wp, entry);
aliguoria1d1bb32008-11-18 20:07:32 +0000470
pbrook6658ffb2007-03-16 23:58:11 +0000471 tlb_flush_page(env, addr);
aliguoria1d1bb32008-11-18 20:07:32 +0000472
473 if (watchpoint)
474 *watchpoint = wp;
475 return 0;
pbrook6658ffb2007-03-16 23:58:11 +0000476}
477
aliguoria1d1bb32008-11-18 20:07:32 +0000478/* Remove a specific watchpoint. */
Andreas Färber9349b4f2012-03-14 01:38:32 +0100479int cpu_watchpoint_remove(CPUArchState *env, target_ulong addr, target_ulong len,
aliguoria1d1bb32008-11-18 20:07:32 +0000480 int flags)
pbrook6658ffb2007-03-16 23:58:11 +0000481{
aliguorib4051332008-11-18 20:14:20 +0000482 target_ulong len_mask = ~(len - 1);
aliguoria1d1bb32008-11-18 20:07:32 +0000483 CPUWatchpoint *wp;
pbrook6658ffb2007-03-16 23:58:11 +0000484
Blue Swirl72cf2d42009-09-12 07:36:22 +0000485 QTAILQ_FOREACH(wp, &env->watchpoints, entry) {
aliguorib4051332008-11-18 20:14:20 +0000486 if (addr == wp->vaddr && len_mask == wp->len_mask
aliguori6e140f22008-11-18 20:37:55 +0000487 && flags == (wp->flags & ~BP_WATCHPOINT_HIT)) {
aliguoria1d1bb32008-11-18 20:07:32 +0000488 cpu_watchpoint_remove_by_ref(env, wp);
pbrook6658ffb2007-03-16 23:58:11 +0000489 return 0;
490 }
491 }
aliguoria1d1bb32008-11-18 20:07:32 +0000492 return -ENOENT;
pbrook6658ffb2007-03-16 23:58:11 +0000493}
494
aliguoria1d1bb32008-11-18 20:07:32 +0000495/* Remove a specific watchpoint by reference. */
Andreas Färber9349b4f2012-03-14 01:38:32 +0100496void cpu_watchpoint_remove_by_ref(CPUArchState *env, CPUWatchpoint *watchpoint)
aliguoria1d1bb32008-11-18 20:07:32 +0000497{
Blue Swirl72cf2d42009-09-12 07:36:22 +0000498 QTAILQ_REMOVE(&env->watchpoints, watchpoint, entry);
edgar_igl7d03f822008-05-17 18:58:29 +0000499
aliguoria1d1bb32008-11-18 20:07:32 +0000500 tlb_flush_page(env, watchpoint->vaddr);
501
Anthony Liguori7267c092011-08-20 22:09:37 -0500502 g_free(watchpoint);
edgar_igl7d03f822008-05-17 18:58:29 +0000503}
504
aliguoria1d1bb32008-11-18 20:07:32 +0000505/* Remove all matching watchpoints. */
Andreas Färber9349b4f2012-03-14 01:38:32 +0100506void cpu_watchpoint_remove_all(CPUArchState *env, int mask)
aliguoria1d1bb32008-11-18 20:07:32 +0000507{
aliguoric0ce9982008-11-25 22:13:57 +0000508 CPUWatchpoint *wp, *next;
aliguoria1d1bb32008-11-18 20:07:32 +0000509
Blue Swirl72cf2d42009-09-12 07:36:22 +0000510 QTAILQ_FOREACH_SAFE(wp, &env->watchpoints, entry, next) {
aliguoria1d1bb32008-11-18 20:07:32 +0000511 if (wp->flags & mask)
512 cpu_watchpoint_remove_by_ref(env, wp);
aliguoric0ce9982008-11-25 22:13:57 +0000513 }
aliguoria1d1bb32008-11-18 20:07:32 +0000514}
Paul Brookc527ee82010-03-01 03:31:14 +0000515#endif
aliguoria1d1bb32008-11-18 20:07:32 +0000516
517/* Add a breakpoint. */
Andreas Färber9349b4f2012-03-14 01:38:32 +0100518int cpu_breakpoint_insert(CPUArchState *env, target_ulong pc, int flags,
aliguoria1d1bb32008-11-18 20:07:32 +0000519 CPUBreakpoint **breakpoint)
bellard4c3a88a2003-07-26 12:06:08 +0000520{
bellard1fddef42005-04-17 19:16:13 +0000521#if defined(TARGET_HAS_ICE)
aliguoric0ce9982008-11-25 22:13:57 +0000522 CPUBreakpoint *bp;
ths3b46e622007-09-17 08:09:54 +0000523
Anthony Liguori7267c092011-08-20 22:09:37 -0500524 bp = g_malloc(sizeof(*bp));
aliguoria1d1bb32008-11-18 20:07:32 +0000525
526 bp->pc = pc;
527 bp->flags = flags;
528
aliguori2dc9f412008-11-18 20:56:59 +0000529 /* keep all GDB-injected breakpoints in front */
aliguoric0ce9982008-11-25 22:13:57 +0000530 if (flags & BP_GDB)
Blue Swirl72cf2d42009-09-12 07:36:22 +0000531 QTAILQ_INSERT_HEAD(&env->breakpoints, bp, entry);
aliguoric0ce9982008-11-25 22:13:57 +0000532 else
Blue Swirl72cf2d42009-09-12 07:36:22 +0000533 QTAILQ_INSERT_TAIL(&env->breakpoints, bp, entry);
aliguoria1d1bb32008-11-18 20:07:32 +0000534
535 breakpoint_invalidate(env, pc);
536
537 if (breakpoint)
538 *breakpoint = bp;
539 return 0;
540#else
541 return -ENOSYS;
542#endif
543}
544
545/* Remove a specific breakpoint. */
Andreas Färber9349b4f2012-03-14 01:38:32 +0100546int cpu_breakpoint_remove(CPUArchState *env, target_ulong pc, int flags)
aliguoria1d1bb32008-11-18 20:07:32 +0000547{
548#if defined(TARGET_HAS_ICE)
549 CPUBreakpoint *bp;
550
Blue Swirl72cf2d42009-09-12 07:36:22 +0000551 QTAILQ_FOREACH(bp, &env->breakpoints, entry) {
aliguoria1d1bb32008-11-18 20:07:32 +0000552 if (bp->pc == pc && bp->flags == flags) {
553 cpu_breakpoint_remove_by_ref(env, bp);
bellard4c3a88a2003-07-26 12:06:08 +0000554 return 0;
aliguoria1d1bb32008-11-18 20:07:32 +0000555 }
bellard4c3a88a2003-07-26 12:06:08 +0000556 }
aliguoria1d1bb32008-11-18 20:07:32 +0000557 return -ENOENT;
bellard4c3a88a2003-07-26 12:06:08 +0000558#else
aliguoria1d1bb32008-11-18 20:07:32 +0000559 return -ENOSYS;
bellard4c3a88a2003-07-26 12:06:08 +0000560#endif
561}
562
aliguoria1d1bb32008-11-18 20:07:32 +0000563/* Remove a specific breakpoint by reference. */
Andreas Färber9349b4f2012-03-14 01:38:32 +0100564void cpu_breakpoint_remove_by_ref(CPUArchState *env, CPUBreakpoint *breakpoint)
bellard4c3a88a2003-07-26 12:06:08 +0000565{
bellard1fddef42005-04-17 19:16:13 +0000566#if defined(TARGET_HAS_ICE)
Blue Swirl72cf2d42009-09-12 07:36:22 +0000567 QTAILQ_REMOVE(&env->breakpoints, breakpoint, entry);
bellardd720b932004-04-25 17:57:43 +0000568
aliguoria1d1bb32008-11-18 20:07:32 +0000569 breakpoint_invalidate(env, breakpoint->pc);
570
Anthony Liguori7267c092011-08-20 22:09:37 -0500571 g_free(breakpoint);
aliguoria1d1bb32008-11-18 20:07:32 +0000572#endif
573}
574
575/* Remove all matching breakpoints. */
Andreas Färber9349b4f2012-03-14 01:38:32 +0100576void cpu_breakpoint_remove_all(CPUArchState *env, int mask)
aliguoria1d1bb32008-11-18 20:07:32 +0000577{
578#if defined(TARGET_HAS_ICE)
aliguoric0ce9982008-11-25 22:13:57 +0000579 CPUBreakpoint *bp, *next;
aliguoria1d1bb32008-11-18 20:07:32 +0000580
Blue Swirl72cf2d42009-09-12 07:36:22 +0000581 QTAILQ_FOREACH_SAFE(bp, &env->breakpoints, entry, next) {
aliguoria1d1bb32008-11-18 20:07:32 +0000582 if (bp->flags & mask)
583 cpu_breakpoint_remove_by_ref(env, bp);
aliguoric0ce9982008-11-25 22:13:57 +0000584 }
bellard4c3a88a2003-07-26 12:06:08 +0000585#endif
586}
587
bellardc33a3462003-07-29 20:50:33 +0000588/* enable or disable single step mode. EXCP_DEBUG is returned by the
589 CPU loop after each instruction */
Andreas Färber9349b4f2012-03-14 01:38:32 +0100590void cpu_single_step(CPUArchState *env, int enabled)
bellardc33a3462003-07-29 20:50:33 +0000591{
bellard1fddef42005-04-17 19:16:13 +0000592#if defined(TARGET_HAS_ICE)
bellardc33a3462003-07-29 20:50:33 +0000593 if (env->singlestep_enabled != enabled) {
594 env->singlestep_enabled = enabled;
aliguorie22a25c2009-03-12 20:12:48 +0000595 if (kvm_enabled())
596 kvm_update_guest_debug(env, 0);
597 else {
Stuart Bradyccbb4d42009-05-03 12:15:06 +0100598 /* must flush all the translated code to avoid inconsistencies */
aliguorie22a25c2009-03-12 20:12:48 +0000599 /* XXX: only flush what is necessary */
600 tb_flush(env);
601 }
bellardc33a3462003-07-29 20:50:33 +0000602 }
603#endif
604}
605
Andreas Färber9349b4f2012-03-14 01:38:32 +0100606void cpu_abort(CPUArchState *env, const char *fmt, ...)
bellard75012672003-06-21 13:11:07 +0000607{
Andreas Färber878096e2013-05-27 01:33:50 +0200608 CPUState *cpu = ENV_GET_CPU(env);
bellard75012672003-06-21 13:11:07 +0000609 va_list ap;
pbrook493ae1f2007-11-23 16:53:59 +0000610 va_list ap2;
bellard75012672003-06-21 13:11:07 +0000611
612 va_start(ap, fmt);
pbrook493ae1f2007-11-23 16:53:59 +0000613 va_copy(ap2, ap);
bellard75012672003-06-21 13:11:07 +0000614 fprintf(stderr, "qemu: fatal: ");
615 vfprintf(stderr, fmt, ap);
616 fprintf(stderr, "\n");
Andreas Färber878096e2013-05-27 01:33:50 +0200617 cpu_dump_state(cpu, stderr, fprintf, CPU_DUMP_FPU | CPU_DUMP_CCOP);
aliguori93fcfe32009-01-15 22:34:14 +0000618 if (qemu_log_enabled()) {
619 qemu_log("qemu: fatal: ");
620 qemu_log_vprintf(fmt, ap2);
621 qemu_log("\n");
Peter Maydell6fd2a022012-10-05 15:04:43 +0100622 log_cpu_state(env, CPU_DUMP_FPU | CPU_DUMP_CCOP);
aliguori31b1a7b2009-01-15 22:35:09 +0000623 qemu_log_flush();
aliguori93fcfe32009-01-15 22:34:14 +0000624 qemu_log_close();
balrog924edca2007-06-10 14:07:13 +0000625 }
pbrook493ae1f2007-11-23 16:53:59 +0000626 va_end(ap2);
j_mayerf9373292007-09-29 12:18:20 +0000627 va_end(ap);
Riku Voipiofd052bf2010-01-25 14:30:49 +0200628#if defined(CONFIG_USER_ONLY)
629 {
630 struct sigaction act;
631 sigfillset(&act.sa_mask);
632 act.sa_handler = SIG_DFL;
633 sigaction(SIGABRT, &act, NULL);
634 }
635#endif
bellard75012672003-06-21 13:11:07 +0000636 abort();
637}
638
Andreas Färber9349b4f2012-03-14 01:38:32 +0100639CPUArchState *cpu_copy(CPUArchState *env)
thsc5be9f02007-02-28 20:20:53 +0000640{
Andreas Färber9349b4f2012-03-14 01:38:32 +0100641 CPUArchState *new_env = cpu_init(env->cpu_model_str);
642 CPUArchState *next_cpu = new_env->next_cpu;
aliguori5a38f082009-01-15 20:16:51 +0000643#if defined(TARGET_HAS_ICE)
644 CPUBreakpoint *bp;
645 CPUWatchpoint *wp;
646#endif
647
Andreas Färber9349b4f2012-03-14 01:38:32 +0100648 memcpy(new_env, env, sizeof(CPUArchState));
aliguori5a38f082009-01-15 20:16:51 +0000649
Andreas Färber55e5c282012-12-17 06:18:02 +0100650 /* Preserve chaining. */
thsc5be9f02007-02-28 20:20:53 +0000651 new_env->next_cpu = next_cpu;
aliguori5a38f082009-01-15 20:16:51 +0000652
653 /* Clone all break/watchpoints.
654 Note: Once we support ptrace with hw-debug register access, make sure
655 BP_CPU break/watchpoints are handled correctly on clone. */
Blue Swirl72cf2d42009-09-12 07:36:22 +0000656 QTAILQ_INIT(&env->breakpoints);
657 QTAILQ_INIT(&env->watchpoints);
aliguori5a38f082009-01-15 20:16:51 +0000658#if defined(TARGET_HAS_ICE)
Blue Swirl72cf2d42009-09-12 07:36:22 +0000659 QTAILQ_FOREACH(bp, &env->breakpoints, entry) {
aliguori5a38f082009-01-15 20:16:51 +0000660 cpu_breakpoint_insert(new_env, bp->pc, bp->flags, NULL);
661 }
Blue Swirl72cf2d42009-09-12 07:36:22 +0000662 QTAILQ_FOREACH(wp, &env->watchpoints, entry) {
aliguori5a38f082009-01-15 20:16:51 +0000663 cpu_watchpoint_insert(new_env, wp->vaddr, (~wp->len_mask) + 1,
664 wp->flags, NULL);
665 }
666#endif
667
thsc5be9f02007-02-28 20:20:53 +0000668 return new_env;
669}
670
bellard01243112004-01-04 15:48:17 +0000671#if !defined(CONFIG_USER_ONLY)
Juan Quintelad24981d2012-05-22 00:42:40 +0200672static void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t end,
673 uintptr_t length)
bellard1ccde1c2004-02-06 19:46:14 +0000674{
Juan Quintelad24981d2012-05-22 00:42:40 +0200675 uintptr_t start1;
bellardf23db162005-08-21 19:12:28 +0000676
bellard1ccde1c2004-02-06 19:46:14 +0000677 /* we modify the TLB cache so that the dirty bit will be set again
678 when accessing the range */
Stefan Weil8efe0ca2012-04-12 15:42:19 +0200679 start1 = (uintptr_t)qemu_safe_ram_ptr(start);
Stefan Weila57d23e2011-04-30 22:49:26 +0200680 /* Check that we don't span multiple blocks - this breaks the
pbrook5579c7f2009-04-11 14:47:08 +0000681 address comparisons below. */
Stefan Weil8efe0ca2012-04-12 15:42:19 +0200682 if ((uintptr_t)qemu_safe_ram_ptr(end - 1) - start1
pbrook5579c7f2009-04-11 14:47:08 +0000683 != (end - 1) - start) {
684 abort();
685 }
Blue Swirle5548612012-04-21 13:08:33 +0000686 cpu_tlb_reset_dirty_all(start1, length);
Juan Quintelad24981d2012-05-22 00:42:40 +0200687
688}
689
690/* Note: start and end must be within the same ram block. */
691void cpu_physical_memory_reset_dirty(ram_addr_t start, ram_addr_t end,
692 int dirty_flags)
693{
694 uintptr_t length;
695
696 start &= TARGET_PAGE_MASK;
697 end = TARGET_PAGE_ALIGN(end);
698
699 length = end - start;
700 if (length == 0)
701 return;
702 cpu_physical_memory_mask_dirty_range(start, length, dirty_flags);
703
704 if (tcg_enabled()) {
705 tlb_reset_dirty_range_all(start, end, length);
706 }
bellard1ccde1c2004-02-06 19:46:14 +0000707}
708
Blue Swirl8b9c99d2012-10-28 11:04:51 +0000709static int cpu_physical_memory_set_dirty_tracking(int enable)
aliguori74576192008-10-06 14:02:03 +0000710{
Michael S. Tsirkinf6f3fbc2010-01-27 22:06:57 +0200711 int ret = 0;
aliguori74576192008-10-06 14:02:03 +0000712 in_migration = enable;
Michael S. Tsirkinf6f3fbc2010-01-27 22:06:57 +0200713 return ret;
aliguori74576192008-10-06 14:02:03 +0000714}
715
Avi Kivitya8170e52012-10-23 12:30:10 +0200716hwaddr memory_region_section_get_iotlb(CPUArchState *env,
Paolo Bonzini149f54b2013-05-24 12:59:37 +0200717 MemoryRegionSection *section,
718 target_ulong vaddr,
719 hwaddr paddr, hwaddr xlat,
720 int prot,
721 target_ulong *address)
Blue Swirle5548612012-04-21 13:08:33 +0000722{
Avi Kivitya8170e52012-10-23 12:30:10 +0200723 hwaddr iotlb;
Blue Swirle5548612012-04-21 13:08:33 +0000724 CPUWatchpoint *wp;
725
Blue Swirlcc5bea62012-04-14 14:56:48 +0000726 if (memory_region_is_ram(section->mr)) {
Blue Swirle5548612012-04-21 13:08:33 +0000727 /* Normal RAM. */
728 iotlb = (memory_region_get_ram_addr(section->mr) & TARGET_PAGE_MASK)
Paolo Bonzini149f54b2013-05-24 12:59:37 +0200729 + xlat;
Blue Swirle5548612012-04-21 13:08:33 +0000730 if (!section->readonly) {
Liu Ping Fanb41aac42013-05-29 11:09:17 +0200731 iotlb |= PHYS_SECTION_NOTDIRTY;
Blue Swirle5548612012-04-21 13:08:33 +0000732 } else {
Liu Ping Fanb41aac42013-05-29 11:09:17 +0200733 iotlb |= PHYS_SECTION_ROM;
Blue Swirle5548612012-04-21 13:08:33 +0000734 }
735 } else {
Paolo Bonzini0475d942013-05-29 12:28:21 +0200736 iotlb = section - address_space_memory.dispatch->sections;
Paolo Bonzini149f54b2013-05-24 12:59:37 +0200737 iotlb += xlat;
Blue Swirle5548612012-04-21 13:08:33 +0000738 }
739
740 /* Make accesses to pages with watchpoints go via the
741 watchpoint trap routines. */
742 QTAILQ_FOREACH(wp, &env->watchpoints, entry) {
743 if (vaddr == (wp->vaddr & TARGET_PAGE_MASK)) {
744 /* Avoid trapping reads of pages with a write breakpoint. */
745 if ((prot & PAGE_WRITE) || (wp->flags & BP_MEM_READ)) {
Liu Ping Fanb41aac42013-05-29 11:09:17 +0200746 iotlb = PHYS_SECTION_WATCH + paddr;
Blue Swirle5548612012-04-21 13:08:33 +0000747 *address |= TLB_MMIO;
748 break;
749 }
750 }
751 }
752
753 return iotlb;
754}
bellard9fa3e852004-01-04 18:06:42 +0000755#endif /* defined(CONFIG_USER_ONLY) */
756
pbrooke2eef172008-06-08 01:09:01 +0000757#if !defined(CONFIG_USER_ONLY)
pbrook8da3ff12008-12-01 18:59:50 +0000758
Anthony Liguoric227f092009-10-01 16:12:16 -0500759static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end,
Avi Kivity5312bd82012-02-12 18:32:55 +0200760 uint16_t section);
Jan Kiszkaacc9d802013-05-26 21:55:37 +0200761static subpage_t *subpage_init(AddressSpace *as, hwaddr base);
Avi Kivity54688b12012-02-09 17:34:32 +0200762
Avi Kivity5312bd82012-02-12 18:32:55 +0200763static uint16_t phys_section_add(MemoryRegionSection *section)
764{
Paolo Bonzini68f3f652013-05-07 11:30:23 +0200765 /* The physical section number is ORed with a page-aligned
766 * pointer to produce the iotlb entries. Thus it should
767 * never overflow into the page-aligned value.
768 */
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200769 assert(next_map.sections_nb < TARGET_PAGE_SIZE);
Paolo Bonzini68f3f652013-05-07 11:30:23 +0200770
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200771 if (next_map.sections_nb == next_map.sections_nb_alloc) {
772 next_map.sections_nb_alloc = MAX(next_map.sections_nb_alloc * 2,
773 16);
774 next_map.sections = g_renew(MemoryRegionSection, next_map.sections,
775 next_map.sections_nb_alloc);
Avi Kivity5312bd82012-02-12 18:32:55 +0200776 }
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200777 next_map.sections[next_map.sections_nb] = *section;
Paolo Bonzinidfde4e62013-05-06 10:46:11 +0200778 memory_region_ref(section->mr);
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200779 return next_map.sections_nb++;
Avi Kivity5312bd82012-02-12 18:32:55 +0200780}
781
Paolo Bonzini058bc4b2013-06-25 09:30:48 +0200782static void phys_section_destroy(MemoryRegion *mr)
783{
Paolo Bonzinidfde4e62013-05-06 10:46:11 +0200784 memory_region_unref(mr);
785
Paolo Bonzini058bc4b2013-06-25 09:30:48 +0200786 if (mr->subpage) {
787 subpage_t *subpage = container_of(mr, subpage_t, iomem);
788 memory_region_destroy(&subpage->iomem);
789 g_free(subpage);
790 }
791}
792
Paolo Bonzini60926662013-05-29 12:30:26 +0200793static void phys_sections_free(PhysPageMap *map)
Avi Kivity5312bd82012-02-12 18:32:55 +0200794{
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200795 while (map->sections_nb > 0) {
796 MemoryRegionSection *section = &map->sections[--map->sections_nb];
Paolo Bonzini058bc4b2013-06-25 09:30:48 +0200797 phys_section_destroy(section->mr);
798 }
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200799 g_free(map->sections);
800 g_free(map->nodes);
Paolo Bonzini60926662013-05-29 12:30:26 +0200801 g_free(map);
Avi Kivity5312bd82012-02-12 18:32:55 +0200802}
803
Avi Kivityac1970f2012-10-03 16:22:53 +0200804static void register_subpage(AddressSpaceDispatch *d, MemoryRegionSection *section)
Avi Kivity0f0cb162012-02-13 17:14:32 +0200805{
806 subpage_t *subpage;
Avi Kivitya8170e52012-10-23 12:30:10 +0200807 hwaddr base = section->offset_within_address_space
Avi Kivity0f0cb162012-02-13 17:14:32 +0200808 & TARGET_PAGE_MASK;
Paolo Bonzini9affd6f2013-05-29 12:09:47 +0200809 MemoryRegionSection *existing = phys_page_find(d->phys_map, base >> TARGET_PAGE_BITS,
810 next_map.nodes, next_map.sections);
Avi Kivity0f0cb162012-02-13 17:14:32 +0200811 MemoryRegionSection subsection = {
812 .offset_within_address_space = base,
Paolo Bonzini052e87b2013-05-27 10:08:27 +0200813 .size = int128_make64(TARGET_PAGE_SIZE),
Avi Kivity0f0cb162012-02-13 17:14:32 +0200814 };
Avi Kivitya8170e52012-10-23 12:30:10 +0200815 hwaddr start, end;
Avi Kivity0f0cb162012-02-13 17:14:32 +0200816
Avi Kivityf3705d52012-03-08 16:16:34 +0200817 assert(existing->mr->subpage || existing->mr == &io_mem_unassigned);
Avi Kivity0f0cb162012-02-13 17:14:32 +0200818
Avi Kivityf3705d52012-03-08 16:16:34 +0200819 if (!(existing->mr->subpage)) {
Jan Kiszkaacc9d802013-05-26 21:55:37 +0200820 subpage = subpage_init(d->as, base);
Avi Kivity0f0cb162012-02-13 17:14:32 +0200821 subsection.mr = &subpage->iomem;
Avi Kivityac1970f2012-10-03 16:22:53 +0200822 phys_page_set(d, base >> TARGET_PAGE_BITS, 1,
Avi Kivity29990972012-02-13 20:21:20 +0200823 phys_section_add(&subsection));
Avi Kivity0f0cb162012-02-13 17:14:32 +0200824 } else {
Avi Kivityf3705d52012-03-08 16:16:34 +0200825 subpage = container_of(existing->mr, subpage_t, iomem);
Avi Kivity0f0cb162012-02-13 17:14:32 +0200826 }
827 start = section->offset_within_address_space & ~TARGET_PAGE_MASK;
Paolo Bonzini052e87b2013-05-27 10:08:27 +0200828 end = start + int128_get64(section->size) - 1;
Avi Kivity0f0cb162012-02-13 17:14:32 +0200829 subpage_register(subpage, start, end, phys_section_add(section));
830}
831
832
Paolo Bonzini052e87b2013-05-27 10:08:27 +0200833static void register_multipage(AddressSpaceDispatch *d,
834 MemoryRegionSection *section)
bellard33417e72003-08-10 21:47:01 +0000835{
Avi Kivitya8170e52012-10-23 12:30:10 +0200836 hwaddr start_addr = section->offset_within_address_space;
Avi Kivity5312bd82012-02-12 18:32:55 +0200837 uint16_t section_index = phys_section_add(section);
Paolo Bonzini052e87b2013-05-27 10:08:27 +0200838 uint64_t num_pages = int128_get64(int128_rshift(section->size,
839 TARGET_PAGE_BITS));
Avi Kivitydd811242012-01-02 12:17:03 +0200840
Paolo Bonzini733d5ef2013-05-27 10:47:10 +0200841 assert(num_pages);
842 phys_page_set(d, start_addr >> TARGET_PAGE_BITS, num_pages, section_index);
bellard33417e72003-08-10 21:47:01 +0000843}
844
Avi Kivityac1970f2012-10-03 16:22:53 +0200845static void mem_add(MemoryListener *listener, MemoryRegionSection *section)
Avi Kivity0f0cb162012-02-13 17:14:32 +0200846{
Paolo Bonzini89ae3372013-06-02 10:39:07 +0200847 AddressSpace *as = container_of(listener, AddressSpace, dispatch_listener);
Paolo Bonzini00752702013-05-29 12:13:54 +0200848 AddressSpaceDispatch *d = as->next_dispatch;
Paolo Bonzini99b9cc02013-05-27 13:18:01 +0200849 MemoryRegionSection now = *section, remain = *section;
Paolo Bonzini052e87b2013-05-27 10:08:27 +0200850 Int128 page_size = int128_make64(TARGET_PAGE_SIZE);
Avi Kivity0f0cb162012-02-13 17:14:32 +0200851
Paolo Bonzini733d5ef2013-05-27 10:47:10 +0200852 if (now.offset_within_address_space & ~TARGET_PAGE_MASK) {
853 uint64_t left = TARGET_PAGE_ALIGN(now.offset_within_address_space)
854 - now.offset_within_address_space;
855
Paolo Bonzini052e87b2013-05-27 10:08:27 +0200856 now.size = int128_min(int128_make64(left), now.size);
Avi Kivityac1970f2012-10-03 16:22:53 +0200857 register_subpage(d, &now);
Paolo Bonzini733d5ef2013-05-27 10:47:10 +0200858 } else {
Paolo Bonzini052e87b2013-05-27 10:08:27 +0200859 now.size = int128_zero();
Paolo Bonzini733d5ef2013-05-27 10:47:10 +0200860 }
Paolo Bonzini052e87b2013-05-27 10:08:27 +0200861 while (int128_ne(remain.size, now.size)) {
862 remain.size = int128_sub(remain.size, now.size);
863 remain.offset_within_address_space += int128_get64(now.size);
864 remain.offset_within_region += int128_get64(now.size);
Tyler Hall69b67642012-07-25 18:45:04 -0400865 now = remain;
Paolo Bonzini052e87b2013-05-27 10:08:27 +0200866 if (int128_lt(remain.size, page_size)) {
Paolo Bonzini733d5ef2013-05-27 10:47:10 +0200867 register_subpage(d, &now);
868 } else if (remain.offset_within_region & ~TARGET_PAGE_MASK) {
Paolo Bonzini052e87b2013-05-27 10:08:27 +0200869 now.size = page_size;
Avi Kivityac1970f2012-10-03 16:22:53 +0200870 register_subpage(d, &now);
Tyler Hall69b67642012-07-25 18:45:04 -0400871 } else {
Paolo Bonzini052e87b2013-05-27 10:08:27 +0200872 now.size = int128_and(now.size, int128_neg(page_size));
Avi Kivityac1970f2012-10-03 16:22:53 +0200873 register_multipage(d, &now);
Tyler Hall69b67642012-07-25 18:45:04 -0400874 }
Avi Kivity0f0cb162012-02-13 17:14:32 +0200875 }
876}
877
Sheng Yang62a27442010-01-26 19:21:16 +0800878void qemu_flush_coalesced_mmio_buffer(void)
879{
880 if (kvm_enabled())
881 kvm_flush_coalesced_mmio_buffer();
882}
883
Umesh Deshpandeb2a86582011-08-17 00:01:33 -0700884void qemu_mutex_lock_ramlist(void)
885{
886 qemu_mutex_lock(&ram_list.mutex);
887}
888
889void qemu_mutex_unlock_ramlist(void)
890{
891 qemu_mutex_unlock(&ram_list.mutex);
892}
893
Marcelo Tosattic9027602010-03-01 20:25:08 -0300894#if defined(__linux__) && !defined(TARGET_S390X)
895
896#include <sys/vfs.h>
897
898#define HUGETLBFS_MAGIC 0x958458f6
899
900static long gethugepagesize(const char *path)
901{
902 struct statfs fs;
903 int ret;
904
905 do {
Yoshiaki Tamura9742bf22010-08-18 13:30:13 +0900906 ret = statfs(path, &fs);
Marcelo Tosattic9027602010-03-01 20:25:08 -0300907 } while (ret != 0 && errno == EINTR);
908
909 if (ret != 0) {
Yoshiaki Tamura9742bf22010-08-18 13:30:13 +0900910 perror(path);
911 return 0;
Marcelo Tosattic9027602010-03-01 20:25:08 -0300912 }
913
914 if (fs.f_type != HUGETLBFS_MAGIC)
Yoshiaki Tamura9742bf22010-08-18 13:30:13 +0900915 fprintf(stderr, "Warning: path not on HugeTLBFS: %s\n", path);
Marcelo Tosattic9027602010-03-01 20:25:08 -0300916
917 return fs.f_bsize;
918}
919
Alex Williamson04b16652010-07-02 11:13:17 -0600920static void *file_ram_alloc(RAMBlock *block,
921 ram_addr_t memory,
922 const char *path)
Marcelo Tosattic9027602010-03-01 20:25:08 -0300923{
924 char *filename;
Peter Feiner8ca761f2013-03-04 13:54:25 -0500925 char *sanitized_name;
926 char *c;
Marcelo Tosattic9027602010-03-01 20:25:08 -0300927 void *area;
928 int fd;
929#ifdef MAP_POPULATE
930 int flags;
931#endif
932 unsigned long hpagesize;
933
934 hpagesize = gethugepagesize(path);
935 if (!hpagesize) {
Yoshiaki Tamura9742bf22010-08-18 13:30:13 +0900936 return NULL;
Marcelo Tosattic9027602010-03-01 20:25:08 -0300937 }
938
939 if (memory < hpagesize) {
940 return NULL;
941 }
942
943 if (kvm_enabled() && !kvm_has_sync_mmu()) {
944 fprintf(stderr, "host lacks kvm mmu notifiers, -mem-path unsupported\n");
945 return NULL;
946 }
947
Peter Feiner8ca761f2013-03-04 13:54:25 -0500948 /* Make name safe to use with mkstemp by replacing '/' with '_'. */
949 sanitized_name = g_strdup(block->mr->name);
950 for (c = sanitized_name; *c != '\0'; c++) {
951 if (*c == '/')
952 *c = '_';
953 }
954
955 filename = g_strdup_printf("%s/qemu_back_mem.%s.XXXXXX", path,
956 sanitized_name);
957 g_free(sanitized_name);
Marcelo Tosattic9027602010-03-01 20:25:08 -0300958
959 fd = mkstemp(filename);
960 if (fd < 0) {
Yoshiaki Tamura9742bf22010-08-18 13:30:13 +0900961 perror("unable to create backing store for hugepages");
Stefan Weile4ada482013-01-16 18:37:23 +0100962 g_free(filename);
Yoshiaki Tamura9742bf22010-08-18 13:30:13 +0900963 return NULL;
Marcelo Tosattic9027602010-03-01 20:25:08 -0300964 }
965 unlink(filename);
Stefan Weile4ada482013-01-16 18:37:23 +0100966 g_free(filename);
Marcelo Tosattic9027602010-03-01 20:25:08 -0300967
968 memory = (memory+hpagesize-1) & ~(hpagesize-1);
969
970 /*
971 * ftruncate is not supported by hugetlbfs in older
972 * hosts, so don't bother bailing out on errors.
973 * If anything goes wrong with it under other filesystems,
974 * mmap will fail.
975 */
976 if (ftruncate(fd, memory))
Yoshiaki Tamura9742bf22010-08-18 13:30:13 +0900977 perror("ftruncate");
Marcelo Tosattic9027602010-03-01 20:25:08 -0300978
979#ifdef MAP_POPULATE
980 /* NB: MAP_POPULATE won't exhaustively alloc all phys pages in the case
981 * MAP_PRIVATE is requested. For mem_prealloc we mmap as MAP_SHARED
982 * to sidestep this quirk.
983 */
984 flags = mem_prealloc ? MAP_POPULATE | MAP_SHARED : MAP_PRIVATE;
985 area = mmap(0, memory, PROT_READ | PROT_WRITE, flags, fd, 0);
986#else
987 area = mmap(0, memory, PROT_READ | PROT_WRITE, MAP_PRIVATE, fd, 0);
988#endif
989 if (area == MAP_FAILED) {
Yoshiaki Tamura9742bf22010-08-18 13:30:13 +0900990 perror("file_ram_alloc: can't mmap RAM pages");
991 close(fd);
992 return (NULL);
Marcelo Tosattic9027602010-03-01 20:25:08 -0300993 }
Alex Williamson04b16652010-07-02 11:13:17 -0600994 block->fd = fd;
Marcelo Tosattic9027602010-03-01 20:25:08 -0300995 return area;
996}
997#endif
998
Alex Williamsond17b5282010-06-25 11:08:38 -0600999static ram_addr_t find_ram_offset(ram_addr_t size)
1000{
Alex Williamson04b16652010-07-02 11:13:17 -06001001 RAMBlock *block, *next_block;
Alex Williamson3e837b22011-10-31 08:54:09 -06001002 ram_addr_t offset = RAM_ADDR_MAX, mingap = RAM_ADDR_MAX;
Alex Williamson04b16652010-07-02 11:13:17 -06001003
Stefan Hajnoczi49cd9ac2013-03-11 10:20:21 +01001004 assert(size != 0); /* it would hand out same offset multiple times */
1005
Paolo Bonzinia3161032012-11-14 15:54:48 +01001006 if (QTAILQ_EMPTY(&ram_list.blocks))
Alex Williamson04b16652010-07-02 11:13:17 -06001007 return 0;
1008
Paolo Bonzinia3161032012-11-14 15:54:48 +01001009 QTAILQ_FOREACH(block, &ram_list.blocks, next) {
Anthony PERARDf15fbc42011-07-20 08:17:42 +00001010 ram_addr_t end, next = RAM_ADDR_MAX;
Alex Williamson04b16652010-07-02 11:13:17 -06001011
1012 end = block->offset + block->length;
1013
Paolo Bonzinia3161032012-11-14 15:54:48 +01001014 QTAILQ_FOREACH(next_block, &ram_list.blocks, next) {
Alex Williamson04b16652010-07-02 11:13:17 -06001015 if (next_block->offset >= end) {
1016 next = MIN(next, next_block->offset);
1017 }
1018 }
1019 if (next - end >= size && next - end < mingap) {
Alex Williamson3e837b22011-10-31 08:54:09 -06001020 offset = end;
Alex Williamson04b16652010-07-02 11:13:17 -06001021 mingap = next - end;
1022 }
1023 }
Alex Williamson3e837b22011-10-31 08:54:09 -06001024
1025 if (offset == RAM_ADDR_MAX) {
1026 fprintf(stderr, "Failed to find gap of requested size: %" PRIu64 "\n",
1027 (uint64_t)size);
1028 abort();
1029 }
1030
Alex Williamson04b16652010-07-02 11:13:17 -06001031 return offset;
1032}
1033
Juan Quintela652d7ec2012-07-20 10:37:54 +02001034ram_addr_t last_ram_offset(void)
Alex Williamson04b16652010-07-02 11:13:17 -06001035{
Alex Williamsond17b5282010-06-25 11:08:38 -06001036 RAMBlock *block;
1037 ram_addr_t last = 0;
1038
Paolo Bonzinia3161032012-11-14 15:54:48 +01001039 QTAILQ_FOREACH(block, &ram_list.blocks, next)
Alex Williamsond17b5282010-06-25 11:08:38 -06001040 last = MAX(last, block->offset + block->length);
1041
1042 return last;
1043}
1044
Jason Baronddb97f12012-08-02 15:44:16 -04001045static void qemu_ram_setup_dump(void *addr, ram_addr_t size)
1046{
1047 int ret;
1048 QemuOpts *machine_opts;
1049
1050 /* Use MADV_DONTDUMP, if user doesn't want the guest memory in the core */
1051 machine_opts = qemu_opts_find(qemu_find_opts("machine"), 0);
1052 if (machine_opts &&
1053 !qemu_opt_get_bool(machine_opts, "dump-guest-core", true)) {
1054 ret = qemu_madvise(addr, size, QEMU_MADV_DONTDUMP);
1055 if (ret) {
1056 perror("qemu_madvise");
1057 fprintf(stderr, "madvise doesn't support MADV_DONTDUMP, "
1058 "but dump_guest_core=off specified\n");
1059 }
1060 }
1061}
1062
Avi Kivityc5705a72011-12-20 15:59:12 +02001063void qemu_ram_set_idstr(ram_addr_t addr, const char *name, DeviceState *dev)
Cam Macdonell84b89d72010-07-26 18:10:57 -06001064{
1065 RAMBlock *new_block, *block;
1066
Avi Kivityc5705a72011-12-20 15:59:12 +02001067 new_block = NULL;
Paolo Bonzinia3161032012-11-14 15:54:48 +01001068 QTAILQ_FOREACH(block, &ram_list.blocks, next) {
Avi Kivityc5705a72011-12-20 15:59:12 +02001069 if (block->offset == addr) {
1070 new_block = block;
1071 break;
1072 }
1073 }
1074 assert(new_block);
1075 assert(!new_block->idstr[0]);
Cam Macdonell84b89d72010-07-26 18:10:57 -06001076
Anthony Liguori09e5ab62012-02-03 12:28:43 -06001077 if (dev) {
1078 char *id = qdev_get_dev_path(dev);
Cam Macdonell84b89d72010-07-26 18:10:57 -06001079 if (id) {
1080 snprintf(new_block->idstr, sizeof(new_block->idstr), "%s/", id);
Anthony Liguori7267c092011-08-20 22:09:37 -05001081 g_free(id);
Cam Macdonell84b89d72010-07-26 18:10:57 -06001082 }
1083 }
1084 pstrcat(new_block->idstr, sizeof(new_block->idstr), name);
1085
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07001086 /* This assumes the iothread lock is taken here too. */
1087 qemu_mutex_lock_ramlist();
Paolo Bonzinia3161032012-11-14 15:54:48 +01001088 QTAILQ_FOREACH(block, &ram_list.blocks, next) {
Avi Kivityc5705a72011-12-20 15:59:12 +02001089 if (block != new_block && !strcmp(block->idstr, new_block->idstr)) {
Cam Macdonell84b89d72010-07-26 18:10:57 -06001090 fprintf(stderr, "RAMBlock \"%s\" already registered, abort!\n",
1091 new_block->idstr);
1092 abort();
1093 }
1094 }
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07001095 qemu_mutex_unlock_ramlist();
Avi Kivityc5705a72011-12-20 15:59:12 +02001096}
1097
Luiz Capitulino8490fc72012-09-05 16:50:16 -03001098static int memory_try_enable_merging(void *addr, size_t len)
1099{
1100 QemuOpts *opts;
1101
1102 opts = qemu_opts_find(qemu_find_opts("machine"), 0);
1103 if (opts && !qemu_opt_get_bool(opts, "mem-merge", true)) {
1104 /* disabled by the user */
1105 return 0;
1106 }
1107
1108 return qemu_madvise(addr, len, QEMU_MADV_MERGEABLE);
1109}
1110
Avi Kivityc5705a72011-12-20 15:59:12 +02001111ram_addr_t qemu_ram_alloc_from_ptr(ram_addr_t size, void *host,
1112 MemoryRegion *mr)
1113{
Paolo Bonziniabb26d62012-11-14 16:00:51 +01001114 RAMBlock *block, *new_block;
Avi Kivityc5705a72011-12-20 15:59:12 +02001115
1116 size = TARGET_PAGE_ALIGN(size);
1117 new_block = g_malloc0(sizeof(*new_block));
Cam Macdonell84b89d72010-07-26 18:10:57 -06001118
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07001119 /* This assumes the iothread lock is taken here too. */
1120 qemu_mutex_lock_ramlist();
Avi Kivity7c637362011-12-21 13:09:49 +02001121 new_block->mr = mr;
Jun Nakajima432d2682010-08-31 16:41:25 +01001122 new_block->offset = find_ram_offset(size);
Yoshiaki Tamura6977dfe2010-08-18 15:41:49 +09001123 if (host) {
1124 new_block->host = host;
Huang Yingcd19cfa2011-03-02 08:56:19 +01001125 new_block->flags |= RAM_PREALLOC_MASK;
Yoshiaki Tamura6977dfe2010-08-18 15:41:49 +09001126 } else {
1127 if (mem_path) {
1128#if defined (__linux__) && !defined(TARGET_S390X)
1129 new_block->host = file_ram_alloc(new_block, size, mem_path);
1130 if (!new_block->host) {
Paolo Bonzini6eebf952013-05-13 16:19:55 +02001131 new_block->host = qemu_anon_ram_alloc(size);
Luiz Capitulino8490fc72012-09-05 16:50:16 -03001132 memory_try_enable_merging(new_block->host, size);
Yoshiaki Tamura6977dfe2010-08-18 15:41:49 +09001133 }
1134#else
1135 fprintf(stderr, "-mem-path option unsupported\n");
1136 exit(1);
1137#endif
1138 } else {
Jan Kiszka868bb332011-06-21 22:59:09 +02001139 if (xen_enabled()) {
Avi Kivityfce537d2011-12-18 15:48:55 +02001140 xen_ram_alloc(new_block->offset, size, mr);
Christian Borntraegerfdec9912012-06-15 05:10:30 +00001141 } else if (kvm_enabled()) {
1142 /* some s390/kvm configurations have special constraints */
Paolo Bonzini6eebf952013-05-13 16:19:55 +02001143 new_block->host = kvm_ram_alloc(size);
Jun Nakajima432d2682010-08-31 16:41:25 +01001144 } else {
Paolo Bonzini6eebf952013-05-13 16:19:55 +02001145 new_block->host = qemu_anon_ram_alloc(size);
Jun Nakajima432d2682010-08-31 16:41:25 +01001146 }
Luiz Capitulino8490fc72012-09-05 16:50:16 -03001147 memory_try_enable_merging(new_block->host, size);
Yoshiaki Tamura6977dfe2010-08-18 15:41:49 +09001148 }
1149 }
Cam Macdonell84b89d72010-07-26 18:10:57 -06001150 new_block->length = size;
1151
Paolo Bonziniabb26d62012-11-14 16:00:51 +01001152 /* Keep the list sorted from biggest to smallest block. */
1153 QTAILQ_FOREACH(block, &ram_list.blocks, next) {
1154 if (block->length < new_block->length) {
1155 break;
1156 }
1157 }
1158 if (block) {
1159 QTAILQ_INSERT_BEFORE(block, new_block, next);
1160 } else {
1161 QTAILQ_INSERT_TAIL(&ram_list.blocks, new_block, next);
1162 }
Paolo Bonzini0d6d3c82012-11-14 15:45:02 +01001163 ram_list.mru_block = NULL;
Cam Macdonell84b89d72010-07-26 18:10:57 -06001164
Umesh Deshpandef798b072011-08-18 11:41:17 -07001165 ram_list.version++;
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07001166 qemu_mutex_unlock_ramlist();
Umesh Deshpandef798b072011-08-18 11:41:17 -07001167
Anthony Liguori7267c092011-08-20 22:09:37 -05001168 ram_list.phys_dirty = g_realloc(ram_list.phys_dirty,
Cam Macdonell84b89d72010-07-26 18:10:57 -06001169 last_ram_offset() >> TARGET_PAGE_BITS);
Igor Mitsyanko5fda0432012-08-10 18:45:11 +04001170 memset(ram_list.phys_dirty + (new_block->offset >> TARGET_PAGE_BITS),
1171 0, size >> TARGET_PAGE_BITS);
Juan Quintela1720aee2012-06-22 13:14:17 +02001172 cpu_physical_memory_set_dirty_range(new_block->offset, size, 0xff);
Cam Macdonell84b89d72010-07-26 18:10:57 -06001173
Jason Baronddb97f12012-08-02 15:44:16 -04001174 qemu_ram_setup_dump(new_block->host, size);
Luiz Capitulinoad0b5322012-10-05 16:47:57 -03001175 qemu_madvise(new_block->host, size, QEMU_MADV_HUGEPAGE);
Jason Baronddb97f12012-08-02 15:44:16 -04001176
Cam Macdonell84b89d72010-07-26 18:10:57 -06001177 if (kvm_enabled())
1178 kvm_setup_guest_memory(new_block->host, size);
1179
1180 return new_block->offset;
1181}
1182
Avi Kivityc5705a72011-12-20 15:59:12 +02001183ram_addr_t qemu_ram_alloc(ram_addr_t size, MemoryRegion *mr)
pbrook94a6b542009-04-11 17:15:54 +00001184{
Avi Kivityc5705a72011-12-20 15:59:12 +02001185 return qemu_ram_alloc_from_ptr(size, NULL, mr);
pbrook94a6b542009-04-11 17:15:54 +00001186}
bellarde9a1ab12007-02-08 23:08:38 +00001187
Alex Williamson1f2e98b2011-05-03 12:48:09 -06001188void qemu_ram_free_from_ptr(ram_addr_t addr)
1189{
1190 RAMBlock *block;
1191
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07001192 /* This assumes the iothread lock is taken here too. */
1193 qemu_mutex_lock_ramlist();
Paolo Bonzinia3161032012-11-14 15:54:48 +01001194 QTAILQ_FOREACH(block, &ram_list.blocks, next) {
Alex Williamson1f2e98b2011-05-03 12:48:09 -06001195 if (addr == block->offset) {
Paolo Bonzinia3161032012-11-14 15:54:48 +01001196 QTAILQ_REMOVE(&ram_list.blocks, block, next);
Paolo Bonzini0d6d3c82012-11-14 15:45:02 +01001197 ram_list.mru_block = NULL;
Umesh Deshpandef798b072011-08-18 11:41:17 -07001198 ram_list.version++;
Anthony Liguori7267c092011-08-20 22:09:37 -05001199 g_free(block);
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07001200 break;
Alex Williamson1f2e98b2011-05-03 12:48:09 -06001201 }
1202 }
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07001203 qemu_mutex_unlock_ramlist();
Alex Williamson1f2e98b2011-05-03 12:48:09 -06001204}
1205
Anthony Liguoric227f092009-10-01 16:12:16 -05001206void qemu_ram_free(ram_addr_t addr)
bellarde9a1ab12007-02-08 23:08:38 +00001207{
Alex Williamson04b16652010-07-02 11:13:17 -06001208 RAMBlock *block;
1209
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07001210 /* This assumes the iothread lock is taken here too. */
1211 qemu_mutex_lock_ramlist();
Paolo Bonzinia3161032012-11-14 15:54:48 +01001212 QTAILQ_FOREACH(block, &ram_list.blocks, next) {
Alex Williamson04b16652010-07-02 11:13:17 -06001213 if (addr == block->offset) {
Paolo Bonzinia3161032012-11-14 15:54:48 +01001214 QTAILQ_REMOVE(&ram_list.blocks, block, next);
Paolo Bonzini0d6d3c82012-11-14 15:45:02 +01001215 ram_list.mru_block = NULL;
Umesh Deshpandef798b072011-08-18 11:41:17 -07001216 ram_list.version++;
Huang Yingcd19cfa2011-03-02 08:56:19 +01001217 if (block->flags & RAM_PREALLOC_MASK) {
1218 ;
1219 } else if (mem_path) {
Alex Williamson04b16652010-07-02 11:13:17 -06001220#if defined (__linux__) && !defined(TARGET_S390X)
1221 if (block->fd) {
1222 munmap(block->host, block->length);
1223 close(block->fd);
1224 } else {
Paolo Bonzinie7a09b92013-05-13 16:19:56 +02001225 qemu_anon_ram_free(block->host, block->length);
Alex Williamson04b16652010-07-02 11:13:17 -06001226 }
Jan Kiszkafd28aa12011-03-15 12:26:14 +01001227#else
1228 abort();
Alex Williamson04b16652010-07-02 11:13:17 -06001229#endif
1230 } else {
Jan Kiszka868bb332011-06-21 22:59:09 +02001231 if (xen_enabled()) {
Jan Kiszkae41d7c62011-06-21 22:59:08 +02001232 xen_invalidate_map_cache_entry(block->host);
Jun Nakajima432d2682010-08-31 16:41:25 +01001233 } else {
Paolo Bonzinie7a09b92013-05-13 16:19:56 +02001234 qemu_anon_ram_free(block->host, block->length);
Jun Nakajima432d2682010-08-31 16:41:25 +01001235 }
Alex Williamson04b16652010-07-02 11:13:17 -06001236 }
Anthony Liguori7267c092011-08-20 22:09:37 -05001237 g_free(block);
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07001238 break;
Alex Williamson04b16652010-07-02 11:13:17 -06001239 }
1240 }
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07001241 qemu_mutex_unlock_ramlist();
Alex Williamson04b16652010-07-02 11:13:17 -06001242
bellarde9a1ab12007-02-08 23:08:38 +00001243}
1244
Huang Yingcd19cfa2011-03-02 08:56:19 +01001245#ifndef _WIN32
1246void qemu_ram_remap(ram_addr_t addr, ram_addr_t length)
1247{
1248 RAMBlock *block;
1249 ram_addr_t offset;
1250 int flags;
1251 void *area, *vaddr;
1252
Paolo Bonzinia3161032012-11-14 15:54:48 +01001253 QTAILQ_FOREACH(block, &ram_list.blocks, next) {
Huang Yingcd19cfa2011-03-02 08:56:19 +01001254 offset = addr - block->offset;
1255 if (offset < block->length) {
1256 vaddr = block->host + offset;
1257 if (block->flags & RAM_PREALLOC_MASK) {
1258 ;
1259 } else {
1260 flags = MAP_FIXED;
1261 munmap(vaddr, length);
1262 if (mem_path) {
1263#if defined(__linux__) && !defined(TARGET_S390X)
1264 if (block->fd) {
1265#ifdef MAP_POPULATE
1266 flags |= mem_prealloc ? MAP_POPULATE | MAP_SHARED :
1267 MAP_PRIVATE;
1268#else
1269 flags |= MAP_PRIVATE;
1270#endif
1271 area = mmap(vaddr, length, PROT_READ | PROT_WRITE,
1272 flags, block->fd, offset);
1273 } else {
1274 flags |= MAP_PRIVATE | MAP_ANONYMOUS;
1275 area = mmap(vaddr, length, PROT_READ | PROT_WRITE,
1276 flags, -1, 0);
1277 }
Jan Kiszkafd28aa12011-03-15 12:26:14 +01001278#else
1279 abort();
Huang Yingcd19cfa2011-03-02 08:56:19 +01001280#endif
1281 } else {
1282#if defined(TARGET_S390X) && defined(CONFIG_KVM)
1283 flags |= MAP_SHARED | MAP_ANONYMOUS;
1284 area = mmap(vaddr, length, PROT_EXEC|PROT_READ|PROT_WRITE,
1285 flags, -1, 0);
1286#else
1287 flags |= MAP_PRIVATE | MAP_ANONYMOUS;
1288 area = mmap(vaddr, length, PROT_READ | PROT_WRITE,
1289 flags, -1, 0);
1290#endif
1291 }
1292 if (area != vaddr) {
Anthony PERARDf15fbc42011-07-20 08:17:42 +00001293 fprintf(stderr, "Could not remap addr: "
1294 RAM_ADDR_FMT "@" RAM_ADDR_FMT "\n",
Huang Yingcd19cfa2011-03-02 08:56:19 +01001295 length, addr);
1296 exit(1);
1297 }
Luiz Capitulino8490fc72012-09-05 16:50:16 -03001298 memory_try_enable_merging(vaddr, length);
Jason Baronddb97f12012-08-02 15:44:16 -04001299 qemu_ram_setup_dump(vaddr, length);
Huang Yingcd19cfa2011-03-02 08:56:19 +01001300 }
1301 return;
1302 }
1303 }
1304}
1305#endif /* !_WIN32 */
1306
Paolo Bonzini1b5ec232013-05-06 14:36:15 +02001307static RAMBlock *qemu_get_ram_block(ram_addr_t addr)
pbrookdc828ca2009-04-09 22:21:07 +00001308{
pbrook94a6b542009-04-11 17:15:54 +00001309 RAMBlock *block;
1310
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07001311 /* The list is protected by the iothread lock here. */
Paolo Bonzini0d6d3c82012-11-14 15:45:02 +01001312 block = ram_list.mru_block;
1313 if (block && addr - block->offset < block->length) {
1314 goto found;
1315 }
Paolo Bonzinia3161032012-11-14 15:54:48 +01001316 QTAILQ_FOREACH(block, &ram_list.blocks, next) {
Alex Williamsonf471a172010-06-11 11:11:42 -06001317 if (addr - block->offset < block->length) {
Paolo Bonzini0d6d3c82012-11-14 15:45:02 +01001318 goto found;
Alex Williamsonf471a172010-06-11 11:11:42 -06001319 }
pbrook94a6b542009-04-11 17:15:54 +00001320 }
Alex Williamsonf471a172010-06-11 11:11:42 -06001321
1322 fprintf(stderr, "Bad ram offset %" PRIx64 "\n", (uint64_t)addr);
1323 abort();
1324
Paolo Bonzini0d6d3c82012-11-14 15:45:02 +01001325found:
1326 ram_list.mru_block = block;
Paolo Bonzini1b5ec232013-05-06 14:36:15 +02001327 return block;
1328}
1329
1330/* Return a host pointer to ram allocated with qemu_ram_alloc.
1331 With the exception of the softmmu code in this file, this should
1332 only be used for local memory (e.g. video ram) that the device owns,
1333 and knows it isn't going to access beyond the end of the block.
1334
1335 It should not be used for general purpose DMA.
1336 Use cpu_physical_memory_map/cpu_physical_memory_rw instead.
1337 */
1338void *qemu_get_ram_ptr(ram_addr_t addr)
1339{
1340 RAMBlock *block = qemu_get_ram_block(addr);
1341
Paolo Bonzini0d6d3c82012-11-14 15:45:02 +01001342 if (xen_enabled()) {
1343 /* We need to check if the requested address is in the RAM
1344 * because we don't want to map the entire memory in QEMU.
1345 * In that case just map until the end of the page.
1346 */
1347 if (block->offset == 0) {
1348 return xen_map_cache(addr, 0, 0);
1349 } else if (block->host == NULL) {
1350 block->host =
1351 xen_map_cache(block->offset, block->length, 1);
1352 }
1353 }
1354 return block->host + (addr - block->offset);
pbrookdc828ca2009-04-09 22:21:07 +00001355}
1356
Paolo Bonzini0d6d3c82012-11-14 15:45:02 +01001357/* Return a host pointer to ram allocated with qemu_ram_alloc. Same as
1358 * qemu_get_ram_ptr but do not touch ram_list.mru_block.
1359 *
1360 * ??? Is this still necessary?
Michael S. Tsirkinb2e0a132010-11-22 19:52:34 +02001361 */
Blue Swirl8b9c99d2012-10-28 11:04:51 +00001362static void *qemu_safe_ram_ptr(ram_addr_t addr)
Michael S. Tsirkinb2e0a132010-11-22 19:52:34 +02001363{
1364 RAMBlock *block;
1365
Umesh Deshpandeb2a86582011-08-17 00:01:33 -07001366 /* The list is protected by the iothread lock here. */
Paolo Bonzinia3161032012-11-14 15:54:48 +01001367 QTAILQ_FOREACH(block, &ram_list.blocks, next) {
Michael S. Tsirkinb2e0a132010-11-22 19:52:34 +02001368 if (addr - block->offset < block->length) {
Jan Kiszka868bb332011-06-21 22:59:09 +02001369 if (xen_enabled()) {
Jun Nakajima432d2682010-08-31 16:41:25 +01001370 /* We need to check if the requested address is in the RAM
1371 * because we don't want to map the entire memory in QEMU.
Stefano Stabellini712c2b42011-05-19 18:35:46 +01001372 * In that case just map until the end of the page.
Jun Nakajima432d2682010-08-31 16:41:25 +01001373 */
1374 if (block->offset == 0) {
Jan Kiszkae41d7c62011-06-21 22:59:08 +02001375 return xen_map_cache(addr, 0, 0);
Jun Nakajima432d2682010-08-31 16:41:25 +01001376 } else if (block->host == NULL) {
Jan Kiszkae41d7c62011-06-21 22:59:08 +02001377 block->host =
1378 xen_map_cache(block->offset, block->length, 1);
Jun Nakajima432d2682010-08-31 16:41:25 +01001379 }
1380 }
Michael S. Tsirkinb2e0a132010-11-22 19:52:34 +02001381 return block->host + (addr - block->offset);
1382 }
1383 }
1384
1385 fprintf(stderr, "Bad ram offset %" PRIx64 "\n", (uint64_t)addr);
1386 abort();
1387
1388 return NULL;
1389}
1390
Stefano Stabellini38bee5d2011-05-19 18:35:45 +01001391/* Return a host pointer to guest's ram. Similar to qemu_get_ram_ptr
1392 * but takes a size argument */
Blue Swirl8b9c99d2012-10-28 11:04:51 +00001393static void *qemu_ram_ptr_length(ram_addr_t addr, ram_addr_t *size)
Stefano Stabellini38bee5d2011-05-19 18:35:45 +01001394{
Stefano Stabellini8ab934f2011-06-27 18:26:06 +01001395 if (*size == 0) {
1396 return NULL;
1397 }
Jan Kiszka868bb332011-06-21 22:59:09 +02001398 if (xen_enabled()) {
Jan Kiszkae41d7c62011-06-21 22:59:08 +02001399 return xen_map_cache(addr, *size, 1);
Jan Kiszka868bb332011-06-21 22:59:09 +02001400 } else {
Stefano Stabellini38bee5d2011-05-19 18:35:45 +01001401 RAMBlock *block;
1402
Paolo Bonzinia3161032012-11-14 15:54:48 +01001403 QTAILQ_FOREACH(block, &ram_list.blocks, next) {
Stefano Stabellini38bee5d2011-05-19 18:35:45 +01001404 if (addr - block->offset < block->length) {
1405 if (addr - block->offset + *size > block->length)
1406 *size = block->length - addr + block->offset;
1407 return block->host + (addr - block->offset);
1408 }
1409 }
1410
1411 fprintf(stderr, "Bad ram offset %" PRIx64 "\n", (uint64_t)addr);
1412 abort();
Stefano Stabellini38bee5d2011-05-19 18:35:45 +01001413 }
1414}
1415
Paolo Bonzini7443b432013-06-03 12:44:02 +02001416/* Some of the softmmu routines need to translate from a host pointer
1417 (typically a TLB entry) back to a ram offset. */
Paolo Bonzini1b5ec232013-05-06 14:36:15 +02001418MemoryRegion *qemu_ram_addr_from_host(void *ptr, ram_addr_t *ram_addr)
pbrook5579c7f2009-04-11 14:47:08 +00001419{
pbrook94a6b542009-04-11 17:15:54 +00001420 RAMBlock *block;
1421 uint8_t *host = ptr;
1422
Jan Kiszka868bb332011-06-21 22:59:09 +02001423 if (xen_enabled()) {
Jan Kiszkae41d7c62011-06-21 22:59:08 +02001424 *ram_addr = xen_ram_addr_from_mapcache(ptr);
Paolo Bonzini1b5ec232013-05-06 14:36:15 +02001425 return qemu_get_ram_block(*ram_addr)->mr;
Stefano Stabellini712c2b42011-05-19 18:35:46 +01001426 }
1427
Paolo Bonzini23887b72013-05-06 14:28:39 +02001428 block = ram_list.mru_block;
1429 if (block && block->host && host - block->host < block->length) {
1430 goto found;
1431 }
1432
Paolo Bonzinia3161032012-11-14 15:54:48 +01001433 QTAILQ_FOREACH(block, &ram_list.blocks, next) {
Jun Nakajima432d2682010-08-31 16:41:25 +01001434 /* This case append when the block is not mapped. */
1435 if (block->host == NULL) {
1436 continue;
1437 }
Alex Williamsonf471a172010-06-11 11:11:42 -06001438 if (host - block->host < block->length) {
Paolo Bonzini23887b72013-05-06 14:28:39 +02001439 goto found;
Alex Williamsonf471a172010-06-11 11:11:42 -06001440 }
pbrook94a6b542009-04-11 17:15:54 +00001441 }
Jun Nakajima432d2682010-08-31 16:41:25 +01001442
Paolo Bonzini1b5ec232013-05-06 14:36:15 +02001443 return NULL;
Paolo Bonzini23887b72013-05-06 14:28:39 +02001444
1445found:
1446 *ram_addr = block->offset + (host - block->host);
Paolo Bonzini1b5ec232013-05-06 14:36:15 +02001447 return block->mr;
Marcelo Tosattie8902612010-10-11 15:31:19 -03001448}
Alex Williamsonf471a172010-06-11 11:11:42 -06001449
Avi Kivitya8170e52012-10-23 12:30:10 +02001450static void notdirty_mem_write(void *opaque, hwaddr ram_addr,
Avi Kivity0e0df1e2012-01-02 00:32:15 +02001451 uint64_t val, unsigned size)
bellard1ccde1c2004-02-06 19:46:14 +00001452{
bellard3a7d9292005-08-21 09:26:42 +00001453 int dirty_flags;
Yoshiaki Tamuraf7c11b52010-03-23 16:39:53 +09001454 dirty_flags = cpu_physical_memory_get_dirty_flags(ram_addr);
bellard3a7d9292005-08-21 09:26:42 +00001455 if (!(dirty_flags & CODE_DIRTY_FLAG)) {
Avi Kivity0e0df1e2012-01-02 00:32:15 +02001456 tb_invalidate_phys_page_fast(ram_addr, size);
Yoshiaki Tamuraf7c11b52010-03-23 16:39:53 +09001457 dirty_flags = cpu_physical_memory_get_dirty_flags(ram_addr);
bellard3a7d9292005-08-21 09:26:42 +00001458 }
Avi Kivity0e0df1e2012-01-02 00:32:15 +02001459 switch (size) {
1460 case 1:
1461 stb_p(qemu_get_ram_ptr(ram_addr), val);
1462 break;
1463 case 2:
1464 stw_p(qemu_get_ram_ptr(ram_addr), val);
1465 break;
1466 case 4:
1467 stl_p(qemu_get_ram_ptr(ram_addr), val);
1468 break;
1469 default:
1470 abort();
1471 }
bellardf23db162005-08-21 19:12:28 +00001472 dirty_flags |= (0xff & ~CODE_DIRTY_FLAG);
Yoshiaki Tamuraf7c11b52010-03-23 16:39:53 +09001473 cpu_physical_memory_set_dirty_flags(ram_addr, dirty_flags);
bellardf23db162005-08-21 19:12:28 +00001474 /* we remove the notdirty callback only if the code has been
1475 flushed */
1476 if (dirty_flags == 0xff)
pbrook2e70f6e2008-06-29 01:03:05 +00001477 tlb_set_dirty(cpu_single_env, cpu_single_env->mem_io_vaddr);
bellard1ccde1c2004-02-06 19:46:14 +00001478}
1479
Paolo Bonzinib018ddf2013-05-24 14:48:38 +02001480static bool notdirty_mem_accepts(void *opaque, hwaddr addr,
1481 unsigned size, bool is_write)
1482{
1483 return is_write;
1484}
1485
Avi Kivity0e0df1e2012-01-02 00:32:15 +02001486static const MemoryRegionOps notdirty_mem_ops = {
Avi Kivity0e0df1e2012-01-02 00:32:15 +02001487 .write = notdirty_mem_write,
Paolo Bonzinib018ddf2013-05-24 14:48:38 +02001488 .valid.accepts = notdirty_mem_accepts,
Avi Kivity0e0df1e2012-01-02 00:32:15 +02001489 .endianness = DEVICE_NATIVE_ENDIAN,
bellard1ccde1c2004-02-06 19:46:14 +00001490};
1491
pbrook0f459d12008-06-09 00:20:13 +00001492/* Generate a debug exception if a watchpoint has been hit. */
aliguorib4051332008-11-18 20:14:20 +00001493static void check_watchpoint(int offset, int len_mask, int flags)
pbrook0f459d12008-06-09 00:20:13 +00001494{
Andreas Färber9349b4f2012-03-14 01:38:32 +01001495 CPUArchState *env = cpu_single_env;
aliguori06d55cc2008-11-18 20:24:06 +00001496 target_ulong pc, cs_base;
pbrook0f459d12008-06-09 00:20:13 +00001497 target_ulong vaddr;
aliguoria1d1bb32008-11-18 20:07:32 +00001498 CPUWatchpoint *wp;
aliguori06d55cc2008-11-18 20:24:06 +00001499 int cpu_flags;
pbrook0f459d12008-06-09 00:20:13 +00001500
aliguori06d55cc2008-11-18 20:24:06 +00001501 if (env->watchpoint_hit) {
1502 /* We re-entered the check after replacing the TB. Now raise
1503 * the debug interrupt so that is will trigger after the
1504 * current instruction. */
Andreas Färberc3affe52013-01-18 15:03:43 +01001505 cpu_interrupt(ENV_GET_CPU(env), CPU_INTERRUPT_DEBUG);
aliguori06d55cc2008-11-18 20:24:06 +00001506 return;
1507 }
pbrook2e70f6e2008-06-29 01:03:05 +00001508 vaddr = (env->mem_io_vaddr & TARGET_PAGE_MASK) + offset;
Blue Swirl72cf2d42009-09-12 07:36:22 +00001509 QTAILQ_FOREACH(wp, &env->watchpoints, entry) {
aliguorib4051332008-11-18 20:14:20 +00001510 if ((vaddr == (wp->vaddr & len_mask) ||
1511 (vaddr & wp->len_mask) == wp->vaddr) && (wp->flags & flags)) {
aliguori6e140f22008-11-18 20:37:55 +00001512 wp->flags |= BP_WATCHPOINT_HIT;
1513 if (!env->watchpoint_hit) {
1514 env->watchpoint_hit = wp;
Blue Swirl5a316522012-12-02 21:28:09 +00001515 tb_check_watchpoint(env);
aliguori6e140f22008-11-18 20:37:55 +00001516 if (wp->flags & BP_STOP_BEFORE_ACCESS) {
1517 env->exception_index = EXCP_DEBUG;
Max Filippov488d6572012-01-29 02:24:39 +04001518 cpu_loop_exit(env);
aliguori6e140f22008-11-18 20:37:55 +00001519 } else {
1520 cpu_get_tb_cpu_state(env, &pc, &cs_base, &cpu_flags);
1521 tb_gen_code(env, pc, cs_base, cpu_flags, 1);
Max Filippov488d6572012-01-29 02:24:39 +04001522 cpu_resume_from_signal(env, NULL);
aliguori6e140f22008-11-18 20:37:55 +00001523 }
aliguori06d55cc2008-11-18 20:24:06 +00001524 }
aliguori6e140f22008-11-18 20:37:55 +00001525 } else {
1526 wp->flags &= ~BP_WATCHPOINT_HIT;
pbrook0f459d12008-06-09 00:20:13 +00001527 }
1528 }
1529}
1530
pbrook6658ffb2007-03-16 23:58:11 +00001531/* Watchpoint access routines. Watchpoints are inserted using TLB tricks,
1532 so these check for a hit then pass through to the normal out-of-line
1533 phys routines. */
Avi Kivitya8170e52012-10-23 12:30:10 +02001534static uint64_t watch_mem_read(void *opaque, hwaddr addr,
Avi Kivity1ec9b902012-01-02 12:47:48 +02001535 unsigned size)
pbrook6658ffb2007-03-16 23:58:11 +00001536{
Avi Kivity1ec9b902012-01-02 12:47:48 +02001537 check_watchpoint(addr & ~TARGET_PAGE_MASK, ~(size - 1), BP_MEM_READ);
1538 switch (size) {
1539 case 1: return ldub_phys(addr);
1540 case 2: return lduw_phys(addr);
1541 case 4: return ldl_phys(addr);
1542 default: abort();
1543 }
pbrook6658ffb2007-03-16 23:58:11 +00001544}
1545
Avi Kivitya8170e52012-10-23 12:30:10 +02001546static void watch_mem_write(void *opaque, hwaddr addr,
Avi Kivity1ec9b902012-01-02 12:47:48 +02001547 uint64_t val, unsigned size)
pbrook6658ffb2007-03-16 23:58:11 +00001548{
Avi Kivity1ec9b902012-01-02 12:47:48 +02001549 check_watchpoint(addr & ~TARGET_PAGE_MASK, ~(size - 1), BP_MEM_WRITE);
1550 switch (size) {
Max Filippov67364152012-01-29 00:01:40 +04001551 case 1:
1552 stb_phys(addr, val);
1553 break;
1554 case 2:
1555 stw_phys(addr, val);
1556 break;
1557 case 4:
1558 stl_phys(addr, val);
1559 break;
Avi Kivity1ec9b902012-01-02 12:47:48 +02001560 default: abort();
1561 }
pbrook6658ffb2007-03-16 23:58:11 +00001562}
1563
Avi Kivity1ec9b902012-01-02 12:47:48 +02001564static const MemoryRegionOps watch_mem_ops = {
1565 .read = watch_mem_read,
1566 .write = watch_mem_write,
1567 .endianness = DEVICE_NATIVE_ENDIAN,
pbrook6658ffb2007-03-16 23:58:11 +00001568};
pbrook6658ffb2007-03-16 23:58:11 +00001569
Avi Kivitya8170e52012-10-23 12:30:10 +02001570static uint64_t subpage_read(void *opaque, hwaddr addr,
Avi Kivity70c68e42012-01-02 12:32:48 +02001571 unsigned len)
blueswir1db7b5422007-05-26 17:36:03 +00001572{
Jan Kiszkaacc9d802013-05-26 21:55:37 +02001573 subpage_t *subpage = opaque;
1574 uint8_t buf[4];
Paolo Bonzini791af8c2013-05-24 16:10:39 +02001575
blueswir1db7b5422007-05-26 17:36:03 +00001576#if defined(DEBUG_SUBPAGE)
Jan Kiszkaacc9d802013-05-26 21:55:37 +02001577 printf("%s: subpage %p len %d addr " TARGET_FMT_plx "\n", __func__,
1578 subpage, len, addr);
blueswir1db7b5422007-05-26 17:36:03 +00001579#endif
Jan Kiszkaacc9d802013-05-26 21:55:37 +02001580 address_space_read(subpage->as, addr + subpage->base, buf, len);
1581 switch (len) {
1582 case 1:
1583 return ldub_p(buf);
1584 case 2:
1585 return lduw_p(buf);
1586 case 4:
1587 return ldl_p(buf);
1588 default:
1589 abort();
1590 }
blueswir1db7b5422007-05-26 17:36:03 +00001591}
1592
Avi Kivitya8170e52012-10-23 12:30:10 +02001593static void subpage_write(void *opaque, hwaddr addr,
Avi Kivity70c68e42012-01-02 12:32:48 +02001594 uint64_t value, unsigned len)
blueswir1db7b5422007-05-26 17:36:03 +00001595{
Jan Kiszkaacc9d802013-05-26 21:55:37 +02001596 subpage_t *subpage = opaque;
1597 uint8_t buf[4];
1598
blueswir1db7b5422007-05-26 17:36:03 +00001599#if defined(DEBUG_SUBPAGE)
Avi Kivity70c68e42012-01-02 12:32:48 +02001600 printf("%s: subpage %p len %d addr " TARGET_FMT_plx
Jan Kiszkaacc9d802013-05-26 21:55:37 +02001601 " value %"PRIx64"\n",
1602 __func__, subpage, len, addr, value);
blueswir1db7b5422007-05-26 17:36:03 +00001603#endif
Jan Kiszkaacc9d802013-05-26 21:55:37 +02001604 switch (len) {
1605 case 1:
1606 stb_p(buf, value);
1607 break;
1608 case 2:
1609 stw_p(buf, value);
1610 break;
1611 case 4:
1612 stl_p(buf, value);
1613 break;
1614 default:
1615 abort();
1616 }
1617 address_space_write(subpage->as, addr + subpage->base, buf, len);
blueswir1db7b5422007-05-26 17:36:03 +00001618}
1619
Paolo Bonzinic353e4c2013-05-24 14:02:39 +02001620static bool subpage_accepts(void *opaque, hwaddr addr,
1621 unsigned size, bool is_write)
1622{
Jan Kiszkaacc9d802013-05-26 21:55:37 +02001623 subpage_t *subpage = opaque;
Paolo Bonzinic353e4c2013-05-24 14:02:39 +02001624#if defined(DEBUG_SUBPAGE)
Jan Kiszkaacc9d802013-05-26 21:55:37 +02001625 printf("%s: subpage %p %c len %d addr " TARGET_FMT_plx "\n",
1626 __func__, subpage, is_write ? 'w' : 'r', len, addr);
Paolo Bonzinic353e4c2013-05-24 14:02:39 +02001627#endif
1628
Jan Kiszkaacc9d802013-05-26 21:55:37 +02001629 return address_space_access_valid(subpage->as, addr + subpage->base,
1630 size, is_write);
Paolo Bonzinic353e4c2013-05-24 14:02:39 +02001631}
1632
Avi Kivity70c68e42012-01-02 12:32:48 +02001633static const MemoryRegionOps subpage_ops = {
1634 .read = subpage_read,
1635 .write = subpage_write,
Paolo Bonzinic353e4c2013-05-24 14:02:39 +02001636 .valid.accepts = subpage_accepts,
Avi Kivity70c68e42012-01-02 12:32:48 +02001637 .endianness = DEVICE_NATIVE_ENDIAN,
blueswir1db7b5422007-05-26 17:36:03 +00001638};
1639
Anthony Liguoric227f092009-10-01 16:12:16 -05001640static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end,
Avi Kivity5312bd82012-02-12 18:32:55 +02001641 uint16_t section)
blueswir1db7b5422007-05-26 17:36:03 +00001642{
1643 int idx, eidx;
1644
1645 if (start >= TARGET_PAGE_SIZE || end >= TARGET_PAGE_SIZE)
1646 return -1;
1647 idx = SUBPAGE_IDX(start);
1648 eidx = SUBPAGE_IDX(end);
1649#if defined(DEBUG_SUBPAGE)
Blue Swirl0bf9e312009-07-20 17:19:25 +00001650 printf("%s: %p start %08x end %08x idx %08x eidx %08x mem %ld\n", __func__,
blueswir1db7b5422007-05-26 17:36:03 +00001651 mmio, start, end, idx, eidx, memory);
1652#endif
blueswir1db7b5422007-05-26 17:36:03 +00001653 for (; idx <= eidx; idx++) {
Avi Kivity5312bd82012-02-12 18:32:55 +02001654 mmio->sub_section[idx] = section;
blueswir1db7b5422007-05-26 17:36:03 +00001655 }
1656
1657 return 0;
1658}
1659
Jan Kiszkaacc9d802013-05-26 21:55:37 +02001660static subpage_t *subpage_init(AddressSpace *as, hwaddr base)
blueswir1db7b5422007-05-26 17:36:03 +00001661{
Anthony Liguoric227f092009-10-01 16:12:16 -05001662 subpage_t *mmio;
blueswir1db7b5422007-05-26 17:36:03 +00001663
Anthony Liguori7267c092011-08-20 22:09:37 -05001664 mmio = g_malloc0(sizeof(subpage_t));
aliguori1eec6142009-02-05 22:06:18 +00001665
Jan Kiszkaacc9d802013-05-26 21:55:37 +02001666 mmio->as = as;
aliguori1eec6142009-02-05 22:06:18 +00001667 mmio->base = base;
Paolo Bonzini2c9b15c2013-06-06 05:41:28 -04001668 memory_region_init_io(&mmio->iomem, NULL, &subpage_ops, mmio,
Avi Kivity70c68e42012-01-02 12:32:48 +02001669 "subpage", TARGET_PAGE_SIZE);
Avi Kivityb3b00c72012-01-02 13:20:11 +02001670 mmio->iomem.subpage = true;
blueswir1db7b5422007-05-26 17:36:03 +00001671#if defined(DEBUG_SUBPAGE)
aliguori1eec6142009-02-05 22:06:18 +00001672 printf("%s: %p base " TARGET_FMT_plx " len %08x %d\n", __func__,
1673 mmio, base, TARGET_PAGE_SIZE, subpage_memory);
blueswir1db7b5422007-05-26 17:36:03 +00001674#endif
Liu Ping Fanb41aac42013-05-29 11:09:17 +02001675 subpage_register(mmio, 0, TARGET_PAGE_SIZE-1, PHYS_SECTION_UNASSIGNED);
blueswir1db7b5422007-05-26 17:36:03 +00001676
1677 return mmio;
1678}
1679
Avi Kivity5312bd82012-02-12 18:32:55 +02001680static uint16_t dummy_section(MemoryRegion *mr)
1681{
1682 MemoryRegionSection section = {
1683 .mr = mr,
1684 .offset_within_address_space = 0,
1685 .offset_within_region = 0,
Paolo Bonzini052e87b2013-05-27 10:08:27 +02001686 .size = int128_2_64(),
Avi Kivity5312bd82012-02-12 18:32:55 +02001687 };
1688
1689 return phys_section_add(&section);
1690}
1691
Avi Kivitya8170e52012-10-23 12:30:10 +02001692MemoryRegion *iotlb_to_region(hwaddr index)
Avi Kivityaa102232012-03-08 17:06:55 +02001693{
Paolo Bonzini0475d942013-05-29 12:28:21 +02001694 return address_space_memory.dispatch->sections[index & ~TARGET_PAGE_MASK].mr;
Avi Kivityaa102232012-03-08 17:06:55 +02001695}
1696
Avi Kivitye9179ce2009-06-14 11:38:52 +03001697static void io_mem_init(void)
1698{
Paolo Bonzini2c9b15c2013-06-06 05:41:28 -04001699 memory_region_init_io(&io_mem_rom, NULL, &unassigned_mem_ops, NULL, "rom", UINT64_MAX);
1700 memory_region_init_io(&io_mem_unassigned, NULL, &unassigned_mem_ops, NULL,
Avi Kivity0e0df1e2012-01-02 00:32:15 +02001701 "unassigned", UINT64_MAX);
Paolo Bonzini2c9b15c2013-06-06 05:41:28 -04001702 memory_region_init_io(&io_mem_notdirty, NULL, &notdirty_mem_ops, NULL,
Avi Kivity0e0df1e2012-01-02 00:32:15 +02001703 "notdirty", UINT64_MAX);
Paolo Bonzini2c9b15c2013-06-06 05:41:28 -04001704 memory_region_init_io(&io_mem_watch, NULL, &watch_mem_ops, NULL,
Avi Kivity1ec9b902012-01-02 12:47:48 +02001705 "watch", UINT64_MAX);
Avi Kivitye9179ce2009-06-14 11:38:52 +03001706}
1707
Avi Kivityac1970f2012-10-03 16:22:53 +02001708static void mem_begin(MemoryListener *listener)
1709{
Paolo Bonzini89ae3372013-06-02 10:39:07 +02001710 AddressSpace *as = container_of(listener, AddressSpace, dispatch_listener);
Paolo Bonzini00752702013-05-29 12:13:54 +02001711 AddressSpaceDispatch *d = g_new(AddressSpaceDispatch, 1);
1712
1713 d->phys_map = (PhysPageEntry) { .ptr = PHYS_MAP_NODE_NIL, .is_leaf = 0 };
1714 d->as = as;
1715 as->next_dispatch = d;
1716}
1717
1718static void mem_commit(MemoryListener *listener)
1719{
1720 AddressSpace *as = container_of(listener, AddressSpace, dispatch_listener);
Paolo Bonzini0475d942013-05-29 12:28:21 +02001721 AddressSpaceDispatch *cur = as->dispatch;
1722 AddressSpaceDispatch *next = as->next_dispatch;
Avi Kivityac1970f2012-10-03 16:22:53 +02001723
Paolo Bonzini0475d942013-05-29 12:28:21 +02001724 next->nodes = next_map.nodes;
1725 next->sections = next_map.sections;
1726
1727 as->dispatch = next;
1728 g_free(cur);
Avi Kivityac1970f2012-10-03 16:22:53 +02001729}
1730
Avi Kivity50c1e142012-02-08 21:36:02 +02001731static void core_begin(MemoryListener *listener)
1732{
Liu Ping Fanb41aac42013-05-29 11:09:17 +02001733 uint16_t n;
1734
Paolo Bonzini60926662013-05-29 12:30:26 +02001735 prev_map = g_new(PhysPageMap, 1);
1736 *prev_map = next_map;
1737
Paolo Bonzini9affd6f2013-05-29 12:09:47 +02001738 memset(&next_map, 0, sizeof(next_map));
Liu Ping Fanb41aac42013-05-29 11:09:17 +02001739 n = dummy_section(&io_mem_unassigned);
1740 assert(n == PHYS_SECTION_UNASSIGNED);
1741 n = dummy_section(&io_mem_notdirty);
1742 assert(n == PHYS_SECTION_NOTDIRTY);
1743 n = dummy_section(&io_mem_rom);
1744 assert(n == PHYS_SECTION_ROM);
1745 n = dummy_section(&io_mem_watch);
1746 assert(n == PHYS_SECTION_WATCH);
Avi Kivity50c1e142012-02-08 21:36:02 +02001747}
1748
Paolo Bonzini9affd6f2013-05-29 12:09:47 +02001749/* This listener's commit run after the other AddressSpaceDispatch listeners'.
1750 * All AddressSpaceDispatch instances have switched to the next map.
1751 */
1752static void core_commit(MemoryListener *listener)
1753{
Paolo Bonzini60926662013-05-29 12:30:26 +02001754 phys_sections_free(prev_map);
Paolo Bonzini9affd6f2013-05-29 12:09:47 +02001755}
1756
Avi Kivity1d711482012-10-02 18:54:45 +02001757static void tcg_commit(MemoryListener *listener)
Avi Kivity50c1e142012-02-08 21:36:02 +02001758{
Andreas Färber9349b4f2012-03-14 01:38:32 +01001759 CPUArchState *env;
Avi Kivity117712c2012-02-12 21:23:17 +02001760
1761 /* since each CPU stores ram addresses in its TLB cache, we must
1762 reset the modified entries */
1763 /* XXX: slow ! */
1764 for(env = first_cpu; env != NULL; env = env->next_cpu) {
1765 tlb_flush(env, 1);
1766 }
Avi Kivity50c1e142012-02-08 21:36:02 +02001767}
1768
Avi Kivity93632742012-02-08 16:54:16 +02001769static void core_log_global_start(MemoryListener *listener)
1770{
1771 cpu_physical_memory_set_dirty_tracking(1);
1772}
1773
1774static void core_log_global_stop(MemoryListener *listener)
1775{
1776 cpu_physical_memory_set_dirty_tracking(0);
1777}
1778
Avi Kivity93632742012-02-08 16:54:16 +02001779static MemoryListener core_memory_listener = {
Avi Kivity50c1e142012-02-08 21:36:02 +02001780 .begin = core_begin,
Paolo Bonzini9affd6f2013-05-29 12:09:47 +02001781 .commit = core_commit,
Avi Kivity93632742012-02-08 16:54:16 +02001782 .log_global_start = core_log_global_start,
1783 .log_global_stop = core_log_global_stop,
Avi Kivityac1970f2012-10-03 16:22:53 +02001784 .priority = 1,
Avi Kivity93632742012-02-08 16:54:16 +02001785};
1786
Avi Kivity1d711482012-10-02 18:54:45 +02001787static MemoryListener tcg_memory_listener = {
1788 .commit = tcg_commit,
1789};
1790
Avi Kivityac1970f2012-10-03 16:22:53 +02001791void address_space_init_dispatch(AddressSpace *as)
1792{
Paolo Bonzini00752702013-05-29 12:13:54 +02001793 as->dispatch = NULL;
Paolo Bonzini89ae3372013-06-02 10:39:07 +02001794 as->dispatch_listener = (MemoryListener) {
Avi Kivityac1970f2012-10-03 16:22:53 +02001795 .begin = mem_begin,
Paolo Bonzini00752702013-05-29 12:13:54 +02001796 .commit = mem_commit,
Avi Kivityac1970f2012-10-03 16:22:53 +02001797 .region_add = mem_add,
1798 .region_nop = mem_add,
1799 .priority = 0,
1800 };
Paolo Bonzini89ae3372013-06-02 10:39:07 +02001801 memory_listener_register(&as->dispatch_listener, as);
Avi Kivityac1970f2012-10-03 16:22:53 +02001802}
1803
Avi Kivity83f3c252012-10-07 12:59:55 +02001804void address_space_destroy_dispatch(AddressSpace *as)
1805{
1806 AddressSpaceDispatch *d = as->dispatch;
1807
Paolo Bonzini89ae3372013-06-02 10:39:07 +02001808 memory_listener_unregister(&as->dispatch_listener);
Avi Kivity83f3c252012-10-07 12:59:55 +02001809 g_free(d);
1810 as->dispatch = NULL;
1811}
1812
Avi Kivity62152b82011-07-26 14:26:14 +03001813static void memory_map_init(void)
1814{
Anthony Liguori7267c092011-08-20 22:09:37 -05001815 system_memory = g_malloc(sizeof(*system_memory));
Paolo Bonzini2c9b15c2013-06-06 05:41:28 -04001816 memory_region_init(system_memory, NULL, "system", INT64_MAX);
Alexey Kardashevskiy7dca8042013-04-29 16:25:51 +00001817 address_space_init(&address_space_memory, system_memory, "memory");
Avi Kivity309cb472011-08-08 16:09:03 +03001818
Anthony Liguori7267c092011-08-20 22:09:37 -05001819 system_io = g_malloc(sizeof(*system_io));
Paolo Bonzini2c9b15c2013-06-06 05:41:28 -04001820 memory_region_init(system_io, NULL, "io", 65536);
Alexey Kardashevskiy7dca8042013-04-29 16:25:51 +00001821 address_space_init(&address_space_io, system_io, "I/O");
Avi Kivity93632742012-02-08 16:54:16 +02001822
Avi Kivityf6790af2012-10-02 20:13:51 +02001823 memory_listener_register(&core_memory_listener, &address_space_memory);
Avi Kivityf6790af2012-10-02 20:13:51 +02001824 memory_listener_register(&tcg_memory_listener, &address_space_memory);
Avi Kivity62152b82011-07-26 14:26:14 +03001825}
1826
1827MemoryRegion *get_system_memory(void)
1828{
1829 return system_memory;
1830}
1831
Avi Kivity309cb472011-08-08 16:09:03 +03001832MemoryRegion *get_system_io(void)
1833{
1834 return system_io;
1835}
1836
pbrooke2eef172008-06-08 01:09:01 +00001837#endif /* !defined(CONFIG_USER_ONLY) */
1838
bellard13eb76e2004-01-24 15:23:36 +00001839/* physical memory access (slow version, mainly for debug) */
1840#if defined(CONFIG_USER_ONLY)
Andreas Färber9349b4f2012-03-14 01:38:32 +01001841int cpu_memory_rw_debug(CPUArchState *env, target_ulong addr,
Paul Brooka68fe892010-03-01 00:08:59 +00001842 uint8_t *buf, int len, int is_write)
bellard13eb76e2004-01-24 15:23:36 +00001843{
1844 int l, flags;
1845 target_ulong page;
pbrook53a59602006-03-25 19:31:22 +00001846 void * p;
bellard13eb76e2004-01-24 15:23:36 +00001847
1848 while (len > 0) {
1849 page = addr & TARGET_PAGE_MASK;
1850 l = (page + TARGET_PAGE_SIZE) - addr;
1851 if (l > len)
1852 l = len;
1853 flags = page_get_flags(page);
1854 if (!(flags & PAGE_VALID))
Paul Brooka68fe892010-03-01 00:08:59 +00001855 return -1;
bellard13eb76e2004-01-24 15:23:36 +00001856 if (is_write) {
1857 if (!(flags & PAGE_WRITE))
Paul Brooka68fe892010-03-01 00:08:59 +00001858 return -1;
bellard579a97f2007-11-11 14:26:47 +00001859 /* XXX: this code should not depend on lock_user */
aurel3272fb7da2008-04-27 23:53:45 +00001860 if (!(p = lock_user(VERIFY_WRITE, addr, l, 0)))
Paul Brooka68fe892010-03-01 00:08:59 +00001861 return -1;
aurel3272fb7da2008-04-27 23:53:45 +00001862 memcpy(p, buf, l);
1863 unlock_user(p, addr, l);
bellard13eb76e2004-01-24 15:23:36 +00001864 } else {
1865 if (!(flags & PAGE_READ))
Paul Brooka68fe892010-03-01 00:08:59 +00001866 return -1;
bellard579a97f2007-11-11 14:26:47 +00001867 /* XXX: this code should not depend on lock_user */
aurel3272fb7da2008-04-27 23:53:45 +00001868 if (!(p = lock_user(VERIFY_READ, addr, l, 1)))
Paul Brooka68fe892010-03-01 00:08:59 +00001869 return -1;
aurel3272fb7da2008-04-27 23:53:45 +00001870 memcpy(buf, p, l);
aurel325b257572008-04-28 08:54:59 +00001871 unlock_user(p, addr, 0);
bellard13eb76e2004-01-24 15:23:36 +00001872 }
1873 len -= l;
1874 buf += l;
1875 addr += l;
1876 }
Paul Brooka68fe892010-03-01 00:08:59 +00001877 return 0;
bellard13eb76e2004-01-24 15:23:36 +00001878}
bellard8df1cd02005-01-28 22:37:22 +00001879
bellard13eb76e2004-01-24 15:23:36 +00001880#else
Anthony PERARD51d7a9e2012-10-03 13:49:05 +00001881
Avi Kivitya8170e52012-10-23 12:30:10 +02001882static void invalidate_and_set_dirty(hwaddr addr,
1883 hwaddr length)
Anthony PERARD51d7a9e2012-10-03 13:49:05 +00001884{
1885 if (!cpu_physical_memory_is_dirty(addr)) {
1886 /* invalidate code */
1887 tb_invalidate_phys_page_range(addr, addr + length, 0);
1888 /* set dirty bit */
1889 cpu_physical_memory_set_dirty_flags(addr, (0xff & ~CODE_DIRTY_FLAG));
1890 }
Anthony PERARDe2269392012-10-03 13:49:22 +00001891 xen_modified_memory(addr, length);
Anthony PERARD51d7a9e2012-10-03 13:49:05 +00001892}
1893
Paolo Bonzini2bbfa052013-05-24 12:29:54 +02001894static inline bool memory_access_is_direct(MemoryRegion *mr, bool is_write)
1895{
1896 if (memory_region_is_ram(mr)) {
1897 return !(is_write && mr->readonly);
1898 }
1899 if (memory_region_is_romd(mr)) {
1900 return !is_write;
1901 }
1902
1903 return false;
1904}
1905
Jan Kiszkaf52cc462013-05-26 21:42:40 +02001906static inline int memory_access_size(MemoryRegion *mr, int l, hwaddr addr)
Paolo Bonzini82f25632013-05-24 11:59:43 +02001907{
Jan Kiszkaf52cc462013-05-26 21:42:40 +02001908 if (l >= 4 && (((addr & 3) == 0 || mr->ops->impl.unaligned))) {
Paolo Bonzini82f25632013-05-24 11:59:43 +02001909 return 4;
1910 }
Jan Kiszkaf52cc462013-05-26 21:42:40 +02001911 if (l >= 2 && (((addr & 1) == 0) || mr->ops->impl.unaligned)) {
Paolo Bonzini82f25632013-05-24 11:59:43 +02001912 return 2;
1913 }
1914 return 1;
1915}
1916
Paolo Bonzinifd8aaa72013-05-21 09:56:55 +02001917bool address_space_rw(AddressSpace *as, hwaddr addr, uint8_t *buf,
Avi Kivityac1970f2012-10-03 16:22:53 +02001918 int len, bool is_write)
bellard13eb76e2004-01-24 15:23:36 +00001919{
Paolo Bonzini149f54b2013-05-24 12:59:37 +02001920 hwaddr l;
bellard13eb76e2004-01-24 15:23:36 +00001921 uint8_t *ptr;
Paolo Bonzini791af8c2013-05-24 16:10:39 +02001922 uint64_t val;
Paolo Bonzini149f54b2013-05-24 12:59:37 +02001923 hwaddr addr1;
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02001924 MemoryRegion *mr;
Paolo Bonzinifd8aaa72013-05-21 09:56:55 +02001925 bool error = false;
ths3b46e622007-09-17 08:09:54 +00001926
bellard13eb76e2004-01-24 15:23:36 +00001927 while (len > 0) {
Paolo Bonzini149f54b2013-05-24 12:59:37 +02001928 l = len;
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02001929 mr = address_space_translate(as, addr, &addr1, &l, is_write);
ths3b46e622007-09-17 08:09:54 +00001930
bellard13eb76e2004-01-24 15:23:36 +00001931 if (is_write) {
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02001932 if (!memory_access_is_direct(mr, is_write)) {
1933 l = memory_access_size(mr, l, addr1);
bellard6a00d602005-11-21 23:25:50 +00001934 /* XXX: could force cpu_single_env to NULL to avoid
1935 potential bugs */
Paolo Bonzini82f25632013-05-24 11:59:43 +02001936 if (l == 4) {
bellard1c213d12005-09-03 10:49:04 +00001937 /* 32 bit write access */
bellardc27004e2005-01-03 23:35:10 +00001938 val = ldl_p(buf);
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02001939 error |= io_mem_write(mr, addr1, val, 4);
Paolo Bonzini82f25632013-05-24 11:59:43 +02001940 } else if (l == 2) {
bellard1c213d12005-09-03 10:49:04 +00001941 /* 16 bit write access */
bellardc27004e2005-01-03 23:35:10 +00001942 val = lduw_p(buf);
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02001943 error |= io_mem_write(mr, addr1, val, 2);
bellard13eb76e2004-01-24 15:23:36 +00001944 } else {
bellard1c213d12005-09-03 10:49:04 +00001945 /* 8 bit write access */
bellardc27004e2005-01-03 23:35:10 +00001946 val = ldub_p(buf);
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02001947 error |= io_mem_write(mr, addr1, val, 1);
bellard13eb76e2004-01-24 15:23:36 +00001948 }
Paolo Bonzini2bbfa052013-05-24 12:29:54 +02001949 } else {
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02001950 addr1 += memory_region_get_ram_addr(mr);
bellard13eb76e2004-01-24 15:23:36 +00001951 /* RAM case */
pbrook5579c7f2009-04-11 14:47:08 +00001952 ptr = qemu_get_ram_ptr(addr1);
bellard13eb76e2004-01-24 15:23:36 +00001953 memcpy(ptr, buf, l);
Anthony PERARD51d7a9e2012-10-03 13:49:05 +00001954 invalidate_and_set_dirty(addr1, l);
bellard13eb76e2004-01-24 15:23:36 +00001955 }
1956 } else {
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02001957 if (!memory_access_is_direct(mr, is_write)) {
bellard13eb76e2004-01-24 15:23:36 +00001958 /* I/O case */
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02001959 l = memory_access_size(mr, l, addr1);
Paolo Bonzini82f25632013-05-24 11:59:43 +02001960 if (l == 4) {
bellard13eb76e2004-01-24 15:23:36 +00001961 /* 32 bit read access */
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02001962 error |= io_mem_read(mr, addr1, &val, 4);
bellardc27004e2005-01-03 23:35:10 +00001963 stl_p(buf, val);
Paolo Bonzini82f25632013-05-24 11:59:43 +02001964 } else if (l == 2) {
bellard13eb76e2004-01-24 15:23:36 +00001965 /* 16 bit read access */
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02001966 error |= io_mem_read(mr, addr1, &val, 2);
bellardc27004e2005-01-03 23:35:10 +00001967 stw_p(buf, val);
bellard13eb76e2004-01-24 15:23:36 +00001968 } else {
bellard1c213d12005-09-03 10:49:04 +00001969 /* 8 bit read access */
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02001970 error |= io_mem_read(mr, addr1, &val, 1);
bellardc27004e2005-01-03 23:35:10 +00001971 stb_p(buf, val);
bellard13eb76e2004-01-24 15:23:36 +00001972 }
1973 } else {
1974 /* RAM case */
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02001975 ptr = qemu_get_ram_ptr(mr->ram_addr + addr1);
Avi Kivityf3705d52012-03-08 16:16:34 +02001976 memcpy(buf, ptr, l);
bellard13eb76e2004-01-24 15:23:36 +00001977 }
1978 }
1979 len -= l;
1980 buf += l;
1981 addr += l;
1982 }
Paolo Bonzinifd8aaa72013-05-21 09:56:55 +02001983
1984 return error;
bellard13eb76e2004-01-24 15:23:36 +00001985}
bellard8df1cd02005-01-28 22:37:22 +00001986
Paolo Bonzinifd8aaa72013-05-21 09:56:55 +02001987bool address_space_write(AddressSpace *as, hwaddr addr,
Avi Kivityac1970f2012-10-03 16:22:53 +02001988 const uint8_t *buf, int len)
1989{
Paolo Bonzinifd8aaa72013-05-21 09:56:55 +02001990 return address_space_rw(as, addr, (uint8_t *)buf, len, true);
Avi Kivityac1970f2012-10-03 16:22:53 +02001991}
1992
Paolo Bonzinifd8aaa72013-05-21 09:56:55 +02001993bool address_space_read(AddressSpace *as, hwaddr addr, uint8_t *buf, int len)
Avi Kivityac1970f2012-10-03 16:22:53 +02001994{
Paolo Bonzinifd8aaa72013-05-21 09:56:55 +02001995 return address_space_rw(as, addr, buf, len, false);
Avi Kivityac1970f2012-10-03 16:22:53 +02001996}
1997
1998
Avi Kivitya8170e52012-10-23 12:30:10 +02001999void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf,
Avi Kivityac1970f2012-10-03 16:22:53 +02002000 int len, int is_write)
2001{
Paolo Bonzinifd8aaa72013-05-21 09:56:55 +02002002 address_space_rw(&address_space_memory, addr, buf, len, is_write);
Avi Kivityac1970f2012-10-03 16:22:53 +02002003}
2004
bellardd0ecd2a2006-04-23 17:14:48 +00002005/* used for ROM loading : can write in RAM and ROM */
Avi Kivitya8170e52012-10-23 12:30:10 +02002006void cpu_physical_memory_write_rom(hwaddr addr,
bellardd0ecd2a2006-04-23 17:14:48 +00002007 const uint8_t *buf, int len)
2008{
Paolo Bonzini149f54b2013-05-24 12:59:37 +02002009 hwaddr l;
bellardd0ecd2a2006-04-23 17:14:48 +00002010 uint8_t *ptr;
Paolo Bonzini149f54b2013-05-24 12:59:37 +02002011 hwaddr addr1;
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002012 MemoryRegion *mr;
ths3b46e622007-09-17 08:09:54 +00002013
bellardd0ecd2a2006-04-23 17:14:48 +00002014 while (len > 0) {
Paolo Bonzini149f54b2013-05-24 12:59:37 +02002015 l = len;
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002016 mr = address_space_translate(&address_space_memory,
2017 addr, &addr1, &l, true);
ths3b46e622007-09-17 08:09:54 +00002018
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002019 if (!(memory_region_is_ram(mr) ||
2020 memory_region_is_romd(mr))) {
bellardd0ecd2a2006-04-23 17:14:48 +00002021 /* do nothing */
2022 } else {
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002023 addr1 += memory_region_get_ram_addr(mr);
bellardd0ecd2a2006-04-23 17:14:48 +00002024 /* ROM/RAM case */
pbrook5579c7f2009-04-11 14:47:08 +00002025 ptr = qemu_get_ram_ptr(addr1);
bellardd0ecd2a2006-04-23 17:14:48 +00002026 memcpy(ptr, buf, l);
Anthony PERARD51d7a9e2012-10-03 13:49:05 +00002027 invalidate_and_set_dirty(addr1, l);
bellardd0ecd2a2006-04-23 17:14:48 +00002028 }
2029 len -= l;
2030 buf += l;
2031 addr += l;
2032 }
2033}
2034
aliguori6d16c2f2009-01-22 16:59:11 +00002035typedef struct {
Paolo Bonzinid3e71552013-06-28 17:33:29 +02002036 MemoryRegion *mr;
aliguori6d16c2f2009-01-22 16:59:11 +00002037 void *buffer;
Avi Kivitya8170e52012-10-23 12:30:10 +02002038 hwaddr addr;
2039 hwaddr len;
aliguori6d16c2f2009-01-22 16:59:11 +00002040} BounceBuffer;
2041
2042static BounceBuffer bounce;
2043
aliguoriba223c22009-01-22 16:59:16 +00002044typedef struct MapClient {
2045 void *opaque;
2046 void (*callback)(void *opaque);
Blue Swirl72cf2d42009-09-12 07:36:22 +00002047 QLIST_ENTRY(MapClient) link;
aliguoriba223c22009-01-22 16:59:16 +00002048} MapClient;
2049
Blue Swirl72cf2d42009-09-12 07:36:22 +00002050static QLIST_HEAD(map_client_list, MapClient) map_client_list
2051 = QLIST_HEAD_INITIALIZER(map_client_list);
aliguoriba223c22009-01-22 16:59:16 +00002052
2053void *cpu_register_map_client(void *opaque, void (*callback)(void *opaque))
2054{
Anthony Liguori7267c092011-08-20 22:09:37 -05002055 MapClient *client = g_malloc(sizeof(*client));
aliguoriba223c22009-01-22 16:59:16 +00002056
2057 client->opaque = opaque;
2058 client->callback = callback;
Blue Swirl72cf2d42009-09-12 07:36:22 +00002059 QLIST_INSERT_HEAD(&map_client_list, client, link);
aliguoriba223c22009-01-22 16:59:16 +00002060 return client;
2061}
2062
Blue Swirl8b9c99d2012-10-28 11:04:51 +00002063static void cpu_unregister_map_client(void *_client)
aliguoriba223c22009-01-22 16:59:16 +00002064{
2065 MapClient *client = (MapClient *)_client;
2066
Blue Swirl72cf2d42009-09-12 07:36:22 +00002067 QLIST_REMOVE(client, link);
Anthony Liguori7267c092011-08-20 22:09:37 -05002068 g_free(client);
aliguoriba223c22009-01-22 16:59:16 +00002069}
2070
2071static void cpu_notify_map_clients(void)
2072{
2073 MapClient *client;
2074
Blue Swirl72cf2d42009-09-12 07:36:22 +00002075 while (!QLIST_EMPTY(&map_client_list)) {
2076 client = QLIST_FIRST(&map_client_list);
aliguoriba223c22009-01-22 16:59:16 +00002077 client->callback(client->opaque);
Isaku Yamahata34d5e942009-06-26 18:57:18 +09002078 cpu_unregister_map_client(client);
aliguoriba223c22009-01-22 16:59:16 +00002079 }
2080}
2081
Paolo Bonzini51644ab2013-04-11 15:40:59 +02002082bool address_space_access_valid(AddressSpace *as, hwaddr addr, int len, bool is_write)
2083{
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002084 MemoryRegion *mr;
Paolo Bonzini51644ab2013-04-11 15:40:59 +02002085 hwaddr l, xlat;
2086
2087 while (len > 0) {
2088 l = len;
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002089 mr = address_space_translate(as, addr, &xlat, &l, is_write);
2090 if (!memory_access_is_direct(mr, is_write)) {
2091 l = memory_access_size(mr, l, addr);
2092 if (!memory_region_access_valid(mr, xlat, l, is_write)) {
Paolo Bonzini51644ab2013-04-11 15:40:59 +02002093 return false;
2094 }
2095 }
2096
2097 len -= l;
2098 addr += l;
2099 }
2100 return true;
2101}
2102
aliguori6d16c2f2009-01-22 16:59:11 +00002103/* Map a physical memory region into a host virtual address.
2104 * May map a subset of the requested range, given by and returned in *plen.
2105 * May return NULL if resources needed to perform the mapping are exhausted.
2106 * Use only for reads OR writes - not for read-modify-write operations.
aliguoriba223c22009-01-22 16:59:16 +00002107 * Use cpu_register_map_client() to know when retrying the map operation is
2108 * likely to succeed.
aliguori6d16c2f2009-01-22 16:59:11 +00002109 */
Avi Kivityac1970f2012-10-03 16:22:53 +02002110void *address_space_map(AddressSpace *as,
Avi Kivitya8170e52012-10-23 12:30:10 +02002111 hwaddr addr,
2112 hwaddr *plen,
Avi Kivityac1970f2012-10-03 16:22:53 +02002113 bool is_write)
aliguori6d16c2f2009-01-22 16:59:11 +00002114{
Avi Kivitya8170e52012-10-23 12:30:10 +02002115 hwaddr len = *plen;
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02002116 hwaddr done = 0;
2117 hwaddr l, xlat, base;
2118 MemoryRegion *mr, *this_mr;
2119 ram_addr_t raddr;
aliguori6d16c2f2009-01-22 16:59:11 +00002120
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02002121 if (len == 0) {
2122 return NULL;
2123 }
aliguori6d16c2f2009-01-22 16:59:11 +00002124
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02002125 l = len;
2126 mr = address_space_translate(as, addr, &xlat, &l, is_write);
2127 if (!memory_access_is_direct(mr, is_write)) {
2128 if (bounce.buffer) {
2129 return NULL;
aliguori6d16c2f2009-01-22 16:59:11 +00002130 }
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02002131 bounce.buffer = qemu_memalign(TARGET_PAGE_SIZE, TARGET_PAGE_SIZE);
2132 bounce.addr = addr;
2133 bounce.len = l;
Paolo Bonzinid3e71552013-06-28 17:33:29 +02002134
2135 memory_region_ref(mr);
2136 bounce.mr = mr;
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02002137 if (!is_write) {
2138 address_space_read(as, addr, bounce.buffer, l);
Stefano Stabellini8ab934f2011-06-27 18:26:06 +01002139 }
aliguori6d16c2f2009-01-22 16:59:11 +00002140
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02002141 *plen = l;
2142 return bounce.buffer;
2143 }
2144
2145 base = xlat;
2146 raddr = memory_region_get_ram_addr(mr);
2147
2148 for (;;) {
aliguori6d16c2f2009-01-22 16:59:11 +00002149 len -= l;
2150 addr += l;
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02002151 done += l;
2152 if (len == 0) {
2153 break;
2154 }
2155
2156 l = len;
2157 this_mr = address_space_translate(as, addr, &xlat, &l, is_write);
2158 if (this_mr != mr || xlat != base + done) {
2159 break;
2160 }
aliguori6d16c2f2009-01-22 16:59:11 +00002161 }
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02002162
Paolo Bonzinid3e71552013-06-28 17:33:29 +02002163 memory_region_ref(mr);
Paolo Bonzinie3127ae2013-06-28 17:29:27 +02002164 *plen = done;
2165 return qemu_ram_ptr_length(raddr + base, plen);
aliguori6d16c2f2009-01-22 16:59:11 +00002166}
2167
Avi Kivityac1970f2012-10-03 16:22:53 +02002168/* Unmaps a memory region previously mapped by address_space_map().
aliguori6d16c2f2009-01-22 16:59:11 +00002169 * Will also mark the memory as dirty if is_write == 1. access_len gives
2170 * the amount of memory that was actually read or written by the caller.
2171 */
Avi Kivitya8170e52012-10-23 12:30:10 +02002172void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len,
2173 int is_write, hwaddr access_len)
aliguori6d16c2f2009-01-22 16:59:11 +00002174{
2175 if (buffer != bounce.buffer) {
Paolo Bonzinid3e71552013-06-28 17:33:29 +02002176 MemoryRegion *mr;
2177 ram_addr_t addr1;
2178
2179 mr = qemu_ram_addr_from_host(buffer, &addr1);
2180 assert(mr != NULL);
aliguori6d16c2f2009-01-22 16:59:11 +00002181 if (is_write) {
aliguori6d16c2f2009-01-22 16:59:11 +00002182 while (access_len) {
2183 unsigned l;
2184 l = TARGET_PAGE_SIZE;
2185 if (l > access_len)
2186 l = access_len;
Anthony PERARD51d7a9e2012-10-03 13:49:05 +00002187 invalidate_and_set_dirty(addr1, l);
aliguori6d16c2f2009-01-22 16:59:11 +00002188 addr1 += l;
2189 access_len -= l;
2190 }
2191 }
Jan Kiszka868bb332011-06-21 22:59:09 +02002192 if (xen_enabled()) {
Jan Kiszkae41d7c62011-06-21 22:59:08 +02002193 xen_invalidate_map_cache_entry(buffer);
Anthony PERARD050a0dd2010-09-16 13:57:49 +01002194 }
Paolo Bonzinid3e71552013-06-28 17:33:29 +02002195 memory_region_unref(mr);
aliguori6d16c2f2009-01-22 16:59:11 +00002196 return;
2197 }
2198 if (is_write) {
Avi Kivityac1970f2012-10-03 16:22:53 +02002199 address_space_write(as, bounce.addr, bounce.buffer, access_len);
aliguori6d16c2f2009-01-22 16:59:11 +00002200 }
Herve Poussineauf8a83242010-01-24 21:23:56 +00002201 qemu_vfree(bounce.buffer);
aliguori6d16c2f2009-01-22 16:59:11 +00002202 bounce.buffer = NULL;
Paolo Bonzinid3e71552013-06-28 17:33:29 +02002203 memory_region_unref(bounce.mr);
aliguoriba223c22009-01-22 16:59:16 +00002204 cpu_notify_map_clients();
aliguori6d16c2f2009-01-22 16:59:11 +00002205}
bellardd0ecd2a2006-04-23 17:14:48 +00002206
Avi Kivitya8170e52012-10-23 12:30:10 +02002207void *cpu_physical_memory_map(hwaddr addr,
2208 hwaddr *plen,
Avi Kivityac1970f2012-10-03 16:22:53 +02002209 int is_write)
2210{
2211 return address_space_map(&address_space_memory, addr, plen, is_write);
2212}
2213
Avi Kivitya8170e52012-10-23 12:30:10 +02002214void cpu_physical_memory_unmap(void *buffer, hwaddr len,
2215 int is_write, hwaddr access_len)
Avi Kivityac1970f2012-10-03 16:22:53 +02002216{
2217 return address_space_unmap(&address_space_memory, buffer, len, is_write, access_len);
2218}
2219
bellard8df1cd02005-01-28 22:37:22 +00002220/* warning: addr must be aligned */
Avi Kivitya8170e52012-10-23 12:30:10 +02002221static inline uint32_t ldl_phys_internal(hwaddr addr,
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002222 enum device_endian endian)
bellard8df1cd02005-01-28 22:37:22 +00002223{
bellard8df1cd02005-01-28 22:37:22 +00002224 uint8_t *ptr;
Paolo Bonzini791af8c2013-05-24 16:10:39 +02002225 uint64_t val;
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002226 MemoryRegion *mr;
Paolo Bonzini149f54b2013-05-24 12:59:37 +02002227 hwaddr l = 4;
2228 hwaddr addr1;
bellard8df1cd02005-01-28 22:37:22 +00002229
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002230 mr = address_space_translate(&address_space_memory, addr, &addr1, &l,
2231 false);
2232 if (l < 4 || !memory_access_is_direct(mr, false)) {
bellard8df1cd02005-01-28 22:37:22 +00002233 /* I/O case */
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002234 io_mem_read(mr, addr1, &val, 4);
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002235#if defined(TARGET_WORDS_BIGENDIAN)
2236 if (endian == DEVICE_LITTLE_ENDIAN) {
2237 val = bswap32(val);
2238 }
2239#else
2240 if (endian == DEVICE_BIG_ENDIAN) {
2241 val = bswap32(val);
2242 }
2243#endif
bellard8df1cd02005-01-28 22:37:22 +00002244 } else {
2245 /* RAM case */
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002246 ptr = qemu_get_ram_ptr((memory_region_get_ram_addr(mr)
Avi Kivity06ef3522012-02-13 16:11:22 +02002247 & TARGET_PAGE_MASK)
Paolo Bonzini149f54b2013-05-24 12:59:37 +02002248 + addr1);
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002249 switch (endian) {
2250 case DEVICE_LITTLE_ENDIAN:
2251 val = ldl_le_p(ptr);
2252 break;
2253 case DEVICE_BIG_ENDIAN:
2254 val = ldl_be_p(ptr);
2255 break;
2256 default:
2257 val = ldl_p(ptr);
2258 break;
2259 }
bellard8df1cd02005-01-28 22:37:22 +00002260 }
2261 return val;
2262}
2263
Avi Kivitya8170e52012-10-23 12:30:10 +02002264uint32_t ldl_phys(hwaddr addr)
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002265{
2266 return ldl_phys_internal(addr, DEVICE_NATIVE_ENDIAN);
2267}
2268
Avi Kivitya8170e52012-10-23 12:30:10 +02002269uint32_t ldl_le_phys(hwaddr addr)
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002270{
2271 return ldl_phys_internal(addr, DEVICE_LITTLE_ENDIAN);
2272}
2273
Avi Kivitya8170e52012-10-23 12:30:10 +02002274uint32_t ldl_be_phys(hwaddr addr)
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002275{
2276 return ldl_phys_internal(addr, DEVICE_BIG_ENDIAN);
2277}
2278
bellard84b7b8e2005-11-28 21:19:04 +00002279/* warning: addr must be aligned */
Avi Kivitya8170e52012-10-23 12:30:10 +02002280static inline uint64_t ldq_phys_internal(hwaddr addr,
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002281 enum device_endian endian)
bellard84b7b8e2005-11-28 21:19:04 +00002282{
bellard84b7b8e2005-11-28 21:19:04 +00002283 uint8_t *ptr;
2284 uint64_t val;
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002285 MemoryRegion *mr;
Paolo Bonzini149f54b2013-05-24 12:59:37 +02002286 hwaddr l = 8;
2287 hwaddr addr1;
bellard84b7b8e2005-11-28 21:19:04 +00002288
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002289 mr = address_space_translate(&address_space_memory, addr, &addr1, &l,
2290 false);
2291 if (l < 8 || !memory_access_is_direct(mr, false)) {
bellard84b7b8e2005-11-28 21:19:04 +00002292 /* I/O case */
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002293 io_mem_read(mr, addr1, &val, 8);
Paolo Bonzini968a5622013-05-24 17:58:37 +02002294#if defined(TARGET_WORDS_BIGENDIAN)
2295 if (endian == DEVICE_LITTLE_ENDIAN) {
2296 val = bswap64(val);
2297 }
2298#else
2299 if (endian == DEVICE_BIG_ENDIAN) {
2300 val = bswap64(val);
2301 }
2302#endif
bellard84b7b8e2005-11-28 21:19:04 +00002303 } else {
2304 /* RAM case */
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002305 ptr = qemu_get_ram_ptr((memory_region_get_ram_addr(mr)
Avi Kivity06ef3522012-02-13 16:11:22 +02002306 & TARGET_PAGE_MASK)
Paolo Bonzini149f54b2013-05-24 12:59:37 +02002307 + addr1);
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002308 switch (endian) {
2309 case DEVICE_LITTLE_ENDIAN:
2310 val = ldq_le_p(ptr);
2311 break;
2312 case DEVICE_BIG_ENDIAN:
2313 val = ldq_be_p(ptr);
2314 break;
2315 default:
2316 val = ldq_p(ptr);
2317 break;
2318 }
bellard84b7b8e2005-11-28 21:19:04 +00002319 }
2320 return val;
2321}
2322
Avi Kivitya8170e52012-10-23 12:30:10 +02002323uint64_t ldq_phys(hwaddr addr)
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002324{
2325 return ldq_phys_internal(addr, DEVICE_NATIVE_ENDIAN);
2326}
2327
Avi Kivitya8170e52012-10-23 12:30:10 +02002328uint64_t ldq_le_phys(hwaddr addr)
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002329{
2330 return ldq_phys_internal(addr, DEVICE_LITTLE_ENDIAN);
2331}
2332
Avi Kivitya8170e52012-10-23 12:30:10 +02002333uint64_t ldq_be_phys(hwaddr addr)
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002334{
2335 return ldq_phys_internal(addr, DEVICE_BIG_ENDIAN);
2336}
2337
bellardaab33092005-10-30 20:48:42 +00002338/* XXX: optimize */
Avi Kivitya8170e52012-10-23 12:30:10 +02002339uint32_t ldub_phys(hwaddr addr)
bellardaab33092005-10-30 20:48:42 +00002340{
2341 uint8_t val;
2342 cpu_physical_memory_read(addr, &val, 1);
2343 return val;
2344}
2345
Michael S. Tsirkin733f0b02010-04-06 14:18:19 +03002346/* warning: addr must be aligned */
Avi Kivitya8170e52012-10-23 12:30:10 +02002347static inline uint32_t lduw_phys_internal(hwaddr addr,
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002348 enum device_endian endian)
bellardaab33092005-10-30 20:48:42 +00002349{
Michael S. Tsirkin733f0b02010-04-06 14:18:19 +03002350 uint8_t *ptr;
2351 uint64_t val;
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002352 MemoryRegion *mr;
Paolo Bonzini149f54b2013-05-24 12:59:37 +02002353 hwaddr l = 2;
2354 hwaddr addr1;
Michael S. Tsirkin733f0b02010-04-06 14:18:19 +03002355
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002356 mr = address_space_translate(&address_space_memory, addr, &addr1, &l,
2357 false);
2358 if (l < 2 || !memory_access_is_direct(mr, false)) {
Michael S. Tsirkin733f0b02010-04-06 14:18:19 +03002359 /* I/O case */
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002360 io_mem_read(mr, addr1, &val, 2);
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002361#if defined(TARGET_WORDS_BIGENDIAN)
2362 if (endian == DEVICE_LITTLE_ENDIAN) {
2363 val = bswap16(val);
2364 }
2365#else
2366 if (endian == DEVICE_BIG_ENDIAN) {
2367 val = bswap16(val);
2368 }
2369#endif
Michael S. Tsirkin733f0b02010-04-06 14:18:19 +03002370 } else {
2371 /* RAM case */
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002372 ptr = qemu_get_ram_ptr((memory_region_get_ram_addr(mr)
Avi Kivity06ef3522012-02-13 16:11:22 +02002373 & TARGET_PAGE_MASK)
Paolo Bonzini149f54b2013-05-24 12:59:37 +02002374 + addr1);
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002375 switch (endian) {
2376 case DEVICE_LITTLE_ENDIAN:
2377 val = lduw_le_p(ptr);
2378 break;
2379 case DEVICE_BIG_ENDIAN:
2380 val = lduw_be_p(ptr);
2381 break;
2382 default:
2383 val = lduw_p(ptr);
2384 break;
2385 }
Michael S. Tsirkin733f0b02010-04-06 14:18:19 +03002386 }
2387 return val;
bellardaab33092005-10-30 20:48:42 +00002388}
2389
Avi Kivitya8170e52012-10-23 12:30:10 +02002390uint32_t lduw_phys(hwaddr addr)
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002391{
2392 return lduw_phys_internal(addr, DEVICE_NATIVE_ENDIAN);
2393}
2394
Avi Kivitya8170e52012-10-23 12:30:10 +02002395uint32_t lduw_le_phys(hwaddr addr)
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002396{
2397 return lduw_phys_internal(addr, DEVICE_LITTLE_ENDIAN);
2398}
2399
Avi Kivitya8170e52012-10-23 12:30:10 +02002400uint32_t lduw_be_phys(hwaddr addr)
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002401{
2402 return lduw_phys_internal(addr, DEVICE_BIG_ENDIAN);
2403}
2404
bellard8df1cd02005-01-28 22:37:22 +00002405/* warning: addr must be aligned. The ram page is not masked as dirty
2406 and the code inside is not invalidated. It is useful if the dirty
2407 bits are used to track modified PTEs */
Avi Kivitya8170e52012-10-23 12:30:10 +02002408void stl_phys_notdirty(hwaddr addr, uint32_t val)
bellard8df1cd02005-01-28 22:37:22 +00002409{
bellard8df1cd02005-01-28 22:37:22 +00002410 uint8_t *ptr;
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002411 MemoryRegion *mr;
Paolo Bonzini149f54b2013-05-24 12:59:37 +02002412 hwaddr l = 4;
2413 hwaddr addr1;
bellard8df1cd02005-01-28 22:37:22 +00002414
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002415 mr = address_space_translate(&address_space_memory, addr, &addr1, &l,
2416 true);
2417 if (l < 4 || !memory_access_is_direct(mr, true)) {
2418 io_mem_write(mr, addr1, val, 4);
bellard8df1cd02005-01-28 22:37:22 +00002419 } else {
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002420 addr1 += memory_region_get_ram_addr(mr) & TARGET_PAGE_MASK;
pbrook5579c7f2009-04-11 14:47:08 +00002421 ptr = qemu_get_ram_ptr(addr1);
bellard8df1cd02005-01-28 22:37:22 +00002422 stl_p(ptr, val);
aliguori74576192008-10-06 14:02:03 +00002423
2424 if (unlikely(in_migration)) {
2425 if (!cpu_physical_memory_is_dirty(addr1)) {
2426 /* invalidate code */
2427 tb_invalidate_phys_page_range(addr1, addr1 + 4, 0);
2428 /* set dirty bit */
Yoshiaki Tamuraf7c11b52010-03-23 16:39:53 +09002429 cpu_physical_memory_set_dirty_flags(
2430 addr1, (0xff & ~CODE_DIRTY_FLAG));
aliguori74576192008-10-06 14:02:03 +00002431 }
2432 }
bellard8df1cd02005-01-28 22:37:22 +00002433 }
2434}
2435
2436/* warning: addr must be aligned */
Avi Kivitya8170e52012-10-23 12:30:10 +02002437static inline void stl_phys_internal(hwaddr addr, uint32_t val,
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002438 enum device_endian endian)
bellard8df1cd02005-01-28 22:37:22 +00002439{
bellard8df1cd02005-01-28 22:37:22 +00002440 uint8_t *ptr;
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002441 MemoryRegion *mr;
Paolo Bonzini149f54b2013-05-24 12:59:37 +02002442 hwaddr l = 4;
2443 hwaddr addr1;
bellard8df1cd02005-01-28 22:37:22 +00002444
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002445 mr = address_space_translate(&address_space_memory, addr, &addr1, &l,
2446 true);
2447 if (l < 4 || !memory_access_is_direct(mr, true)) {
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002448#if defined(TARGET_WORDS_BIGENDIAN)
2449 if (endian == DEVICE_LITTLE_ENDIAN) {
2450 val = bswap32(val);
2451 }
2452#else
2453 if (endian == DEVICE_BIG_ENDIAN) {
2454 val = bswap32(val);
2455 }
2456#endif
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002457 io_mem_write(mr, addr1, val, 4);
bellard8df1cd02005-01-28 22:37:22 +00002458 } else {
bellard8df1cd02005-01-28 22:37:22 +00002459 /* RAM case */
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002460 addr1 += memory_region_get_ram_addr(mr) & TARGET_PAGE_MASK;
pbrook5579c7f2009-04-11 14:47:08 +00002461 ptr = qemu_get_ram_ptr(addr1);
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002462 switch (endian) {
2463 case DEVICE_LITTLE_ENDIAN:
2464 stl_le_p(ptr, val);
2465 break;
2466 case DEVICE_BIG_ENDIAN:
2467 stl_be_p(ptr, val);
2468 break;
2469 default:
2470 stl_p(ptr, val);
2471 break;
2472 }
Anthony PERARD51d7a9e2012-10-03 13:49:05 +00002473 invalidate_and_set_dirty(addr1, 4);
bellard8df1cd02005-01-28 22:37:22 +00002474 }
2475}
2476
Avi Kivitya8170e52012-10-23 12:30:10 +02002477void stl_phys(hwaddr addr, uint32_t val)
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002478{
2479 stl_phys_internal(addr, val, DEVICE_NATIVE_ENDIAN);
2480}
2481
Avi Kivitya8170e52012-10-23 12:30:10 +02002482void stl_le_phys(hwaddr addr, uint32_t val)
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002483{
2484 stl_phys_internal(addr, val, DEVICE_LITTLE_ENDIAN);
2485}
2486
Avi Kivitya8170e52012-10-23 12:30:10 +02002487void stl_be_phys(hwaddr addr, uint32_t val)
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002488{
2489 stl_phys_internal(addr, val, DEVICE_BIG_ENDIAN);
2490}
2491
bellardaab33092005-10-30 20:48:42 +00002492/* XXX: optimize */
Avi Kivitya8170e52012-10-23 12:30:10 +02002493void stb_phys(hwaddr addr, uint32_t val)
bellardaab33092005-10-30 20:48:42 +00002494{
2495 uint8_t v = val;
2496 cpu_physical_memory_write(addr, &v, 1);
2497}
2498
Michael S. Tsirkin733f0b02010-04-06 14:18:19 +03002499/* warning: addr must be aligned */
Avi Kivitya8170e52012-10-23 12:30:10 +02002500static inline void stw_phys_internal(hwaddr addr, uint32_t val,
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002501 enum device_endian endian)
bellardaab33092005-10-30 20:48:42 +00002502{
Michael S. Tsirkin733f0b02010-04-06 14:18:19 +03002503 uint8_t *ptr;
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002504 MemoryRegion *mr;
Paolo Bonzini149f54b2013-05-24 12:59:37 +02002505 hwaddr l = 2;
2506 hwaddr addr1;
Michael S. Tsirkin733f0b02010-04-06 14:18:19 +03002507
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002508 mr = address_space_translate(&address_space_memory, addr, &addr1, &l,
2509 true);
2510 if (l < 2 || !memory_access_is_direct(mr, true)) {
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002511#if defined(TARGET_WORDS_BIGENDIAN)
2512 if (endian == DEVICE_LITTLE_ENDIAN) {
2513 val = bswap16(val);
2514 }
2515#else
2516 if (endian == DEVICE_BIG_ENDIAN) {
2517 val = bswap16(val);
2518 }
2519#endif
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002520 io_mem_write(mr, addr1, val, 2);
Michael S. Tsirkin733f0b02010-04-06 14:18:19 +03002521 } else {
Michael S. Tsirkin733f0b02010-04-06 14:18:19 +03002522 /* RAM case */
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002523 addr1 += memory_region_get_ram_addr(mr) & TARGET_PAGE_MASK;
Michael S. Tsirkin733f0b02010-04-06 14:18:19 +03002524 ptr = qemu_get_ram_ptr(addr1);
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002525 switch (endian) {
2526 case DEVICE_LITTLE_ENDIAN:
2527 stw_le_p(ptr, val);
2528 break;
2529 case DEVICE_BIG_ENDIAN:
2530 stw_be_p(ptr, val);
2531 break;
2532 default:
2533 stw_p(ptr, val);
2534 break;
2535 }
Anthony PERARD51d7a9e2012-10-03 13:49:05 +00002536 invalidate_and_set_dirty(addr1, 2);
Michael S. Tsirkin733f0b02010-04-06 14:18:19 +03002537 }
bellardaab33092005-10-30 20:48:42 +00002538}
2539
Avi Kivitya8170e52012-10-23 12:30:10 +02002540void stw_phys(hwaddr addr, uint32_t val)
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002541{
2542 stw_phys_internal(addr, val, DEVICE_NATIVE_ENDIAN);
2543}
2544
Avi Kivitya8170e52012-10-23 12:30:10 +02002545void stw_le_phys(hwaddr addr, uint32_t val)
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002546{
2547 stw_phys_internal(addr, val, DEVICE_LITTLE_ENDIAN);
2548}
2549
Avi Kivitya8170e52012-10-23 12:30:10 +02002550void stw_be_phys(hwaddr addr, uint32_t val)
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002551{
2552 stw_phys_internal(addr, val, DEVICE_BIG_ENDIAN);
2553}
2554
bellardaab33092005-10-30 20:48:42 +00002555/* XXX: optimize */
Avi Kivitya8170e52012-10-23 12:30:10 +02002556void stq_phys(hwaddr addr, uint64_t val)
bellardaab33092005-10-30 20:48:42 +00002557{
2558 val = tswap64(val);
Stefan Weil71d2b722011-03-26 21:06:56 +01002559 cpu_physical_memory_write(addr, &val, 8);
bellardaab33092005-10-30 20:48:42 +00002560}
2561
Avi Kivitya8170e52012-10-23 12:30:10 +02002562void stq_le_phys(hwaddr addr, uint64_t val)
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002563{
2564 val = cpu_to_le64(val);
2565 cpu_physical_memory_write(addr, &val, 8);
2566}
2567
Avi Kivitya8170e52012-10-23 12:30:10 +02002568void stq_be_phys(hwaddr addr, uint64_t val)
Alexander Graf1e78bcc2011-07-06 09:09:23 +02002569{
2570 val = cpu_to_be64(val);
2571 cpu_physical_memory_write(addr, &val, 8);
2572}
2573
aliguori5e2972f2009-03-28 17:51:36 +00002574/* virtual memory access for debug (includes writing to ROM) */
Andreas Färber9349b4f2012-03-14 01:38:32 +01002575int cpu_memory_rw_debug(CPUArchState *env, target_ulong addr,
bellardb448f2f2004-02-25 23:24:04 +00002576 uint8_t *buf, int len, int is_write)
bellard13eb76e2004-01-24 15:23:36 +00002577{
2578 int l;
Avi Kivitya8170e52012-10-23 12:30:10 +02002579 hwaddr phys_addr;
j_mayer9b3c35e2007-04-07 11:21:28 +00002580 target_ulong page;
bellard13eb76e2004-01-24 15:23:36 +00002581
2582 while (len > 0) {
2583 page = addr & TARGET_PAGE_MASK;
2584 phys_addr = cpu_get_phys_page_debug(env, page);
2585 /* if no physical page mapped, return an error */
2586 if (phys_addr == -1)
2587 return -1;
2588 l = (page + TARGET_PAGE_SIZE) - addr;
2589 if (l > len)
2590 l = len;
aliguori5e2972f2009-03-28 17:51:36 +00002591 phys_addr += (addr & ~TARGET_PAGE_MASK);
aliguori5e2972f2009-03-28 17:51:36 +00002592 if (is_write)
2593 cpu_physical_memory_write_rom(phys_addr, buf, l);
2594 else
aliguori5e2972f2009-03-28 17:51:36 +00002595 cpu_physical_memory_rw(phys_addr, buf, l, is_write);
bellard13eb76e2004-01-24 15:23:36 +00002596 len -= l;
2597 buf += l;
2598 addr += l;
2599 }
2600 return 0;
2601}
Paul Brooka68fe892010-03-01 00:08:59 +00002602#endif
bellard13eb76e2004-01-24 15:23:36 +00002603
Blue Swirl8e4a4242013-01-06 18:30:17 +00002604#if !defined(CONFIG_USER_ONLY)
2605
2606/*
2607 * A helper function for the _utterly broken_ virtio device model to find out if
2608 * it's running on a big endian machine. Don't do this at home kids!
2609 */
2610bool virtio_is_big_endian(void);
2611bool virtio_is_big_endian(void)
2612{
2613#if defined(TARGET_WORDS_BIGENDIAN)
2614 return true;
2615#else
2616 return false;
2617#endif
2618}
2619
2620#endif
2621
Wen Congyang76f35532012-05-07 12:04:18 +08002622#ifndef CONFIG_USER_ONLY
Avi Kivitya8170e52012-10-23 12:30:10 +02002623bool cpu_physical_memory_is_io(hwaddr phys_addr)
Wen Congyang76f35532012-05-07 12:04:18 +08002624{
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002625 MemoryRegion*mr;
Paolo Bonzini149f54b2013-05-24 12:59:37 +02002626 hwaddr l = 1;
Wen Congyang76f35532012-05-07 12:04:18 +08002627
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002628 mr = address_space_translate(&address_space_memory,
2629 phys_addr, &phys_addr, &l, false);
Wen Congyang76f35532012-05-07 12:04:18 +08002630
Paolo Bonzini5c8a00c2013-05-29 12:42:00 +02002631 return !(memory_region_is_ram(mr) ||
2632 memory_region_is_romd(mr));
Wen Congyang76f35532012-05-07 12:04:18 +08002633}
Michael R. Hinesbd2fa512013-06-25 21:35:34 -04002634
2635void qemu_ram_foreach_block(RAMBlockIterFunc func, void *opaque)
2636{
2637 RAMBlock *block;
2638
2639 QTAILQ_FOREACH(block, &ram_list.blocks, next) {
2640 func(block->host, block->offset, block->length, opaque);
2641 }
2642}
Peter Maydellec3f8c92013-06-27 20:53:38 +01002643#endif