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Radomir Dopieralski8e7dfea2016-06-07 21:40:56 +02001/*
2* The MIT License (MIT)
3*
4* Copyright (c) 2015 David Ogilvy (MetalPhreak)
5* Modified 2016 by Radomir Dopieralski
6*
7* Permission is hereby granted, free of charge, to any person obtaining a copy
8* of this software and associated documentation files (the "Software"), to deal
9* in the Software without restriction, including without limitation the rights
10* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11* copies of the Software, and to permit persons to whom the Software is
12* furnished to do so, subject to the following conditions:
13*
14* The above copyright notice and this permission notice shall be included in all
15* copies or substantial portions of the Software.
16*
17* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
20* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23* SOFTWARE.
24*/
25
26#ifndef SPI_APP_H
27#define SPI_APP_H
28
29#include "hspi_register.h"
30#include "ets_sys.h"
31#include "osapi.h"
32#include "os_type.h"
33
34// Define SPI hardware modules
35#define SPI 0
36#define HSPI 1
37
38#define SPI_CLK_USE_DIV 0
39#define SPI_CLK_80MHZ_NODIV 1
40
41#define SPI_BYTE_ORDER_HIGH_TO_LOW 1
42#define SPI_BYTE_ORDER_LOW_TO_HIGH 0
43
44#ifndef CPU_CLK_FREQ //Should already be defined in eagle_soc.h
45#define CPU_CLK_FREQ (80 * 1000000)
46#endif
47
48// Define some default SPI clock settings
49#define SPI_CLK_PREDIV 10
50#define SPI_CLK_CNTDIV 2
51#define SPI_CLK_FREQ (CPU_CLK_FREQ / (SPI_CLK_PREDIV * SPI_CLK_CNTDIV))
52// 80 / 20 = 4 MHz
53
54void spi_init(uint8_t spi_no);
55void spi_mode(uint8_t spi_no, uint8_t spi_cpha,uint8_t spi_cpol);
56void spi_init_gpio(uint8_t spi_no, uint8_t sysclk_as_spiclk);
57void spi_clock(uint8_t spi_no, uint16_t prediv, uint8_t cntdiv);
58void spi_tx_byte_order(uint8_t spi_no, uint8_t byte_order);
59void spi_rx_byte_order(uint8_t spi_no, uint8_t byte_order);
60uint32_t spi_transaction(uint8_t spi_no, uint8_t cmd_bits, uint16_t cmd_data,
61 uint32_t addr_bits, uint32_t addr_data,
62 uint32_t dout_bits, uint32_t dout_data,
63 uint32_t din_bits, uint32_t dummy_bits);
64void spi_tx8fast(uint8_t spi_no, uint8_t dout_data);
65
66// Expansion Macros
67#define spi_busy(spi_no) READ_PERI_REG(SPI_CMD(spi_no))&SPI_USR
68
69#define spi_txd(spi_no, bits, data) spi_transaction(spi_no, 0, 0, 0, 0, bits, (uint32_t) data, 0, 0)
70#define spi_tx8(spi_no, data) spi_transaction(spi_no, 0, 0, 0, 0, 8, (uint32_t) data, 0, 0)
71#define spi_tx16(spi_no, data) spi_transaction(spi_no, 0, 0, 0, 0, 16, (uint32_t) data, 0, 0)
72#define spi_tx32(spi_no, data) spi_transaction(spi_no, 0, 0, 0, 0, 32, (uint32_t) data, 0, 0)
73
74#define spi_rxd(spi_no, bits) spi_transaction(spi_no, 0, 0, 0, 0, 0, 0, bits, 0)
75#define spi_rx8(spi_no) spi_transaction(spi_no, 0, 0, 0, 0, 0, 0, 8, 0)
76#define spi_rx16(spi_no) spi_transaction(spi_no, 0, 0, 0, 0, 0, 0, 16, 0)
77#define spi_rx32(spi_no) spi_transaction(spi_no, 0, 0, 0, 0, 0, 0, 32, 0)
78
79#endif