blob: d72603f648e6a48a1efe3d6ef2bc0c7fd43ad95f [file] [log] [blame]
Damien George784e0232017-01-24 16:56:03 +11001/*
2 * This file is part of the MicroPython project, http://micropython.org/
3 *
4 * The MIT License (MIT)
5 *
Damien George4e487002018-03-02 16:01:18 +11006 * Copyright (c) 2016-2018 Damien P. George
Damien George784e0232017-01-24 16:56:03 +11007 *
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
21 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24 * THE SOFTWARE.
25 */
26
27#include <stdio.h>
28#include <string.h>
29
30#include "py/mperrno.h"
31#include "py/mphal.h"
Damien George784e0232017-01-24 16:56:03 +110032#include "drivers/memory/spiflash.h"
33
Damien George4e487002018-03-02 16:01:18 +110034#define QSPI_QE_MASK (0x02)
35#define USE_WR_DELAY (1)
36
37#define CMD_WRSR (0x01)
38#define CMD_WRITE (0x02)
39#define CMD_READ (0x03)
40#define CMD_RDSR (0x05)
41#define CMD_WREN (0x06)
42#define CMD_SEC_ERASE (0x20)
43#define CMD_RDCR (0x35)
44#define CMD_RD_DEVID (0x9f)
45#define CMD_CHIP_ERASE (0xc7)
46#define CMD_C4READ (0xeb)
47
Damien George784e0232017-01-24 16:56:03 +110048#define WAIT_SR_TIMEOUT (1000000)
49
50#define PAGE_SIZE (256) // maximum bytes we can write in one SPI transfer
51#define SECTOR_SIZE (4096) // size of erase sector
52
53// Note: this code is not reentrant with this shared buffer
Damien George4e487002018-03-02 16:01:18 +110054STATIC uint8_t buf[SECTOR_SIZE] __attribute__((aligned(4)));
55STATIC mp_spiflash_t *bufuser; // current user of buf
56STATIC uint32_t bufsec; // current sector stored in buf; 0xffffffff if invalid
Damien George784e0232017-01-24 16:56:03 +110057
58STATIC void mp_spiflash_acquire_bus(mp_spiflash_t *self) {
Damien George4e487002018-03-02 16:01:18 +110059 const mp_spiflash_config_t *c = self->config;
60 if (c->bus_kind == MP_SPIFLASH_BUS_QSPI) {
61 c->bus.u_qspi.proto->ioctl(c->bus.u_qspi.data, MP_QSPI_IOCTL_BUS_ACQUIRE);
62 }
Damien George784e0232017-01-24 16:56:03 +110063}
64
65STATIC void mp_spiflash_release_bus(mp_spiflash_t *self) {
Damien George4e487002018-03-02 16:01:18 +110066 const mp_spiflash_config_t *c = self->config;
67 if (c->bus_kind == MP_SPIFLASH_BUS_QSPI) {
68 c->bus.u_qspi.proto->ioctl(c->bus.u_qspi.data, MP_QSPI_IOCTL_BUS_RELEASE);
69 }
Damien George784e0232017-01-24 16:56:03 +110070}
71
Damien George4e487002018-03-02 16:01:18 +110072STATIC void mp_spiflash_write_cmd_data(mp_spiflash_t *self, uint8_t cmd, size_t len, uint32_t data) {
73 const mp_spiflash_config_t *c = self->config;
74 if (c->bus_kind == MP_SPIFLASH_BUS_SPI) {
75 // Note: len/data are unused for standard SPI
76 mp_hal_pin_write(c->bus.u_spi.cs, 0);
77 c->bus.u_spi.proto->transfer(c->bus.u_spi.data, 1, &cmd, NULL);
78 mp_hal_pin_write(c->bus.u_spi.cs, 1);
79 } else {
80 c->bus.u_qspi.proto->write_cmd_data(c->bus.u_qspi.data, cmd, len, data);
81 }
82}
83
84STATIC void mp_spiflash_write_cmd_addr_data(mp_spiflash_t *self, uint8_t cmd, uint32_t addr, size_t len, const uint8_t *src) {
85 const mp_spiflash_config_t *c = self->config;
86 if (c->bus_kind == MP_SPIFLASH_BUS_SPI) {
87 uint8_t buf[4] = {cmd, addr >> 16, addr >> 8, addr};
88 mp_hal_pin_write(c->bus.u_spi.cs, 0);
89 c->bus.u_spi.proto->transfer(c->bus.u_spi.data, 4, buf, NULL);
90 if (len) {
91 c->bus.u_spi.proto->transfer(c->bus.u_spi.data, len, src, NULL);
92 }
93 mp_hal_pin_write(c->bus.u_spi.cs, 1);
94 } else {
95 c->bus.u_qspi.proto->write_cmd_addr_data(c->bus.u_qspi.data, cmd, addr, len, src);
96 }
97}
98
99STATIC uint32_t mp_spiflash_read_cmd(mp_spiflash_t *self, uint8_t cmd, size_t len) {
100 const mp_spiflash_config_t *c = self->config;
101 if (c->bus_kind == MP_SPIFLASH_BUS_SPI) {
102 uint32_t buf;
103 mp_hal_pin_write(c->bus.u_spi.cs, 0);
104 c->bus.u_spi.proto->transfer(c->bus.u_spi.data, 1, &cmd, NULL);
105 c->bus.u_spi.proto->transfer(c->bus.u_spi.data, len, (void*)&buf, (void*)&buf);
106 mp_hal_pin_write(c->bus.u_spi.cs, 1);
107 return buf;
108 } else {
109 return c->bus.u_qspi.proto->read_cmd(c->bus.u_qspi.data, cmd, len);
110 }
111}
112
113STATIC void mp_spiflash_read_data(mp_spiflash_t *self, uint32_t addr, size_t len, uint8_t *dest) {
114 const mp_spiflash_config_t *c = self->config;
115 if (c->bus_kind == MP_SPIFLASH_BUS_SPI) {
116 uint8_t buf[4] = {CMD_READ, addr >> 16, addr >> 8, addr};
117 mp_hal_pin_write(c->bus.u_spi.cs, 0);
118 c->bus.u_spi.proto->transfer(c->bus.u_spi.data, 4, buf, NULL);
119 c->bus.u_spi.proto->transfer(c->bus.u_spi.data, len, dest, dest);
120 mp_hal_pin_write(c->bus.u_spi.cs, 1);
121 } else {
122 c->bus.u_qspi.proto->read_cmd_qaddr_qdata(c->bus.u_qspi.data, CMD_C4READ, addr, len, dest);
123 }
124}
125
126STATIC void mp_spiflash_write_cmd(mp_spiflash_t *self, uint8_t cmd) {
127 mp_spiflash_write_cmd_data(self, cmd, 0, 0);
128}
129
130STATIC void mp_spiflash_write_cmd_addr(mp_spiflash_t *self, uint8_t cmd, uint32_t addr) {
131 mp_spiflash_write_cmd_addr_data(self, cmd, addr, 0, NULL);
Damien George784e0232017-01-24 16:56:03 +1100132}
133
134STATIC int mp_spiflash_wait_sr(mp_spiflash_t *self, uint8_t mask, uint8_t val, uint32_t timeout) {
Damien George4e487002018-03-02 16:01:18 +1100135 uint8_t sr;
Damien George784e0232017-01-24 16:56:03 +1100136 for (; timeout; --timeout) {
Damien George4e487002018-03-02 16:01:18 +1100137 sr = mp_spiflash_read_cmd(self, CMD_RDSR, 1);
138 if ((sr & mask) == val) {
Damien George784e0232017-01-24 16:56:03 +1100139 break;
140 }
141 }
Damien George4e487002018-03-02 16:01:18 +1100142 if ((sr & mask) == val) {
Damien George784e0232017-01-24 16:56:03 +1100143 return 0; // success
144 } else if (timeout == 0) {
145 return -MP_ETIMEDOUT;
146 } else {
147 return -MP_EIO;
148 }
149}
150
151STATIC int mp_spiflash_wait_wel1(mp_spiflash_t *self) {
152 return mp_spiflash_wait_sr(self, 2, 2, WAIT_SR_TIMEOUT);
153}
154
155STATIC int mp_spiflash_wait_wip0(mp_spiflash_t *self) {
156 return mp_spiflash_wait_sr(self, 1, 0, WAIT_SR_TIMEOUT);
157}
158
Damien George4e487002018-03-02 16:01:18 +1100159void mp_spiflash_init(mp_spiflash_t *self) {
160 self->flags = 0;
161
162 if (self->config->bus_kind == MP_SPIFLASH_BUS_SPI) {
163 mp_hal_pin_write(self->config->bus.u_spi.cs, 1);
164 mp_hal_pin_output(self->config->bus.u_spi.cs);
Damien Georgea739b352018-03-09 17:32:28 +1100165 self->config->bus.u_spi.proto->ioctl(self->config->bus.u_spi.data, MP_SPI_IOCTL_INIT);
Damien George4e487002018-03-02 16:01:18 +1100166 } else {
167 self->config->bus.u_qspi.proto->ioctl(self->config->bus.u_qspi.data, MP_QSPI_IOCTL_INIT);
168 }
169
170 mp_spiflash_acquire_bus(self);
171
172 #if defined(CHECK_DEVID)
173 // Validate device id
174 uint32_t devid = mp_spiflash_read_cmd(self, CMD_RD_DEVID, 3);
175 if (devid != CHECK_DEVID) {
176 return 0;
177 }
178 #endif
179
180 if (self->config->bus_kind == MP_SPIFLASH_BUS_QSPI) {
181 // Set QE bit
182 uint32_t data = (mp_spiflash_read_cmd(self, CMD_RDSR, 1) & 0xff)
183 | (mp_spiflash_read_cmd(self, CMD_RDCR, 1) & 0xff) << 8;
Damien Georgecc34b082018-03-11 11:25:38 +1100184 if (!(data & (QSPI_QE_MASK << 8))) {
185 data |= QSPI_QE_MASK << 8;
Damien George4e487002018-03-02 16:01:18 +1100186 mp_spiflash_write_cmd(self, CMD_WREN);
187 mp_spiflash_write_cmd_data(self, CMD_WRSR, 2, data);
188 mp_spiflash_wait_wip0(self);
189 }
190 }
191
192 mp_spiflash_release_bus(self);
Damien George784e0232017-01-24 16:56:03 +1100193}
194
195STATIC int mp_spiflash_erase_sector(mp_spiflash_t *self, uint32_t addr) {
196 // enable writes
197 mp_spiflash_write_cmd(self, CMD_WREN);
198
199 // wait WEL=1
200 int ret = mp_spiflash_wait_wel1(self);
201 if (ret != 0) {
202 return ret;
203 }
204
205 // erase the sector
Damien George4e487002018-03-02 16:01:18 +1100206 mp_spiflash_write_cmd_addr(self, CMD_SEC_ERASE, addr);
Damien George784e0232017-01-24 16:56:03 +1100207
208 // wait WIP=0
209 return mp_spiflash_wait_wip0(self);
210}
211
212STATIC int mp_spiflash_write_page(mp_spiflash_t *self, uint32_t addr, const uint8_t *src) {
213 // enable writes
214 mp_spiflash_write_cmd(self, CMD_WREN);
215
216 // wait WEL=1
217 int ret = mp_spiflash_wait_wel1(self);
218 if (ret != 0) {
219 return ret;
220 }
221
222 // write the page
Damien George4e487002018-03-02 16:01:18 +1100223 mp_spiflash_write_cmd_addr_data(self, CMD_WRITE, addr, PAGE_SIZE, src);
Damien George784e0232017-01-24 16:56:03 +1100224
225 // wait WIP=0
226 return mp_spiflash_wait_wip0(self);
227}
228
229void mp_spiflash_read(mp_spiflash_t *self, uint32_t addr, size_t len, uint8_t *dest) {
Damien George4e487002018-03-02 16:01:18 +1100230 if (len == 0) {
231 return;
232 }
Damien George784e0232017-01-24 16:56:03 +1100233 mp_spiflash_acquire_bus(self);
Damien George4e487002018-03-02 16:01:18 +1100234 if (bufuser == self && bufsec != 0xffffffff) {
235 uint32_t bis = addr / SECTOR_SIZE;
Damien Georgebdc875e2018-03-13 14:13:30 +1100236 uint32_t bie = (addr + len - 1) / SECTOR_SIZE;
237 if (bis <= bufsec && bufsec <= bie) {
238 // Read straddles current buffer
239 size_t rest = 0;
240 if (bis < bufsec) {
241 // Read direct from flash for first part
242 rest = bufsec * SECTOR_SIZE - addr;
243 mp_spiflash_read_data(self, addr, rest, dest);
Damien George4e487002018-03-02 16:01:18 +1100244 len -= rest;
Damien George4e487002018-03-02 16:01:18 +1100245 dest += rest;
246 addr += rest;
247 }
Damien Georgebdc875e2018-03-13 14:13:30 +1100248 uint32_t offset = addr & (SECTOR_SIZE - 1);
Damien George4e487002018-03-02 16:01:18 +1100249 rest = SECTOR_SIZE - offset;
250 if (rest > len) {
251 rest = len;
252 }
253 memcpy(dest, &buf[offset], rest);
254 len -= rest;
Damien Georgebdc875e2018-03-13 14:13:30 +1100255 if (len == 0) {
Damien George4e487002018-03-02 16:01:18 +1100256 mp_spiflash_release_bus(self);
257 return;
258 }
Damien Georgebdc875e2018-03-13 14:13:30 +1100259 dest += rest;
260 addr += rest;
Damien George4e487002018-03-02 16:01:18 +1100261 }
Damien George4e487002018-03-02 16:01:18 +1100262 }
263 // Read rest direct from flash
264 mp_spiflash_read_data(self, addr, len, dest);
Damien George784e0232017-01-24 16:56:03 +1100265 mp_spiflash_release_bus(self);
266}
267
Damien George4e487002018-03-02 16:01:18 +1100268STATIC void mp_spiflash_flush_internal(mp_spiflash_t *self) {
269 #if USE_WR_DELAY
270 if (!(self->flags & 1)) {
271 return;
272 }
Damien George784e0232017-01-24 16:56:03 +1100273
Damien George4e487002018-03-02 16:01:18 +1100274 self->flags &= ~1;
275
276 // Erase sector
277 int ret = mp_spiflash_erase_sector(self, bufsec * SECTOR_SIZE);
278 if (ret != 0) {
279 return;
280 }
281
282 // Write
283 for (int i = 0; i < 16; i += 1) {
284 int ret = mp_spiflash_write_page(self, bufsec * SECTOR_SIZE + i * PAGE_SIZE, buf + i * PAGE_SIZE);
285 if (ret != 0) {
286 return;
287 }
288 }
289 #endif
290}
291
292void mp_spiflash_flush(mp_spiflash_t *self) {
293 mp_spiflash_acquire_bus(self);
294 mp_spiflash_flush_internal(self);
295 mp_spiflash_release_bus(self);
296}
297
298STATIC int mp_spiflash_write_part(mp_spiflash_t *self, uint32_t addr, size_t len, const uint8_t *src) {
299 // Align to 4096 sector
Damien George784e0232017-01-24 16:56:03 +1100300 uint32_t offset = addr & 0xfff;
Damien George4e487002018-03-02 16:01:18 +1100301 uint32_t sec = addr >> 12;
302 addr = sec << 12;
Damien George784e0232017-01-24 16:56:03 +1100303
Damien George4e487002018-03-02 16:01:18 +1100304 // Restriction for now, so we don't need to erase multiple pages
Damien George784e0232017-01-24 16:56:03 +1100305 if (offset + len > sizeof(buf)) {
Damien George4e487002018-03-02 16:01:18 +1100306 printf("mp_spiflash_write_part: len is too large\n");
Damien George784e0232017-01-24 16:56:03 +1100307 return -MP_EIO;
308 }
309
Damien George4e487002018-03-02 16:01:18 +1100310 // Acquire the sector buffer
311 if (bufuser != self) {
312 if (bufuser != NULL) {
313 mp_spiflash_flush(bufuser);
314 }
315 bufuser = self;
316 bufsec = 0xffffffff;
Damien George784e0232017-01-24 16:56:03 +1100317 }
318
Damien George4e487002018-03-02 16:01:18 +1100319 if (bufsec != sec) {
320 // Read sector
321 #if USE_WR_DELAY
322 if (bufsec != 0xffffffff) {
323 mp_spiflash_flush_internal(self);
324 }
325 #endif
326 mp_spiflash_read_data(self, addr, SECTOR_SIZE, buf);
327 }
Damien George784e0232017-01-24 16:56:03 +1100328
Damien George4e487002018-03-02 16:01:18 +1100329 #if USE_WR_DELAY
330
331 bufsec = sec;
332 // Just copy to buffer
333 memcpy(buf + offset, src, len);
334 // And mark dirty
335 self->flags |= 1;
336
337 #else
338
339 uint32_t dirty = 0;
340 for (size_t i = 0; i < len; ++i) {
341 if (buf[offset + i] != src[i]) {
342 if (buf[offset + i] != 0xff) {
343 // Erase sector
344 int ret = mp_spiflash_erase_sector(self, addr);
345 if (ret != 0) {
346 return ret;
347 }
348 dirty = 0xffff;
349 break;
350 } else {
351 dirty |= (1 << ((offset + i) >> 8));
352 }
Damien George784e0232017-01-24 16:56:03 +1100353 }
354 }
355
Damien George4e487002018-03-02 16:01:18 +1100356 bufsec = sec;
357 // Copy new block into buffer
358 memcpy(buf + offset, src, len);
359
360 // Write sector in pages of 256 bytes
361 for (size_t i = 0; i < 16; ++i) {
362 if (dirty & (1 << i)) {
363 int ret = mp_spiflash_write_page(self, addr + i * PAGE_SIZE, buf + i * PAGE_SIZE);
364 if (ret != 0) {
365 return ret;
366 }
367 }
368 }
369
370 #endif
371
Damien George784e0232017-01-24 16:56:03 +1100372 return 0; // success
373}
Damien George4e487002018-03-02 16:01:18 +1100374
375int mp_spiflash_write(mp_spiflash_t *self, uint32_t addr, size_t len, const uint8_t *src) {
376 uint32_t bis = addr / SECTOR_SIZE;
377 uint32_t bie = (addr + len - 1) / SECTOR_SIZE;
378
379 mp_spiflash_acquire_bus(self);
Damien Georgebdc875e2018-03-13 14:13:30 +1100380
Damien George4e487002018-03-02 16:01:18 +1100381 if (bufuser == self && bis <= bufsec && bie >= bufsec) {
Damien Georgebdc875e2018-03-13 14:13:30 +1100382 // Write straddles current buffer
383 uint32_t pre;
384 uint32_t offset;
385 if (bufsec * SECTOR_SIZE >= addr) {
386 pre = bufsec * SECTOR_SIZE - addr;
Damien George4e487002018-03-02 16:01:18 +1100387 offset = 0;
388 } else {
389 pre = 0;
Damien Georgebdc875e2018-03-13 14:13:30 +1100390 offset = addr - bufsec * SECTOR_SIZE;
Damien George4e487002018-03-02 16:01:18 +1100391 }
Damien Georgebdc875e2018-03-13 14:13:30 +1100392
393 // Write buffered part first
394 uint32_t len_in_buf = len - pre;
395 len = 0;
396 if (len_in_buf > SECTOR_SIZE - offset) {
397 len = len_in_buf - (SECTOR_SIZE - offset);
398 len_in_buf = SECTOR_SIZE - offset;
Damien George4e487002018-03-02 16:01:18 +1100399 }
Damien Georgebdc875e2018-03-13 14:13:30 +1100400 memcpy(&buf[offset], &src[pre], len_in_buf);
Damien George4e487002018-03-02 16:01:18 +1100401 self->flags |= 1; // Mark dirty
Damien Georgebdc875e2018-03-13 14:13:30 +1100402
403 // Write part before buffer sector
Damien George4e487002018-03-02 16:01:18 +1100404 while (pre) {
405 int rest = pre & (SECTOR_SIZE - 1);
406 if (rest == 0) {
407 rest = SECTOR_SIZE;
408 }
Damien Georgebdc875e2018-03-13 14:13:30 +1100409 int ret = mp_spiflash_write_part(self, addr, rest, src);
410 if (ret != 0) {
411 mp_spiflash_release_bus(self);
412 return ret;
413 }
414 src += rest;
Damien George4e487002018-03-02 16:01:18 +1100415 addr += rest;
416 pre -= rest;
417 }
Damien Georgebdc875e2018-03-13 14:13:30 +1100418 src += len_in_buf;
419 addr += len_in_buf;
420
421 // Fall through to write remaining part
Damien George4e487002018-03-02 16:01:18 +1100422 }
Damien Georgebdc875e2018-03-13 14:13:30 +1100423
424 uint32_t offset = addr & (SECTOR_SIZE - 1);
425 while (len) {
426 int rest = SECTOR_SIZE - offset;
427 if (rest > len) {
428 rest = len;
429 }
430 int ret = mp_spiflash_write_part(self, addr, rest, src);
431 if (ret != 0) {
432 mp_spiflash_release_bus(self);
433 return ret;
434 }
435 len -= rest;
436 addr += rest;
437 src += rest;
438 offset = 0;
439 }
440
Damien George4e487002018-03-02 16:01:18 +1100441 mp_spiflash_release_bus(self);
442 return 0;
443}