danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the Micro Python project, http://micropython.org/ |
| 3 | * |
| 4 | * The MIT License (MIT) |
| 5 | * |
| 6 | * Copyright (c) 2013, 2014 Damien P. George |
| 7 | * Copyright (c) 2015 Daniel Campora |
| 8 | * |
| 9 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 10 | * of this software and associated documentation files (the "Software"), to deal |
| 11 | * in the Software without restriction, including without limitation the rights |
| 12 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| 13 | * copies of the Software, and to permit persons to whom the Software is |
| 14 | * furnished to do so, subject to the following conditions: |
| 15 | * |
| 16 | * The above copyright notice and this permission notice shall be included in |
| 17 | * all copies or substantial portions of the Software. |
| 18 | * |
| 19 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 20 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 21 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| 22 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 23 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 24 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 25 | * THE SOFTWARE. |
| 26 | */ |
| 27 | |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 28 | #include <stdint.h> |
danicampora | 6b21c3f | 2015-02-20 16:31:30 +0100 | [diff] [blame] | 29 | #include <stdio.h> |
| 30 | #include <errno.h> |
| 31 | #include <string.h> |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 32 | |
Damien George | 4a23a01 | 2015-02-21 18:58:43 +0000 | [diff] [blame] | 33 | #include "py/mpconfig.h" |
Damien George | 4a23a01 | 2015-02-21 18:58:43 +0000 | [diff] [blame] | 34 | #include "py/obj.h" |
| 35 | #include "py/runtime.h" |
danicampora | 6b21c3f | 2015-02-20 16:31:30 +0100 | [diff] [blame] | 36 | #include "py/objlist.h" |
Damien George | 4a23a01 | 2015-02-21 18:58:43 +0000 | [diff] [blame] | 37 | #include "py/stream.h" |
Damien George | 731f359 | 2015-10-30 23:03:58 +0000 | [diff] [blame] | 38 | #include "py/mphal.h" |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 39 | #include "inc/hw_types.h" |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 40 | #include "inc/hw_ints.h" |
| 41 | #include "inc/hw_memmap.h" |
| 42 | #include "inc/hw_uart.h" |
| 43 | #include "rom_map.h" |
| 44 | #include "interrupt.h" |
| 45 | #include "prcm.h" |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 46 | #include "uart.h" |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 47 | #include "pybuart.h" |
Daniel Campora | dbdcb58 | 2015-09-22 23:20:29 +0200 | [diff] [blame] | 48 | #include "mpirq.h" |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 49 | #include "pybioctl.h" |
danicampora | d226dd2 | 2015-02-27 16:50:06 +0100 | [diff] [blame] | 50 | #include "pybsleep.h" |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 51 | #include "mpexception.h" |
danicampora | 6b21c3f | 2015-02-20 16:31:30 +0100 | [diff] [blame] | 52 | #include "py/mpstate.h" |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 53 | #include "osi.h" |
Daniel Campora | 3319780 | 2015-06-09 17:14:31 +0200 | [diff] [blame] | 54 | #include "utils.h" |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 55 | #include "pin.h" |
| 56 | #include "pybpin.h" |
| 57 | #include "pins.h" |
Daniel Campora | ef36924 | 2015-09-25 15:20:07 +0200 | [diff] [blame] | 58 | #include "moduos.h" |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 59 | |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 60 | /// \moduleref pyb |
| 61 | /// \class UART - duplex serial communication bus |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 62 | |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 63 | /****************************************************************************** |
danicampora | 6b21c3f | 2015-02-20 16:31:30 +0100 | [diff] [blame] | 64 | DEFINE CONSTANTS |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 65 | *******-***********************************************************************/ |
| 66 | #define PYBUART_FRAME_TIME_US(baud) ((11 * 1000000) / baud) |
| 67 | #define PYBUART_2_FRAMES_TIME_US(baud) (PYBUART_FRAME_TIME_US(baud) * 2) |
danicampora | 075ca64 | 2015-10-21 14:54:16 +0200 | [diff] [blame] | 68 | #define PYBUART_RX_TIMEOUT_US(baud) (PYBUART_2_FRAMES_TIME_US(baud) * 8) // we need at least characters in the FIFO |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 69 | |
| 70 | #define PYBUART_TX_WAIT_US(baud) ((PYBUART_FRAME_TIME_US(baud)) + 1) |
Daniel Campora | fa655ce | 2015-07-05 22:26:12 +0200 | [diff] [blame] | 71 | #define PYBUART_TX_MAX_TIMEOUT_MS (5) |
danicampora | 6b21c3f | 2015-02-20 16:31:30 +0100 | [diff] [blame] | 72 | |
Daniel Campora | dbdcb58 | 2015-09-22 23:20:29 +0200 | [diff] [blame] | 73 | #define PYBUART_RX_BUFFER_LEN (256) |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 74 | |
Daniel Campora | 4d7fa05 | 2015-09-07 21:19:11 +0200 | [diff] [blame] | 75 | // interrupt triggers |
danicampora | 075ca64 | 2015-10-21 14:54:16 +0200 | [diff] [blame] | 76 | #define UART_TRIGGER_RX_ANY (0x01) |
| 77 | #define UART_TRIGGER_RX_HALF (0x02) |
| 78 | #define UART_TRIGGER_RX_FULL (0x04) |
| 79 | #define UART_TRIGGER_TX_DONE (0x08) |
Daniel Campora | 4d7fa05 | 2015-09-07 21:19:11 +0200 | [diff] [blame] | 80 | |
danicampora | 6b21c3f | 2015-02-20 16:31:30 +0100 | [diff] [blame] | 81 | /****************************************************************************** |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 82 | DECLARE PRIVATE FUNCTIONS |
| 83 | ******************************************************************************/ |
danicampora | 9e44383 | 2015-03-04 13:52:39 +0100 | [diff] [blame] | 84 | STATIC void uart_init (pyb_uart_obj_t *self); |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 85 | STATIC bool uart_rx_wait (pyb_uart_obj_t *self); |
Daniel Campora | 4d7fa05 | 2015-09-07 21:19:11 +0200 | [diff] [blame] | 86 | STATIC void uart_check_init(pyb_uart_obj_t *self); |
Daniel Campora | dbdcb58 | 2015-09-22 23:20:29 +0200 | [diff] [blame] | 87 | STATIC mp_obj_t uart_irq_new (pyb_uart_obj_t *self, byte trigger, mp_int_t priority, mp_obj_t handler); |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 88 | STATIC void UARTGenericIntHandler(uint32_t uart_id); |
| 89 | STATIC void UART0IntHandler(void); |
| 90 | STATIC void UART1IntHandler(void); |
Daniel Campora | dbdcb58 | 2015-09-22 23:20:29 +0200 | [diff] [blame] | 91 | STATIC void uart_irq_enable (mp_obj_t self_in); |
| 92 | STATIC void uart_irq_disable (mp_obj_t self_in); |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 93 | |
| 94 | /****************************************************************************** |
| 95 | DEFINE PRIVATE TYPES |
| 96 | ******************************************************************************/ |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 97 | struct _pyb_uart_obj_t { |
| 98 | mp_obj_base_t base; |
danicampora | 6b21c3f | 2015-02-20 16:31:30 +0100 | [diff] [blame] | 99 | pyb_uart_id_t uart_id; |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 100 | uint reg; |
| 101 | uint baudrate; |
| 102 | uint config; |
| 103 | uint flowcontrol; |
| 104 | byte *read_buf; // read buffer pointer |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 105 | volatile uint16_t read_buf_head; // indexes first empty slot |
| 106 | uint16_t read_buf_tail; // indexes first full slot (not full if equals head) |
Daniel Campora | 2d717ad | 2015-03-26 10:25:28 +0100 | [diff] [blame] | 107 | byte peripheral; |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 108 | byte irq_trigger; |
Daniel Campora | dbdcb58 | 2015-09-22 23:20:29 +0200 | [diff] [blame] | 109 | bool irq_enabled; |
| 110 | byte irq_flags; |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 111 | }; |
| 112 | |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 113 | /****************************************************************************** |
danicampora | 6de1b39 | 2015-03-17 11:05:59 +0100 | [diff] [blame] | 114 | DECLARE PRIVATE DATA |
| 115 | ******************************************************************************/ |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 116 | STATIC pyb_uart_obj_t pyb_uart_obj[PYB_NUM_UARTS] = { {.reg = UARTA0_BASE, .baudrate = 0, .read_buf = NULL, .peripheral = PRCM_UARTA0}, |
| 117 | {.reg = UARTA1_BASE, .baudrate = 0, .read_buf = NULL, .peripheral = PRCM_UARTA1} }; |
Daniel Campora | dbdcb58 | 2015-09-22 23:20:29 +0200 | [diff] [blame] | 118 | STATIC const mp_irq_methods_t uart_irq_methods; |
danicampora | 6de1b39 | 2015-03-17 11:05:59 +0100 | [diff] [blame] | 119 | |
Daniel Campora | 359b4e9 | 2015-09-08 15:07:42 +0200 | [diff] [blame] | 120 | STATIC const mp_obj_t pyb_uart_def_pin[PYB_NUM_UARTS][2] = { {&pin_GP1, &pin_GP2}, {&pin_GP3, &pin_GP4} }; |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 121 | |
danicampora | 6de1b39 | 2015-03-17 11:05:59 +0100 | [diff] [blame] | 122 | /****************************************************************************** |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 123 | DEFINE PUBLIC FUNCTIONS |
| 124 | ******************************************************************************/ |
| 125 | void uart_init0 (void) { |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 126 | // save references of the UART objects, to prevent the read buffers from being trashed by the gc |
| 127 | MP_STATE_PORT(pyb_uart_objs)[0] = &pyb_uart_obj[0]; |
| 128 | MP_STATE_PORT(pyb_uart_objs)[1] = &pyb_uart_obj[1]; |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 129 | } |
| 130 | |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 131 | uint32_t uart_rx_any(pyb_uart_obj_t *self) { |
| 132 | if (self->read_buf_tail != self->read_buf_head) { |
| 133 | // buffering via irq |
| 134 | return (self->read_buf_head > self->read_buf_tail) ? self->read_buf_head - self->read_buf_tail : |
| 135 | PYBUART_RX_BUFFER_LEN - self->read_buf_tail + self->read_buf_head; |
| 136 | } |
| 137 | return MAP_UARTCharsAvail(self->reg) ? 1 : 0; |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 138 | } |
| 139 | |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 140 | int uart_rx_char(pyb_uart_obj_t *self) { |
| 141 | if (self->read_buf_tail != self->read_buf_head) { |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 142 | // buffering via irq |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 143 | int data = self->read_buf[self->read_buf_tail]; |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 144 | self->read_buf_tail = (self->read_buf_tail + 1) % PYBUART_RX_BUFFER_LEN; |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 145 | return data; |
| 146 | } else { |
| 147 | // no buffering |
| 148 | return MAP_UARTCharGetNonBlocking(self->reg); |
| 149 | } |
| 150 | } |
| 151 | |
| 152 | bool uart_tx_char(pyb_uart_obj_t *self, int c) { |
| 153 | uint32_t timeout = 0; |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 154 | while (!MAP_UARTCharPutNonBlocking(self->reg, c)) { |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 155 | if (timeout++ > ((PYBUART_TX_MAX_TIMEOUT_MS * 1000) / PYBUART_TX_WAIT_US(self->baudrate))) { |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 156 | return false; |
| 157 | } |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 158 | UtilsDelay(UTILS_DELAY_US_TO_COUNT(PYBUART_TX_WAIT_US(self->baudrate))); |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 159 | } |
| 160 | return true; |
| 161 | } |
| 162 | |
| 163 | bool uart_tx_strn(pyb_uart_obj_t *self, const char *str, uint len) { |
| 164 | for (const char *top = str + len; str < top; str++) { |
| 165 | if (!uart_tx_char(self, *str)) { |
| 166 | return false; |
| 167 | } |
| 168 | } |
| 169 | return true; |
| 170 | } |
| 171 | |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 172 | /****************************************************************************** |
| 173 | DEFINE PRIVATE FUNCTIONS |
| 174 | ******************************************************************************/ |
danicampora | 9e44383 | 2015-03-04 13:52:39 +0100 | [diff] [blame] | 175 | // assumes init parameters have been set up correctly |
| 176 | STATIC void uart_init (pyb_uart_obj_t *self) { |
danicampora | 9e44383 | 2015-03-04 13:52:39 +0100 | [diff] [blame] | 177 | // Enable the peripheral clock |
Daniel Campora | 2d717ad | 2015-03-26 10:25:28 +0100 | [diff] [blame] | 178 | MAP_PRCMPeripheralClkEnable(self->peripheral, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); |
danicampora | 9e44383 | 2015-03-04 13:52:39 +0100 | [diff] [blame] | 179 | |
| 180 | // Reset the uart |
Daniel Campora | 2d717ad | 2015-03-26 10:25:28 +0100 | [diff] [blame] | 181 | MAP_PRCMPeripheralReset(self->peripheral); |
danicampora | 9e44383 | 2015-03-04 13:52:39 +0100 | [diff] [blame] | 182 | |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 183 | // re-allocate the read buffer after resetting the uart (which automatically disables any irqs) |
| 184 | self->read_buf_head = 0; |
| 185 | self->read_buf_tail = 0; |
| 186 | self->read_buf = MP_OBJ_NULL; // free the read buffer before allocating again |
| 187 | self->read_buf = m_new(byte, PYBUART_RX_BUFFER_LEN); |
| 188 | |
danicampora | 9e44383 | 2015-03-04 13:52:39 +0100 | [diff] [blame] | 189 | // Initialize the UART |
Daniel Campora | 2d717ad | 2015-03-26 10:25:28 +0100 | [diff] [blame] | 190 | MAP_UARTConfigSetExpClk(self->reg, MAP_PRCMPeripheralClockGet(self->peripheral), |
danicampora | 9e44383 | 2015-03-04 13:52:39 +0100 | [diff] [blame] | 191 | self->baudrate, self->config); |
| 192 | |
Daniel Campora | 2d717ad | 2015-03-26 10:25:28 +0100 | [diff] [blame] | 193 | // Enable the FIFO |
danicampora | 9e44383 | 2015-03-04 13:52:39 +0100 | [diff] [blame] | 194 | MAP_UARTFIFOEnable(self->reg); |
| 195 | |
| 196 | // Configure the FIFO interrupt levels |
| 197 | MAP_UARTFIFOLevelSet(self->reg, UART_FIFO_TX4_8, UART_FIFO_RX4_8); |
| 198 | |
| 199 | // Configure the flow control mode |
| 200 | UARTFlowControlSet(self->reg, self->flowcontrol); |
danicampora | 9e44383 | 2015-03-04 13:52:39 +0100 | [diff] [blame] | 201 | } |
| 202 | |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 203 | // Waits at most timeout microseconds for at least 1 char to become ready for |
danicampora | 9e44383 | 2015-03-04 13:52:39 +0100 | [diff] [blame] | 204 | // reading (from buf or for direct reading). |
| 205 | // Returns true if something available, false if not. |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 206 | STATIC bool uart_rx_wait (pyb_uart_obj_t *self) { |
| 207 | int timeout = PYBUART_RX_TIMEOUT_US(self->baudrate); |
Daniel Campora | 2d717ad | 2015-03-26 10:25:28 +0100 | [diff] [blame] | 208 | for ( ; ; ) { |
danicampora | 9e44383 | 2015-03-04 13:52:39 +0100 | [diff] [blame] | 209 | if (uart_rx_any(self)) { |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 210 | return true; // we have at least 1 char ready for reading |
danicampora | 9e44383 | 2015-03-04 13:52:39 +0100 | [diff] [blame] | 211 | } |
| 212 | if (timeout > 0) { |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 213 | UtilsDelay(UTILS_DELAY_US_TO_COUNT(1)); |
danicampora | 9e44383 | 2015-03-04 13:52:39 +0100 | [diff] [blame] | 214 | timeout--; |
| 215 | } |
| 216 | else { |
| 217 | return false; |
| 218 | } |
| 219 | } |
| 220 | } |
| 221 | |
Daniel Campora | dbdcb58 | 2015-09-22 23:20:29 +0200 | [diff] [blame] | 222 | STATIC mp_obj_t uart_irq_new (pyb_uart_obj_t *self, byte trigger, mp_int_t priority, mp_obj_t handler) { |
| 223 | // disable the uart interrupts before updating anything |
| 224 | uart_irq_disable (self); |
| 225 | |
| 226 | if (self->uart_id == PYB_UART_0) { |
| 227 | MAP_IntPrioritySet(INT_UARTA0, priority); |
| 228 | MAP_UARTIntRegister(self->reg, UART0IntHandler); |
| 229 | } else { |
| 230 | MAP_IntPrioritySet(INT_UARTA1, priority); |
| 231 | MAP_UARTIntRegister(self->reg, UART1IntHandler); |
| 232 | } |
| 233 | |
| 234 | // create the callback |
| 235 | mp_obj_t _irq = mp_irq_new ((mp_obj_t)self, handler, &uart_irq_methods); |
| 236 | |
| 237 | // enable the interrupts now |
| 238 | self->irq_trigger = trigger; |
| 239 | uart_irq_enable (self); |
| 240 | return _irq; |
| 241 | } |
| 242 | |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 243 | STATIC void UARTGenericIntHandler(uint32_t uart_id) { |
danicampora | 6b21c3f | 2015-02-20 16:31:30 +0100 | [diff] [blame] | 244 | pyb_uart_obj_t *self; |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 245 | uint32_t status; |
| 246 | |
danicampora | 6de1b39 | 2015-03-17 11:05:59 +0100 | [diff] [blame] | 247 | self = &pyb_uart_obj[uart_id]; |
| 248 | status = MAP_UARTIntStatus(self->reg, true); |
| 249 | // receive interrupt |
| 250 | if (status & (UART_INT_RX | UART_INT_RT)) { |
Daniel Campora | dbdcb58 | 2015-09-22 23:20:29 +0200 | [diff] [blame] | 251 | // set the flags |
| 252 | self->irq_flags = UART_TRIGGER_RX_ANY; |
danicampora | 6de1b39 | 2015-03-17 11:05:59 +0100 | [diff] [blame] | 253 | MAP_UARTIntClear(self->reg, UART_INT_RX | UART_INT_RT); |
| 254 | while (UARTCharsAvail(self->reg)) { |
| 255 | int data = MAP_UARTCharGetNonBlocking(self->reg); |
Daniel Campora | ef36924 | 2015-09-25 15:20:07 +0200 | [diff] [blame] | 256 | if (MP_STATE_PORT(os_term_dup_obj) && MP_STATE_PORT(os_term_dup_obj)->stream_o == self && data == user_interrupt_char) { |
Daniel Campora | 2d717ad | 2015-03-26 10:25:28 +0100 | [diff] [blame] | 257 | // raise an exception when interrupts are finished |
danicampora | 6de1b39 | 2015-03-17 11:05:59 +0100 | [diff] [blame] | 258 | mpexception_keyboard_nlr_jump(); |
Daniel Campora | ef36924 | 2015-09-25 15:20:07 +0200 | [diff] [blame] | 259 | } else { // there's always a read buffer available |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 260 | uint16_t next_head = (self->read_buf_head + 1) % PYBUART_RX_BUFFER_LEN; |
danicampora | 6de1b39 | 2015-03-17 11:05:59 +0100 | [diff] [blame] | 261 | if (next_head != self->read_buf_tail) { |
| 262 | // only store data if room in buf |
| 263 | self->read_buf[self->read_buf_head] = data; |
| 264 | self->read_buf_head = next_head; |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 265 | } |
| 266 | } |
| 267 | } |
Daniel Campora | 4d7fa05 | 2015-09-07 21:19:11 +0200 | [diff] [blame] | 268 | } |
Daniel Campora | dbdcb58 | 2015-09-22 23:20:29 +0200 | [diff] [blame] | 269 | |
| 270 | // check the flags to see if the user handler should be called |
| 271 | if ((self->irq_trigger & self->irq_flags) && self->irq_enabled) { |
| 272 | // call the user defined handler |
| 273 | mp_irq_handler(mp_irq_find(self)); |
| 274 | } |
| 275 | |
| 276 | // clear the flags |
| 277 | self->irq_flags = 0; |
Daniel Campora | 4d7fa05 | 2015-09-07 21:19:11 +0200 | [diff] [blame] | 278 | } |
| 279 | |
| 280 | STATIC void uart_check_init(pyb_uart_obj_t *self) { |
| 281 | // not initialized |
| 282 | if (!self->baudrate) { |
| 283 | nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, mpexception_os_request_not_possible)); |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 284 | } |
| 285 | } |
| 286 | |
| 287 | STATIC void UART0IntHandler(void) { |
| 288 | UARTGenericIntHandler(0); |
| 289 | } |
| 290 | |
| 291 | STATIC void UART1IntHandler(void) { |
| 292 | UARTGenericIntHandler(1); |
| 293 | } |
| 294 | |
Daniel Campora | dbdcb58 | 2015-09-22 23:20:29 +0200 | [diff] [blame] | 295 | STATIC void uart_irq_enable (mp_obj_t self_in) { |
Daniel Campora | 2d717ad | 2015-03-26 10:25:28 +0100 | [diff] [blame] | 296 | pyb_uart_obj_t *self = self_in; |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 297 | // check for any of the rx interrupt types |
Daniel Campora | dbdcb58 | 2015-09-22 23:20:29 +0200 | [diff] [blame] | 298 | if (self->irq_trigger & (UART_TRIGGER_RX_ANY | UART_TRIGGER_RX_HALF | UART_TRIGGER_RX_FULL)) { |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 299 | MAP_UARTIntClear(self->reg, UART_INT_RX | UART_INT_RT); |
| 300 | MAP_UARTIntEnable(self->reg, UART_INT_RX | UART_INT_RT); |
| 301 | } |
Daniel Campora | dbdcb58 | 2015-09-22 23:20:29 +0200 | [diff] [blame] | 302 | self->irq_enabled = true; |
Daniel Campora | 2d717ad | 2015-03-26 10:25:28 +0100 | [diff] [blame] | 303 | } |
| 304 | |
Daniel Campora | dbdcb58 | 2015-09-22 23:20:29 +0200 | [diff] [blame] | 305 | STATIC void uart_irq_disable (mp_obj_t self_in) { |
Daniel Campora | 2d717ad | 2015-03-26 10:25:28 +0100 | [diff] [blame] | 306 | pyb_uart_obj_t *self = self_in; |
Daniel Campora | dbdcb58 | 2015-09-22 23:20:29 +0200 | [diff] [blame] | 307 | self->irq_enabled = false; |
| 308 | } |
| 309 | |
| 310 | STATIC int uart_irq_flags (mp_obj_t self_in) { |
| 311 | pyb_uart_obj_t *self = self_in; |
| 312 | return self->irq_flags; |
Daniel Campora | 2d717ad | 2015-03-26 10:25:28 +0100 | [diff] [blame] | 313 | } |
| 314 | |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 315 | /******************************************************************************/ |
| 316 | /* Micro Python bindings */ |
| 317 | |
Damien George | 7f9d1d6 | 2015-04-09 23:56:15 +0100 | [diff] [blame] | 318 | STATIC void pyb_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 319 | pyb_uart_obj_t *self = self_in; |
Daniel Campora | 2d717ad | 2015-03-26 10:25:28 +0100 | [diff] [blame] | 320 | if (self->baudrate > 0) { |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 321 | mp_printf(print, "UART(%u, baudrate=%u, bits=", self->uart_id, self->baudrate); |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 322 | switch (self->config & UART_CONFIG_WLEN_MASK) { |
| 323 | case UART_CONFIG_WLEN_5: |
Damien George | 7f9d1d6 | 2015-04-09 23:56:15 +0100 | [diff] [blame] | 324 | mp_print_str(print, "5"); |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 325 | break; |
| 326 | case UART_CONFIG_WLEN_6: |
Damien George | 7f9d1d6 | 2015-04-09 23:56:15 +0100 | [diff] [blame] | 327 | mp_print_str(print, "6"); |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 328 | break; |
| 329 | case UART_CONFIG_WLEN_7: |
Damien George | 7f9d1d6 | 2015-04-09 23:56:15 +0100 | [diff] [blame] | 330 | mp_print_str(print, "7"); |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 331 | break; |
| 332 | case UART_CONFIG_WLEN_8: |
Damien George | 7f9d1d6 | 2015-04-09 23:56:15 +0100 | [diff] [blame] | 333 | mp_print_str(print, "8"); |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 334 | break; |
| 335 | default: |
| 336 | break; |
| 337 | } |
| 338 | if ((self->config & UART_CONFIG_PAR_MASK) == UART_CONFIG_PAR_NONE) { |
Damien George | 7f9d1d6 | 2015-04-09 23:56:15 +0100 | [diff] [blame] | 339 | mp_print_str(print, ", parity=None"); |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 340 | } else { |
Daniel Campora | 8332044 | 2015-09-13 15:59:45 +0200 | [diff] [blame] | 341 | mp_printf(print, ", parity=UART.%q", (self->config & UART_CONFIG_PAR_MASK) == UART_CONFIG_PAR_EVEN ? MP_QSTR_EVEN : MP_QSTR_ODD); |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 342 | } |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 343 | mp_printf(print, ", stop=%u)", (self->config & UART_CONFIG_STOP_MASK) == UART_CONFIG_STOP_ONE ? 1 : 2); |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 344 | } |
Daniel Campora | 2d717ad | 2015-03-26 10:25:28 +0100 | [diff] [blame] | 345 | else { |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 346 | mp_printf(print, "UART(%u)", self->uart_id); |
Daniel Campora | 2d717ad | 2015-03-26 10:25:28 +0100 | [diff] [blame] | 347 | } |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 348 | } |
| 349 | |
Daniel Campora | dffa9f6 | 2015-09-16 14:09:51 +0200 | [diff] [blame] | 350 | STATIC mp_obj_t pyb_uart_init_helper(pyb_uart_obj_t *self, const mp_arg_val_t *args) { |
danicampora | 9e44383 | 2015-03-04 13:52:39 +0100 | [diff] [blame] | 351 | // get the baudrate |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 352 | if (args[0].u_int <= 0) { |
| 353 | goto error; |
| 354 | } |
| 355 | uint baudrate = args[0].u_int; |
| 356 | uint config; |
| 357 | switch (args[1].u_int) { |
| 358 | case 5: |
| 359 | config = UART_CONFIG_WLEN_5; |
| 360 | break; |
| 361 | case 6: |
| 362 | config = UART_CONFIG_WLEN_6; |
| 363 | break; |
| 364 | case 7: |
| 365 | config = UART_CONFIG_WLEN_7; |
| 366 | break; |
| 367 | case 8: |
| 368 | config = UART_CONFIG_WLEN_8; |
| 369 | break; |
| 370 | default: |
| 371 | goto error; |
| 372 | break; |
| 373 | } |
| 374 | // parity |
| 375 | if (args[2].u_obj == mp_const_none) { |
| 376 | config |= UART_CONFIG_PAR_NONE; |
| 377 | } else { |
Daniel Campora | 8332044 | 2015-09-13 15:59:45 +0200 | [diff] [blame] | 378 | uint parity = mp_obj_get_int(args[2].u_obj); |
| 379 | if (parity != UART_CONFIG_PAR_ODD && parity != UART_CONFIG_PAR_EVEN) { |
| 380 | goto error; |
| 381 | } |
| 382 | config |= parity; |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 383 | } |
| 384 | // stop bits |
| 385 | config |= (args[3].u_int == 1 ? UART_CONFIG_STOP_ONE : UART_CONFIG_STOP_TWO); |
danicampora | 9e44383 | 2015-03-04 13:52:39 +0100 | [diff] [blame] | 386 | |
Daniel Campora | 359b4e9 | 2015-09-08 15:07:42 +0200 | [diff] [blame] | 387 | // assign the pins |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 388 | mp_obj_t pins_o = args[4].u_obj; |
| 389 | uint flowcontrol = UART_FLOWCONTROL_NONE; |
| 390 | if (pins_o != mp_const_none) { |
Daniel Campora | 359b4e9 | 2015-09-08 15:07:42 +0200 | [diff] [blame] | 391 | mp_obj_t *pins; |
Daniel Campora | f352fe8 | 2015-09-09 22:42:42 +0200 | [diff] [blame] | 392 | mp_uint_t n_pins = 2; |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 393 | if (pins_o == MP_OBJ_NULL) { |
| 394 | // use the default pins |
Daniel Campora | 359b4e9 | 2015-09-08 15:07:42 +0200 | [diff] [blame] | 395 | pins = (mp_obj_t *)pyb_uart_def_pin[self->uart_id]; |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 396 | } else { |
Daniel Campora | 359b4e9 | 2015-09-08 15:07:42 +0200 | [diff] [blame] | 397 | mp_obj_get_array(pins_o, &n_pins, &pins); |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 398 | if (n_pins != 2 && n_pins != 4) { |
| 399 | goto error; |
| 400 | } |
| 401 | if (n_pins == 4) { |
Daniel Campora | 359b4e9 | 2015-09-08 15:07:42 +0200 | [diff] [blame] | 402 | if (pins[PIN_TYPE_UART_RTS] != mp_const_none && pins[PIN_TYPE_UART_RX] == mp_const_none) { |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 403 | goto error; // RTS pin given in TX only mode |
Daniel Campora | 359b4e9 | 2015-09-08 15:07:42 +0200 | [diff] [blame] | 404 | } else if (pins[PIN_TYPE_UART_CTS] != mp_const_none && pins[PIN_TYPE_UART_TX] == mp_const_none) { |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 405 | goto error; // CTS pin given in RX only mode |
| 406 | } else { |
Daniel Campora | 359b4e9 | 2015-09-08 15:07:42 +0200 | [diff] [blame] | 407 | if (pins[PIN_TYPE_UART_RTS] != mp_const_none) { |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 408 | flowcontrol |= UART_FLOWCONTROL_RX; |
| 409 | } |
Daniel Campora | 359b4e9 | 2015-09-08 15:07:42 +0200 | [diff] [blame] | 410 | if (pins[PIN_TYPE_UART_CTS] != mp_const_none) { |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 411 | flowcontrol |= UART_FLOWCONTROL_TX; |
| 412 | } |
| 413 | } |
| 414 | } |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 415 | } |
Daniel Campora | 359b4e9 | 2015-09-08 15:07:42 +0200 | [diff] [blame] | 416 | pin_assign_pins_af (pins, n_pins, PIN_TYPE_STD_PU, PIN_FN_UART, self->uart_id); |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 417 | } |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 418 | |
| 419 | self->baudrate = baudrate; |
| 420 | self->config = config; |
| 421 | self->flowcontrol = flowcontrol; |
Daniel Campora | 2d717ad | 2015-03-26 10:25:28 +0100 | [diff] [blame] | 422 | |
danicampora | 9e44383 | 2015-03-04 13:52:39 +0100 | [diff] [blame] | 423 | // initialize and enable the uart |
| 424 | uart_init (self); |
danicampora | 9e44383 | 2015-03-04 13:52:39 +0100 | [diff] [blame] | 425 | // register it with the sleep module |
Daniel Campora | c92e6a4 | 2015-09-27 13:45:48 +0200 | [diff] [blame] | 426 | pyb_sleep_add ((const mp_obj_t)self, (WakeUpCB_t)uart_init); |
Daniel Campora | 4d7fa05 | 2015-09-07 21:19:11 +0200 | [diff] [blame] | 427 | // enable the callback |
Daniel Campora | dbdcb58 | 2015-09-22 23:20:29 +0200 | [diff] [blame] | 428 | uart_irq_new (self, UART_TRIGGER_RX_ANY, INT_PRIORITY_LVL_3, mp_const_none); |
| 429 | // disable the irq (from the user point of view) |
| 430 | uart_irq_disable(self); |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 431 | |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 432 | return mp_const_none; |
Daniel Campora | 8a6d93a | 2015-06-09 16:15:23 +0200 | [diff] [blame] | 433 | |
| 434 | error: |
| 435 | nlr_raise(mp_obj_new_exception_msg(&mp_type_ValueError, mpexception_value_invalid_arguments)); |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 436 | } |
| 437 | |
Daniel Campora | 7d6b6f6 | 2015-09-11 09:33:19 +0200 | [diff] [blame] | 438 | STATIC const mp_arg_t pyb_uart_init_args[] = { |
Daniel Campora | 57fa14b | 2015-09-26 22:55:24 +0200 | [diff] [blame] | 439 | { MP_QSTR_id, MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, |
Daniel Campora | 7d6b6f6 | 2015-09-11 09:33:19 +0200 | [diff] [blame] | 440 | { MP_QSTR_baudrate, MP_ARG_INT, {.u_int = 9600} }, |
| 441 | { MP_QSTR_bits, MP_ARG_INT, {.u_int = 8} }, |
| 442 | { MP_QSTR_parity, MP_ARG_OBJ, {.u_obj = mp_const_none} }, |
| 443 | { MP_QSTR_stop, MP_ARG_INT, {.u_int = 1} }, |
| 444 | { MP_QSTR_pins, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, |
| 445 | }; |
Damien George | 5b3f0b7 | 2016-01-03 15:55:55 +0000 | [diff] [blame^] | 446 | STATIC mp_obj_t pyb_uart_make_new(const mp_obj_type_t *type, mp_uint_t n_args, mp_uint_t n_kw, const mp_obj_t *all_args) { |
Daniel Campora | 7d6b6f6 | 2015-09-11 09:33:19 +0200 | [diff] [blame] | 447 | // parse args |
| 448 | mp_map_t kw_args; |
| 449 | mp_map_init_fixed_table(&kw_args, n_kw, all_args + n_args); |
| 450 | mp_arg_val_t args[MP_ARRAY_SIZE(pyb_uart_init_args)]; |
| 451 | mp_arg_parse_all(n_args, all_args, &kw_args, MP_ARRAY_SIZE(args), pyb_uart_init_args, args); |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 452 | |
danicampora | 6b21c3f | 2015-02-20 16:31:30 +0100 | [diff] [blame] | 453 | // work out the uart id |
Daniel Campora | aba75e1 | 2015-09-13 21:44:09 +0200 | [diff] [blame] | 454 | uint uart_id; |
Daniel Campora | 57fa14b | 2015-09-26 22:55:24 +0200 | [diff] [blame] | 455 | if (args[0].u_obj == MP_OBJ_NULL) { |
Daniel Campora | 7d6b6f6 | 2015-09-11 09:33:19 +0200 | [diff] [blame] | 456 | if (args[5].u_obj != MP_OBJ_NULL) { |
| 457 | mp_obj_t *pins; |
| 458 | mp_uint_t n_pins = 2; |
| 459 | mp_obj_get_array(args[5].u_obj, &n_pins, &pins); |
| 460 | // check the Tx pin (or the Rx if Tx is None) |
| 461 | if (pins[0] == mp_const_none) { |
| 462 | uart_id = pin_find_peripheral_unit(pins[1], PIN_FN_UART, PIN_TYPE_UART_RX); |
| 463 | } else { |
| 464 | uart_id = pin_find_peripheral_unit(pins[0], PIN_FN_UART, PIN_TYPE_UART_TX); |
| 465 | } |
| 466 | } else { |
| 467 | // default id |
| 468 | uart_id = 0; |
| 469 | } |
| 470 | } else { |
| 471 | uart_id = mp_obj_get_int(args[0].u_obj); |
| 472 | } |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 473 | |
Daniel Campora | aba75e1 | 2015-09-13 21:44:09 +0200 | [diff] [blame] | 474 | if (uart_id > PYB_UART_1) { |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 475 | nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, mpexception_os_resource_not_avaliable)); |
| 476 | } |
| 477 | |
danicampora | 6de1b39 | 2015-03-17 11:05:59 +0100 | [diff] [blame] | 478 | // get the correct uart instance |
| 479 | pyb_uart_obj_t *self = &pyb_uart_obj[uart_id]; |
| 480 | self->base.type = &pyb_uart_type; |
| 481 | self->uart_id = uart_id; |
Daniel Campora | 8e611e8 | 2015-05-09 17:46:16 +0200 | [diff] [blame] | 482 | |
Daniel Campora | 7d6b6f6 | 2015-09-11 09:33:19 +0200 | [diff] [blame] | 483 | // start the peripheral |
| 484 | pyb_uart_init_helper(self, &args[1]); |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 485 | |
| 486 | return self; |
| 487 | } |
| 488 | |
Daniel Campora | 7d6b6f6 | 2015-09-11 09:33:19 +0200 | [diff] [blame] | 489 | STATIC mp_obj_t pyb_uart_init(mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { |
| 490 | // parse args |
| 491 | mp_arg_val_t args[MP_ARRAY_SIZE(pyb_uart_init_args) - 1]; |
| 492 | mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(args), &pyb_uart_init_args[1], args); |
| 493 | return pyb_uart_init_helper(pos_args[0], args); |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 494 | } |
| 495 | STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_uart_init_obj, 1, pyb_uart_init); |
| 496 | |
Daniel Campora | 8e611e8 | 2015-05-09 17:46:16 +0200 | [diff] [blame] | 497 | STATIC mp_obj_t pyb_uart_deinit(mp_obj_t self_in) { |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 498 | pyb_uart_obj_t *self = self_in; |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 499 | |
danicampora | d226dd2 | 2015-02-27 16:50:06 +0100 | [diff] [blame] | 500 | // unregister it with the sleep module |
Daniel Campora | c92e6a4 | 2015-09-27 13:45:48 +0200 | [diff] [blame] | 501 | pyb_sleep_remove (self); |
Daniel Campora | 2d717ad | 2015-03-26 10:25:28 +0100 | [diff] [blame] | 502 | // invalidate the baudrate |
| 503 | self->baudrate = 0; |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 504 | // free the read buffer |
| 505 | m_del(byte, self->read_buf, PYBUART_RX_BUFFER_LEN); |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 506 | MAP_UARTIntDisable(self->reg, UART_INT_RX | UART_INT_RT); |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 507 | MAP_UARTDisable(self->reg); |
Daniel Campora | 2d717ad | 2015-03-26 10:25:28 +0100 | [diff] [blame] | 508 | MAP_PRCMPeripheralClkDisable(self->peripheral, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK); |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 509 | return mp_const_none; |
| 510 | } |
| 511 | STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_deinit_obj, pyb_uart_deinit); |
| 512 | |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 513 | STATIC mp_obj_t pyb_uart_any(mp_obj_t self_in) { |
| 514 | pyb_uart_obj_t *self = self_in; |
Daniel Campora | 4d7fa05 | 2015-09-07 21:19:11 +0200 | [diff] [blame] | 515 | uart_check_init(self); |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 516 | return mp_obj_new_int(uart_rx_any(self)); |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 517 | } |
| 518 | STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_any_obj, pyb_uart_any); |
| 519 | |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 520 | STATIC mp_obj_t pyb_uart_sendbreak(mp_obj_t self_in) { |
| 521 | pyb_uart_obj_t *self = self_in; |
Daniel Campora | 4d7fa05 | 2015-09-07 21:19:11 +0200 | [diff] [blame] | 522 | uart_check_init(self); |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 523 | // send a break signal for at least 2 complete frames |
| 524 | MAP_UARTBreakCtl(self->reg, true); |
| 525 | UtilsDelay(UTILS_DELAY_US_TO_COUNT(PYBUART_2_FRAMES_TIME_US(self->baudrate))); |
| 526 | MAP_UARTBreakCtl(self->reg, false); |
| 527 | return mp_const_none; |
| 528 | } |
| 529 | STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_sendbreak_obj, pyb_uart_sendbreak); |
| 530 | |
Daniel Campora | dbdcb58 | 2015-09-22 23:20:29 +0200 | [diff] [blame] | 531 | /// \method irq(trigger, priority, handler, wake) |
| 532 | STATIC mp_obj_t pyb_uart_irq (mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { |
| 533 | mp_arg_val_t args[mp_irq_INIT_NUM_ARGS]; |
| 534 | mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, mp_irq_INIT_NUM_ARGS, mp_irq_init_args, args); |
Daniel Campora | 2d717ad | 2015-03-26 10:25:28 +0100 | [diff] [blame] | 535 | |
| 536 | // check if any parameters were passed |
| 537 | pyb_uart_obj_t *self = pos_args[0]; |
Daniel Campora | 4d7fa05 | 2015-09-07 21:19:11 +0200 | [diff] [blame] | 538 | uart_check_init(self); |
Daniel Campora | 2d717ad | 2015-03-26 10:25:28 +0100 | [diff] [blame] | 539 | |
Daniel Campora | dbdcb58 | 2015-09-22 23:20:29 +0200 | [diff] [blame] | 540 | // convert the priority to the correct value |
| 541 | uint priority = mp_irq_translate_priority (args[1].u_int); |
Daniel Campora | 2d717ad | 2015-03-26 10:25:28 +0100 | [diff] [blame] | 542 | |
Daniel Campora | dbdcb58 | 2015-09-22 23:20:29 +0200 | [diff] [blame] | 543 | // check the power mode |
| 544 | uint8_t pwrmode = (args[3].u_obj == mp_const_none) ? PYB_PWR_MODE_ACTIVE : mp_obj_get_int(args[3].u_obj); |
| 545 | if (PYB_PWR_MODE_ACTIVE != pwrmode) { |
| 546 | goto invalid_args; |
Daniel Campora | 2d717ad | 2015-03-26 10:25:28 +0100 | [diff] [blame] | 547 | } |
Daniel Campora | dbdcb58 | 2015-09-22 23:20:29 +0200 | [diff] [blame] | 548 | |
| 549 | // check the trigger |
| 550 | uint trigger = mp_obj_get_int(args[0].u_obj); |
| 551 | if (!trigger || trigger > (UART_TRIGGER_RX_ANY | UART_TRIGGER_RX_HALF | UART_TRIGGER_RX_FULL | UART_TRIGGER_TX_DONE)) { |
| 552 | goto invalid_args; |
| 553 | } |
| 554 | |
| 555 | // register a new callback |
| 556 | return uart_irq_new (self, trigger, priority, args[2].u_obj); |
| 557 | |
| 558 | invalid_args: |
| 559 | nlr_raise(mp_obj_new_exception_msg(&mp_type_ValueError, mpexception_value_invalid_arguments)); |
Daniel Campora | 2d717ad | 2015-03-26 10:25:28 +0100 | [diff] [blame] | 560 | } |
danicampora | 4542643 | 2015-10-14 12:32:01 +0200 | [diff] [blame] | 561 | STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_uart_irq_obj, 1, pyb_uart_irq); |
Daniel Campora | 2d717ad | 2015-03-26 10:25:28 +0100 | [diff] [blame] | 562 | |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 563 | STATIC const mp_map_elem_t pyb_uart_locals_dict_table[] = { |
| 564 | // instance methods |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 565 | { MP_OBJ_NEW_QSTR(MP_QSTR_init), (mp_obj_t)&pyb_uart_init_obj }, |
| 566 | { MP_OBJ_NEW_QSTR(MP_QSTR_deinit), (mp_obj_t)&pyb_uart_deinit_obj }, |
| 567 | { MP_OBJ_NEW_QSTR(MP_QSTR_any), (mp_obj_t)&pyb_uart_any_obj }, |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 568 | { MP_OBJ_NEW_QSTR(MP_QSTR_sendbreak), (mp_obj_t)&pyb_uart_sendbreak_obj }, |
danicampora | 4542643 | 2015-10-14 12:32:01 +0200 | [diff] [blame] | 569 | { MP_OBJ_NEW_QSTR(MP_QSTR_irq), (mp_obj_t)&pyb_uart_irq_obj }, |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 570 | |
| 571 | /// \method read([nbytes]) |
| 572 | { MP_OBJ_NEW_QSTR(MP_QSTR_read), (mp_obj_t)&mp_stream_read_obj }, |
| 573 | /// \method readall() |
| 574 | { MP_OBJ_NEW_QSTR(MP_QSTR_readall), (mp_obj_t)&mp_stream_readall_obj }, |
| 575 | /// \method readline() |
| 576 | { MP_OBJ_NEW_QSTR(MP_QSTR_readline), (mp_obj_t)&mp_stream_unbuffered_readline_obj}, |
| 577 | /// \method readinto(buf[, nbytes]) |
| 578 | { MP_OBJ_NEW_QSTR(MP_QSTR_readinto), (mp_obj_t)&mp_stream_readinto_obj }, |
| 579 | /// \method write(buf) |
| 580 | { MP_OBJ_NEW_QSTR(MP_QSTR_write), (mp_obj_t)&mp_stream_write_obj }, |
| 581 | |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 582 | // class constants |
Daniel Campora | 8332044 | 2015-09-13 15:59:45 +0200 | [diff] [blame] | 583 | { MP_OBJ_NEW_QSTR(MP_QSTR_EVEN), MP_OBJ_NEW_SMALL_INT(UART_CONFIG_PAR_EVEN) }, |
| 584 | { MP_OBJ_NEW_QSTR(MP_QSTR_ODD), MP_OBJ_NEW_SMALL_INT(UART_CONFIG_PAR_ODD) }, |
Daniel Campora | dbdcb58 | 2015-09-22 23:20:29 +0200 | [diff] [blame] | 585 | { MP_OBJ_NEW_QSTR(MP_QSTR_RX_ANY), MP_OBJ_NEW_SMALL_INT(UART_TRIGGER_RX_ANY) }, |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 586 | }; |
| 587 | |
| 588 | STATIC MP_DEFINE_CONST_DICT(pyb_uart_locals_dict, pyb_uart_locals_dict_table); |
| 589 | |
| 590 | STATIC mp_uint_t pyb_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) { |
| 591 | pyb_uart_obj_t *self = self_in; |
| 592 | byte *buf = buf_in; |
Daniel Campora | 4d7fa05 | 2015-09-07 21:19:11 +0200 | [diff] [blame] | 593 | uart_check_init(self); |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 594 | |
| 595 | // make sure we want at least 1 char |
| 596 | if (size == 0) { |
| 597 | return 0; |
| 598 | } |
| 599 | |
| 600 | // wait for first char to become available |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 601 | if (!uart_rx_wait(self)) { |
danicampora | 7ff5853 | 2015-10-20 09:27:21 +0200 | [diff] [blame] | 602 | // return EAGAIN error to indicate non-blocking (then read() method returns None) |
| 603 | *errcode = EAGAIN; |
| 604 | return MP_STREAM_ERROR; |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 605 | } |
| 606 | |
| 607 | // read the data |
| 608 | byte *orig_buf = buf; |
Daniel Campora | 2d717ad | 2015-03-26 10:25:28 +0100 | [diff] [blame] | 609 | for ( ; ; ) { |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 610 | *buf++ = uart_rx_char(self); |
Daniel Campora | f91f212 | 2015-09-07 09:23:46 +0200 | [diff] [blame] | 611 | if (--size == 0 || !uart_rx_wait(self)) { |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 612 | // return number of bytes read |
| 613 | return buf - orig_buf; |
| 614 | } |
| 615 | } |
| 616 | } |
| 617 | |
| 618 | STATIC mp_uint_t pyb_uart_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) { |
| 619 | pyb_uart_obj_t *self = self_in; |
| 620 | const char *buf = buf_in; |
Daniel Campora | 4d7fa05 | 2015-09-07 21:19:11 +0200 | [diff] [blame] | 621 | uart_check_init(self); |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 622 | |
| 623 | // write the data |
| 624 | if (!uart_tx_strn(self, buf, size)) { |
Daniel Campora | fabe79f | 2015-05-26 12:27:13 +0200 | [diff] [blame] | 625 | nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, mpexception_os_operation_failed)); |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 626 | } |
| 627 | return size; |
| 628 | } |
| 629 | |
| 630 | STATIC mp_uint_t pyb_uart_ioctl(mp_obj_t self_in, mp_uint_t request, mp_uint_t arg, int *errcode) { |
| 631 | pyb_uart_obj_t *self = self_in; |
| 632 | mp_uint_t ret; |
Daniel Campora | 4d7fa05 | 2015-09-07 21:19:11 +0200 | [diff] [blame] | 633 | uart_check_init(self); |
| 634 | |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 635 | if (request == MP_IOCTL_POLL) { |
| 636 | mp_uint_t flags = arg; |
| 637 | ret = 0; |
| 638 | if ((flags & MP_IOCTL_POLL_RD) && uart_rx_any(self)) { |
| 639 | ret |= MP_IOCTL_POLL_RD; |
| 640 | } |
| 641 | if ((flags & MP_IOCTL_POLL_WR) && MAP_UARTSpaceAvail(self->reg)) { |
| 642 | ret |= MP_IOCTL_POLL_WR; |
| 643 | } |
| 644 | } else { |
| 645 | *errcode = EINVAL; |
| 646 | ret = MP_STREAM_ERROR; |
| 647 | } |
| 648 | return ret; |
| 649 | } |
| 650 | |
| 651 | STATIC const mp_stream_p_t uart_stream_p = { |
| 652 | .read = pyb_uart_read, |
| 653 | .write = pyb_uart_write, |
| 654 | .ioctl = pyb_uart_ioctl, |
| 655 | .is_text = false, |
| 656 | }; |
| 657 | |
Daniel Campora | dbdcb58 | 2015-09-22 23:20:29 +0200 | [diff] [blame] | 658 | STATIC const mp_irq_methods_t uart_irq_methods = { |
| 659 | .init = pyb_uart_irq, |
| 660 | .enable = uart_irq_enable, |
| 661 | .disable = uart_irq_disable, |
| 662 | .flags = uart_irq_flags |
Daniel Campora | 2d717ad | 2015-03-26 10:25:28 +0100 | [diff] [blame] | 663 | }; |
| 664 | |
danicampora | 8785645 | 2015-02-06 15:35:48 +0100 | [diff] [blame] | 665 | const mp_obj_type_t pyb_uart_type = { |
| 666 | { &mp_type_type }, |
| 667 | .name = MP_QSTR_UART, |
| 668 | .print = pyb_uart_print, |
| 669 | .make_new = pyb_uart_make_new, |
| 670 | .getiter = mp_identity, |
| 671 | .iternext = mp_stream_unbuffered_iter, |
| 672 | .stream_p = &uart_stream_p, |
| 673 | .locals_dict = (mp_obj_t)&pyb_uart_locals_dict, |
| 674 | }; |