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Fabian Vogtfe3d16e2014-08-16 22:55:53 +02001/*
2 * This file is part of the Micro Python project, http://micropython.org/
3 *
4 * The MIT License (MIT)
5 *
Fabian Vogt16ee30c2014-08-28 01:18:56 +02006 * Copyright (c) 2014 Fabian Vogt
7 * Copyright (c) 2013, 2014 Damien P. George
Fabian Vogtfe3d16e2014-08-16 22:55:53 +02008 *
9 * Permission is hereby granted, free of charge, to any person obtaining a copy
10 * of this software and associated documentation files (the "Software"), to deal
11 * in the Software without restriction, including without limitation the rights
12 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
13 * copies of the Software, and to permit persons to whom the Software is
14 * furnished to do so, subject to the following conditions:
15 *
16 * The above copyright notice and this permission notice shall be included in
17 * all copies or substantial portions of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
22 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
24 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 * THE SOFTWARE.
26 */
27
28#include <stdio.h>
29#include <assert.h>
30#include <string.h>
31
32#include "mpconfig.h"
33#include "misc.h"
34#include "asmarm.h"
35
36// wrapper around everything in this file
37#if MICROPY_EMIT_ARM
38
39#define SIGNED_FIT24(x) (((x) & 0xff800000) == 0) || (((x) & 0xff000000) == 0xff000000)
40
41struct _asm_arm_t {
42 uint pass;
Fabian Vogtb7235b82014-09-03 16:59:33 +020043 mp_uint_t code_offset;
44 mp_uint_t code_size;
Fabian Vogtfe3d16e2014-08-16 22:55:53 +020045 byte *code_base;
46 byte dummy_data[4];
47
Damien George0b610de2014-09-29 16:25:04 +010048 mp_uint_t max_num_labels;
49 mp_uint_t *label_offsets;
Fabian Vogtfe3d16e2014-08-16 22:55:53 +020050 uint push_reglist;
51 uint stack_adjust;
52};
53
54asm_arm_t *asm_arm_new(uint max_num_labels) {
55 asm_arm_t *as;
56
57 as = m_new0(asm_arm_t, 1);
58 as->max_num_labels = max_num_labels;
Damien George0b610de2014-09-29 16:25:04 +010059 as->label_offsets = m_new(mp_uint_t, max_num_labels);
Fabian Vogtfe3d16e2014-08-16 22:55:53 +020060
61 return as;
62}
63
64void asm_arm_free(asm_arm_t *as, bool free_code) {
65 if (free_code) {
Fabian Vogtb7235b82014-09-03 16:59:33 +020066 MP_PLAT_FREE_EXEC(as->code_base, as->code_size);
Fabian Vogtfe3d16e2014-08-16 22:55:53 +020067 }
Damien George0b610de2014-09-29 16:25:04 +010068 m_del(mp_uint_t, as->label_offsets, as->max_num_labels);
Fabian Vogtfe3d16e2014-08-16 22:55:53 +020069 m_del_obj(asm_arm_t, as);
70}
71
72void asm_arm_start_pass(asm_arm_t *as, uint pass) {
73 as->pass = pass;
74 as->code_offset = 0;
75 if (pass == ASM_ARM_PASS_COMPUTE) {
Damien George0b610de2014-09-29 16:25:04 +010076 memset(as->label_offsets, -1, as->max_num_labels * sizeof(mp_uint_t));
Fabian Vogtfe3d16e2014-08-16 22:55:53 +020077 }
78}
79
80void asm_arm_end_pass(asm_arm_t *as) {
81 if (as->pass == ASM_ARM_PASS_COMPUTE) {
Fabian Vogtb7235b82014-09-03 16:59:33 +020082 MP_PLAT_ALLOC_EXEC(as->code_offset, (void**) &as->code_base, &as->code_size);
83 if(as->code_base == NULL) {
84 assert(0);
85 }
Damien Georgedda46462014-09-03 22:47:23 +010086 } else if(as->pass == ASM_ARM_PASS_EMIT) {
Fabian Vogtb7235b82014-09-03 16:59:33 +020087#ifdef __arm__
88 // flush I- and D-cache
Damien Georgedda46462014-09-03 22:47:23 +010089 asm volatile(
Fabian Vogtb7235b82014-09-03 16:59:33 +020090 "0:"
91 "mrc p15, 0, r15, c7, c10, 3\n"
92 "bne 0b\n"
93 "mov r0, #0\n"
Damien Georgedda46462014-09-03 22:47:23 +010094 "mcr p15, 0, r0, c7, c7, 0\n"
Fabian Vogtb7235b82014-09-03 16:59:33 +020095 : : : "r0", "cc");
96#endif
Fabian Vogtfe3d16e2014-08-16 22:55:53 +020097 }
98}
99
100// all functions must go through this one to emit bytes
101// if as->pass < ASM_ARM_PASS_EMIT, then this function only returns a buffer of 4 bytes length
102STATIC byte *asm_arm_get_cur_to_write_bytes(asm_arm_t *as, int num_bytes_to_write) {
103 if (as->pass < ASM_ARM_PASS_EMIT) {
104 as->code_offset += num_bytes_to_write;
105 return as->dummy_data;
106 } else {
107 assert(as->code_offset + num_bytes_to_write <= as->code_size);
108 byte *c = as->code_base + as->code_offset;
109 as->code_offset += num_bytes_to_write;
110 return c;
111 }
112}
113
114uint asm_arm_get_code_size(asm_arm_t *as) {
115 return as->code_size;
116}
117
118void *asm_arm_get_code(asm_arm_t *as) {
119 return as->code_base;
120}
121
122// Insert word into instruction flow
123STATIC void emit(asm_arm_t *as, uint op) {
124 *(uint*)asm_arm_get_cur_to_write_bytes(as, 4) = op;
125}
126
127// Insert word into instruction flow, add "ALWAYS" condition code
128STATIC void emit_al(asm_arm_t *as, uint op) {
Damien George0b610de2014-09-29 16:25:04 +0100129 emit(as, op | ASM_ARM_CC_AL);
Fabian Vogtfe3d16e2014-08-16 22:55:53 +0200130}
131
132// Basic instructions without condition code
133STATIC uint asm_arm_op_push(uint reglist) {
134 // stmfd sp!, {reglist}
135 return 0x92d0000 | (reglist & 0xFFFF);
136}
137
138STATIC uint asm_arm_op_pop(uint reglist) {
139 // ldmfd sp!, {reglist}
140 return 0x8bd0000 | (reglist & 0xFFFF);
141}
142
143STATIC uint asm_arm_op_mov_reg(uint rd, uint rn) {
144 // mov rd, rn
145 return 0x1a00000 | (rd << 12) | rn;
146}
147
148STATIC uint asm_arm_op_mov_imm(uint rd, uint imm) {
149 // mov rd, #imm
150 return 0x3a00000 | (rd << 12) | imm;
151}
152
153STATIC uint asm_arm_op_mvn_imm(uint rd, uint imm) {
154 // mvn rd, #imm
155 return 0x3e00000 | (rd << 12) | imm;
156}
157
158STATIC uint asm_arm_op_add_imm(uint rd, uint rn, uint imm) {
159 // add rd, rn, #imm
160 return 0x2800000 | (rn << 16) | (rd << 12) | (imm & 0xFF);
161}
162
163STATIC uint asm_arm_op_add_reg(uint rd, uint rn, uint rm) {
164 // add rd, rn, rm
165 return 0x0800000 | (rn << 16) | (rd << 12) | rm;
166}
167
168STATIC uint asm_arm_op_sub_imm(uint rd, uint rn, uint imm) {
169 // sub rd, rn, #imm
170 return 0x2400000 | (rn << 16) | (rd << 12) | (imm & 0xFF);
171}
172
Damien George3112cde2014-09-29 18:45:42 +0100173STATIC uint asm_arm_op_sub_reg(uint rd, uint rn, uint rm) {
174 // sub rd, rn, rm
175 return 0x0400000 | (rn << 16) | (rd << 12) | rm;
176}
177
Fabian Vogtfe3d16e2014-08-16 22:55:53 +0200178void asm_arm_bkpt(asm_arm_t *as) {
179 // bkpt #0
180 emit_al(as, 0x1200070);
181}
182
183// locals:
184// - stored on the stack in ascending order
Damien George0b610de2014-09-29 16:25:04 +0100185// - numbered 0 through num_locals-1
Fabian Vogtfe3d16e2014-08-16 22:55:53 +0200186// - SP points to first local
187//
188// | SP
189// v
190// l0 l1 l2 ... l(n-1)
191// ^ ^
192// | low address | high address in RAM
193
194void asm_arm_entry(asm_arm_t *as, int num_locals) {
195
196 if (num_locals < 0) {
197 num_locals = 0;
198 }
199
200 as->stack_adjust = 0;
Damien George0b610de2014-09-29 16:25:04 +0100201 as->push_reglist = 1 << ASM_ARM_REG_R1
202 | 1 << ASM_ARM_REG_R2
203 | 1 << ASM_ARM_REG_R3
204 | 1 << ASM_ARM_REG_R4
205 | 1 << ASM_ARM_REG_R5
206 | 1 << ASM_ARM_REG_R6
207 | 1 << ASM_ARM_REG_R7
208 | 1 << ASM_ARM_REG_R8;
Fabian Vogtfe3d16e2014-08-16 22:55:53 +0200209
210 // Only adjust the stack if there are more locals than usable registers
211 if(num_locals > 3) {
212 as->stack_adjust = num_locals * 4;
213 // Align stack to 8 bytes
Damien George0b610de2014-09-29 16:25:04 +0100214 if (num_locals & 1) {
Fabian Vogtfe3d16e2014-08-16 22:55:53 +0200215 as->stack_adjust += 4;
Damien George0b610de2014-09-29 16:25:04 +0100216 }
Fabian Vogtfe3d16e2014-08-16 22:55:53 +0200217 }
218
Damien George0b610de2014-09-29 16:25:04 +0100219 emit_al(as, asm_arm_op_push(as->push_reglist | 1 << ASM_ARM_REG_LR));
Fabian Vogtfe3d16e2014-08-16 22:55:53 +0200220 if (as->stack_adjust > 0) {
Damien George0b610de2014-09-29 16:25:04 +0100221 emit_al(as, asm_arm_op_sub_imm(ASM_ARM_REG_SP, ASM_ARM_REG_SP, as->stack_adjust));
Fabian Vogtfe3d16e2014-08-16 22:55:53 +0200222 }
223}
224
225void asm_arm_exit(asm_arm_t *as) {
226 if (as->stack_adjust > 0) {
Damien George0b610de2014-09-29 16:25:04 +0100227 emit_al(as, asm_arm_op_add_imm(ASM_ARM_REG_SP, ASM_ARM_REG_SP, as->stack_adjust));
Fabian Vogtfe3d16e2014-08-16 22:55:53 +0200228 }
229
Damien George0b610de2014-09-29 16:25:04 +0100230 emit_al(as, asm_arm_op_pop(as->push_reglist | (1 << ASM_ARM_REG_PC)));
Fabian Vogtfe3d16e2014-08-16 22:55:53 +0200231}
232
233void asm_arm_label_assign(asm_arm_t *as, uint label) {
234 assert(label < as->max_num_labels);
235 if (as->pass < ASM_ARM_PASS_EMIT) {
236 // assign label offset
237 assert(as->label_offsets[label] == -1);
238 as->label_offsets[label] = as->code_offset;
239 } else {
240 // ensure label offset has not changed from PASS_COMPUTE to PASS_EMIT
241 assert(as->label_offsets[label] == as->code_offset);
242 }
243}
244
245void asm_arm_align(asm_arm_t* as, uint align) {
246 // TODO fill unused data with NOPs?
247 as->code_offset = (as->code_offset + align - 1) & (~(align - 1));
248}
249
250void asm_arm_data(asm_arm_t* as, uint bytesize, uint val) {
251 byte *c = asm_arm_get_cur_to_write_bytes(as, bytesize);
252 // only write to the buffer in the emit pass (otherwise we overflow dummy_data)
253 if (as->pass == ASM_ARM_PASS_EMIT) {
254 // little endian
255 for (uint i = 0; i < bytesize; i++) {
256 *c++ = val;
257 val >>= 8;
258 }
259 }
260}
261
262void asm_arm_mov_reg_reg(asm_arm_t *as, uint reg_dest, uint reg_src) {
263 emit_al(as, asm_arm_op_mov_reg(reg_dest, reg_src));
264}
265
266void asm_arm_mov_reg_i32(asm_arm_t *as, uint rd, int imm) {
267 // TODO: There are more variants of immediate values
268 if ((imm & 0xFF) == imm) {
269 emit_al(as, asm_arm_op_mov_imm(rd, imm));
270 } else if (imm < 0 && ((-imm) & 0xFF) == -imm) {
271 emit_al(as, asm_arm_op_mvn_imm(rd, -imm));
272 } else {
273 //Insert immediate into code and jump over it
274 emit_al(as, 0x59f0000 | (rd << 12)); // ldr rd, [pc]
275 emit_al(as, 0xa000000); // b pc
276 emit(as, imm);
277 }
278}
279
280void asm_arm_mov_local_reg(asm_arm_t *as, int local_num, uint rd) {
281 // str rd, [sp, #local_num*4]
282 emit_al(as, 0x58d0000 | (rd << 12) | (local_num << 2));
283}
284
285void asm_arm_mov_reg_local(asm_arm_t *as, uint rd, int local_num) {
286 // ldr rd, [sp, #local_num*4]
287 emit_al(as, 0x59d0000 | (rd << 12) | (local_num << 2));
288}
289
290void asm_arm_cmp_reg_i8(asm_arm_t *as, uint rd, int imm) {
291 // cmp rd, #imm
292 emit_al(as, 0x3500000 | (rd << 16) | (imm & 0xFF));
293}
294
295void asm_arm_cmp_reg_reg(asm_arm_t *as, uint rd, uint rn) {
296 // cmp rd, rn
297 emit_al(as, 0x1500000 | (rd << 16) | rn);
298}
299
Fabian Vogte5268962014-10-04 00:53:46 +0200300void asm_arm_setcc_reg(asm_arm_t *as, uint rd, uint cond) {
301 emit(as, asm_arm_op_mov_imm(rd, 1) | cond); // movCOND rd, #1
302 emit(as, asm_arm_op_mov_imm(rd, 0) | (cond ^ (1 << 28))); // mov!COND rd, #0
Fabian Vogtfe3d16e2014-08-16 22:55:53 +0200303}
304
Damien George3112cde2014-09-29 18:45:42 +0100305void asm_arm_add_reg_reg_reg(asm_arm_t *as, uint rd, uint rn, uint rm) {
Fabian Vogtfe3d16e2014-08-16 22:55:53 +0200306 // add rd, rn, rm
307 emit_al(as, asm_arm_op_add_reg(rd, rn, rm));
308}
309
Damien George3112cde2014-09-29 18:45:42 +0100310void asm_arm_sub_reg_reg_reg(asm_arm_t *as, uint rd, uint rn, uint rm) {
311 // sub rd, rn, rm
312 emit_al(as, asm_arm_op_sub_reg(rd, rn, rm));
313}
314
Fabian Vogtfe3d16e2014-08-16 22:55:53 +0200315void asm_arm_mov_reg_local_addr(asm_arm_t *as, uint rd, int local_num) {
316 // add rd, sp, #local_num*4
Damien George0b610de2014-09-29 16:25:04 +0100317 emit_al(as, asm_arm_op_add_imm(rd, ASM_ARM_REG_SP, local_num << 2));
Fabian Vogtfe3d16e2014-08-16 22:55:53 +0200318}
319
Fabian Vogte5268962014-10-04 00:53:46 +0200320void asm_arm_lsl_reg_reg(asm_arm_t *as, uint rd, uint rs) {
321 // mov rd, rd, lsl rs
322 emit_al(as, 0x1a00010 | (rd << 12) | (rs << 8) | rd);
323}
324
325void asm_arm_asr_reg_reg(asm_arm_t *as, uint rd, uint rs) {
326 // mov rd, rd, asr rs
327 emit_al(as, 0x1a00050 | (rd << 12) | (rs << 8) | rd);
328}
329
330void asm_arm_str_reg_reg(asm_arm_t *as, uint rd, uint rm) {
331 // str rd, [rm]
332 emit_al(as, 0x5800000 | (rm << 16) | (rd << 12));
333}
334
335void asm_arm_strh_reg_reg(asm_arm_t *as, uint rd, uint rm) {
336 // strh rd, [rm]
337 emit_al(as, 0x1c000b0 | (rm << 16) | (rd << 12));
338}
339
340void asm_arm_strb_reg_reg(asm_arm_t *as, uint rd, uint rm) {
341 // strb rd, [rm]
342 emit_al(as, 0x5c00000 | (rm << 16) | (rd << 12));
343}
344
345void asm_arm_str_reg_reg_reg(asm_arm_t *as, uint rd, uint rm, uint rn) {
346 // str rd, [rm, rn, lsl #2]
347 emit_al(as, 0x7800100 | (rm << 16) | (rd << 12) | rn);
348}
349
350void asm_arm_strh_reg_reg_reg(asm_arm_t *as, uint rd, uint rm, uint rn) {
351 // strh doesn't support scaled register index
352 emit_al(as, 0x1a00080 | (ASM_ARM_REG_R8 << 12) | rn); // mov r8, rn, lsl #1
353 emit_al(as, 0x18000b0 | (rm << 16) | (rd << 12) | ASM_ARM_REG_R8); // strh rd, [rm, r8]
354}
355
356void asm_arm_strb_reg_reg_reg(asm_arm_t *as, uint rd, uint rm, uint rn) {
357 // strb rd, [rm, rn]
358 emit_al(as, 0x7c00000 | (rm << 16) | (rd << 12) | rn);
359}
360
Fabian Vogtfe3d16e2014-08-16 22:55:53 +0200361void asm_arm_bcc_label(asm_arm_t *as, int cond, uint label) {
362 assert(label < as->max_num_labels);
Damien George0b610de2014-09-29 16:25:04 +0100363 mp_uint_t dest = as->label_offsets[label];
364 mp_int_t rel = dest - as->code_offset;
Fabian Vogtfe3d16e2014-08-16 22:55:53 +0200365 rel -= 8; // account for instruction prefetch, PC is 8 bytes ahead of this instruction
366 rel >>= 2; // in ARM mode the branch target is 32-bit aligned, so the 2 LSB are omitted
367
368 if (SIGNED_FIT24(rel)) {
369 emit(as, cond | 0xa000000 | (rel & 0xffffff));
370 } else {
371 printf("asm_arm_bcc: branch does not fit in 24 bits\n");
372 }
373}
374
375void asm_arm_b_label(asm_arm_t *as, uint label) {
Damien George0b610de2014-09-29 16:25:04 +0100376 asm_arm_bcc_label(as, ASM_ARM_CC_AL, label);
Fabian Vogtfe3d16e2014-08-16 22:55:53 +0200377}
378
379void asm_arm_bl_ind(asm_arm_t *as, void *fun_ptr, uint fun_id, uint reg_temp) {
380 // If the table offset fits into the ldr instruction
381 if(fun_id < (0x1000 / 4)) {
Damien George0b610de2014-09-29 16:25:04 +0100382 emit_al(as, asm_arm_op_mov_reg(ASM_ARM_REG_LR, ASM_ARM_REG_PC)); // mov lr, pc
Fabian Vogtfe3d16e2014-08-16 22:55:53 +0200383 emit_al(as, 0x597f000 | (fun_id << 2)); // ldr pc, [r7, #fun_id*4]
384 return;
385 }
386
387 emit_al(as, 0x59f0004 | (reg_temp << 12)); // ldr rd, [pc, #4]
388 // Set lr after fun_ptr
Damien George0b610de2014-09-29 16:25:04 +0100389 emit_al(as, asm_arm_op_add_imm(ASM_ARM_REG_LR, ASM_ARM_REG_PC, 4)); // add lr, pc, #4
390 emit_al(as, asm_arm_op_mov_reg(ASM_ARM_REG_PC, reg_temp)); // mov pc, reg_temp
Fabian Vogtfe3d16e2014-08-16 22:55:53 +0200391 emit(as, (uint) fun_ptr);
392}
393
394#endif // MICROPY_EMIT_ARM