blob: 843ec38fec7bb6d0762e7f9432a8a6ca803e9d46 [file] [log] [blame]
Sanjay Lal669e8462012-11-21 18:34:02 -08001/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * KVM/MIPS: MIPS specific KVM APIs
7 *
8 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
9 * Authors: Sanjay Lal <sanjayl@kymasys.com>
10*/
11
12#include <linux/errno.h>
13#include <linux/err.h>
14#include <linux/module.h>
15#include <linux/vmalloc.h>
16#include <linux/fs.h>
17#include <linux/bootmem.h>
James Hoganef6bb312015-02-04 17:06:37 +000018#include <asm/fpu.h>
Sanjay Lal669e8462012-11-21 18:34:02 -080019#include <asm/page.h>
20#include <asm/cacheflush.h>
21#include <asm/mmu_context.h>
22
23#include <linux/kvm_host.h>
24
25#include "kvm_mips_int.h"
26#include "kvm_mips_comm.h"
27
28#define CREATE_TRACE_POINTS
29#include "trace.h"
30
31#ifndef VECTORSPACING
32#define VECTORSPACING 0x100 /* for EI/VI mode */
33#endif
34
35#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
36struct kvm_stats_debugfs_item debugfs_entries[] = {
37 { "wait", VCPU_STAT(wait_exits) },
38 { "cache", VCPU_STAT(cache_exits) },
39 { "signal", VCPU_STAT(signal_exits) },
40 { "interrupt", VCPU_STAT(int_exits) },
41 { "cop_unsuable", VCPU_STAT(cop_unusable_exits) },
42 { "tlbmod", VCPU_STAT(tlbmod_exits) },
43 { "tlbmiss_ld", VCPU_STAT(tlbmiss_ld_exits) },
44 { "tlbmiss_st", VCPU_STAT(tlbmiss_st_exits) },
45 { "addrerr_st", VCPU_STAT(addrerr_st_exits) },
46 { "addrerr_ld", VCPU_STAT(addrerr_ld_exits) },
47 { "syscall", VCPU_STAT(syscall_exits) },
48 { "resvd_inst", VCPU_STAT(resvd_inst_exits) },
49 { "break_inst", VCPU_STAT(break_inst_exits) },
50 { "flush_dcache", VCPU_STAT(flush_dcache_exits) },
51 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
52 {NULL}
53};
54
55static int kvm_mips_reset_vcpu(struct kvm_vcpu *vcpu)
56{
57 int i;
58 for_each_possible_cpu(i) {
59 vcpu->arch.guest_kernel_asid[i] = 0;
60 vcpu->arch.guest_user_asid[i] = 0;
61 }
62 return 0;
63}
64
65gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
66{
67 return gfn;
68}
69
70/* XXXKYMA: We are simulatoring a processor that has the WII bit set in Config7, so we
71 * are "runnable" if interrupts are pending
72 */
73int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
74{
75 return !!(vcpu->arch.pending_exceptions);
76}
77
78int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
79{
80 return 1;
81}
82
83int kvm_arch_hardware_enable(void *garbage)
84{
85 return 0;
86}
87
88void kvm_arch_hardware_disable(void *garbage)
89{
90}
91
92int kvm_arch_hardware_setup(void)
93{
94 return 0;
95}
96
97void kvm_arch_hardware_unsetup(void)
98{
99}
100
101void kvm_arch_check_processor_compat(void *rtn)
102{
103 int *r = (int *)rtn;
104 *r = 0;
105 return;
106}
107
108static void kvm_mips_init_tlbs(struct kvm *kvm)
109{
110 unsigned long wired;
111
112 /* Add a wired entry to the TLB, it is used to map the commpage to the Guest kernel */
113 wired = read_c0_wired();
114 write_c0_wired(wired + 1);
115 mtc0_tlbw_hazard();
116 kvm->arch.commpage_tlb = wired;
117
118 kvm_debug("[%d] commpage TLB: %d\n", smp_processor_id(),
119 kvm->arch.commpage_tlb);
120}
121
122static void kvm_mips_init_vm_percpu(void *arg)
123{
124 struct kvm *kvm = (struct kvm *)arg;
125
126 kvm_mips_init_tlbs(kvm);
127 kvm_mips_callbacks->vm_init(kvm);
128
129}
130
131int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
132{
133 if (atomic_inc_return(&kvm_mips_instance) == 1) {
134 kvm_info("%s: 1st KVM instance, setup host TLB parameters\n",
135 __func__);
136 on_each_cpu(kvm_mips_init_vm_percpu, kvm, 1);
137 }
138
139
140 return 0;
141}
142
143void kvm_mips_free_vcpus(struct kvm *kvm)
144{
145 unsigned int i;
146 struct kvm_vcpu *vcpu;
147
148 /* Put the pages we reserved for the guest pmap */
149 for (i = 0; i < kvm->arch.guest_pmap_npages; i++) {
150 if (kvm->arch.guest_pmap[i] != KVM_INVALID_PAGE)
151 kvm_mips_release_pfn_clean(kvm->arch.guest_pmap[i]);
152 }
James Hoganf4a42c32014-05-29 10:16:44 +0100153 kfree(kvm->arch.guest_pmap);
Sanjay Lal669e8462012-11-21 18:34:02 -0800154
155 kvm_for_each_vcpu(i, vcpu, kvm) {
156 kvm_arch_vcpu_free(vcpu);
157 }
158
159 mutex_lock(&kvm->lock);
160
161 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
162 kvm->vcpus[i] = NULL;
163
164 atomic_set(&kvm->online_vcpus, 0);
165
166 mutex_unlock(&kvm->lock);
167}
168
169void kvm_arch_sync_events(struct kvm *kvm)
170{
171}
172
173static void kvm_mips_uninit_tlbs(void *arg)
174{
175 /* Restore wired count */
176 write_c0_wired(0);
177 mtc0_tlbw_hazard();
178 /* Clear out all the TLBs */
179 kvm_local_flush_tlb_all();
180}
181
182void kvm_arch_destroy_vm(struct kvm *kvm)
183{
184 kvm_mips_free_vcpus(kvm);
185
186 /* If this is the last instance, restore wired count */
187 if (atomic_dec_return(&kvm_mips_instance) == 0) {
188 kvm_info("%s: last KVM instance, restoring TLB parameters\n",
189 __func__);
190 on_each_cpu(kvm_mips_uninit_tlbs, NULL, 1);
191 }
192}
193
194long
195kvm_arch_dev_ioctl(struct file *filp, unsigned int ioctl, unsigned long arg)
196{
David Daneyed829852013-05-23 09:49:10 -0700197 return -ENOIOCTLCMD;
Sanjay Lal669e8462012-11-21 18:34:02 -0800198}
199
200void kvm_arch_free_memslot(struct kvm_memory_slot *free,
201 struct kvm_memory_slot *dont)
202{
203}
204
205int kvm_arch_create_memslot(struct kvm_memory_slot *slot, unsigned long npages)
206{
207 return 0;
208}
209
210int kvm_arch_prepare_memory_region(struct kvm *kvm,
Linus Torvaldsdaf799c2013-05-10 07:48:05 -0700211 struct kvm_memory_slot *memslot,
212 struct kvm_userspace_memory_region *mem,
213 enum kvm_mr_change change)
Sanjay Lal669e8462012-11-21 18:34:02 -0800214{
215 return 0;
216}
217
218void kvm_arch_commit_memory_region(struct kvm *kvm,
Linus Torvaldsdaf799c2013-05-10 07:48:05 -0700219 struct kvm_userspace_memory_region *mem,
220 const struct kvm_memory_slot *old,
221 enum kvm_mr_change change)
Sanjay Lal669e8462012-11-21 18:34:02 -0800222{
223 unsigned long npages = 0;
224 int i, err = 0;
225
226 kvm_debug("%s: kvm: %p slot: %d, GPA: %llx, size: %llx, QVA: %llx\n",
227 __func__, kvm, mem->slot, mem->guest_phys_addr,
228 mem->memory_size, mem->userspace_addr);
229
230 /* Setup Guest PMAP table */
231 if (!kvm->arch.guest_pmap) {
232 if (mem->slot == 0)
233 npages = mem->memory_size >> PAGE_SHIFT;
234
235 if (npages) {
236 kvm->arch.guest_pmap_npages = npages;
237 kvm->arch.guest_pmap =
238 kzalloc(npages * sizeof(unsigned long), GFP_KERNEL);
239
240 if (!kvm->arch.guest_pmap) {
241 kvm_err("Failed to allocate guest PMAP");
242 err = -ENOMEM;
243 goto out;
244 }
245
246 kvm_info
247 ("Allocated space for Guest PMAP Table (%ld pages) @ %p\n",
248 npages, kvm->arch.guest_pmap);
249
250 /* Now setup the page table */
251 for (i = 0; i < npages; i++) {
252 kvm->arch.guest_pmap[i] = KVM_INVALID_PAGE;
253 }
254 }
255 }
256out:
257 return;
258}
259
260void kvm_arch_flush_shadow_all(struct kvm *kvm)
261{
262}
263
264void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
265 struct kvm_memory_slot *slot)
266{
267}
268
269void kvm_arch_flush_shadow(struct kvm *kvm)
270{
271}
272
273struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm, unsigned int id)
274{
275 extern char mips32_exception[], mips32_exceptionEnd[];
276 extern char mips32_GuestException[], mips32_GuestExceptionEnd[];
277 int err, size, offset;
278 void *gebase;
279 int i;
280
281 struct kvm_vcpu *vcpu = kzalloc(sizeof(struct kvm_vcpu), GFP_KERNEL);
282
283 if (!vcpu) {
284 err = -ENOMEM;
285 goto out;
286 }
287
288 err = kvm_vcpu_init(vcpu, kvm, id);
289
290 if (err)
291 goto out_free_cpu;
292
293 kvm_info("kvm @ %p: create cpu %d at %p\n", kvm, id, vcpu);
294
295 /* Allocate space for host mode exception handlers that handle
296 * guest mode exits
297 */
298 if (cpu_has_veic || cpu_has_vint) {
299 size = 0x200 + VECTORSPACING * 64;
300 } else {
James Hogan06c757b2014-05-29 10:16:23 +0100301 size = 0x4000;
Sanjay Lal669e8462012-11-21 18:34:02 -0800302 }
303
304 /* Save Linux EBASE */
305 vcpu->arch.host_ebase = (void *)read_c0_ebase();
306
307 gebase = kzalloc(ALIGN(size, PAGE_SIZE), GFP_KERNEL);
308
309 if (!gebase) {
310 err = -ENOMEM;
311 goto out_free_cpu;
312 }
313 kvm_info("Allocated %d bytes for KVM Exception Handlers @ %p\n",
314 ALIGN(size, PAGE_SIZE), gebase);
315
316 /* Save new ebase */
317 vcpu->arch.guest_ebase = gebase;
318
319 /* Copy L1 Guest Exception handler to correct offset */
320
321 /* TLB Refill, EXL = 0 */
322 memcpy(gebase, mips32_exception,
323 mips32_exceptionEnd - mips32_exception);
324
325 /* General Exception Entry point */
326 memcpy(gebase + 0x180, mips32_exception,
327 mips32_exceptionEnd - mips32_exception);
328
329 /* For vectored interrupts poke the exception code @ all offsets 0-7 */
330 for (i = 0; i < 8; i++) {
331 kvm_debug("L1 Vectored handler @ %p\n",
332 gebase + 0x200 + (i * VECTORSPACING));
333 memcpy(gebase + 0x200 + (i * VECTORSPACING), mips32_exception,
334 mips32_exceptionEnd - mips32_exception);
335 }
336
337 /* General handler, relocate to unmapped space for sanity's sake */
338 offset = 0x2000;
339 kvm_info("Installing KVM Exception handlers @ %p, %#x bytes\n",
340 gebase + offset,
341 mips32_GuestExceptionEnd - mips32_GuestException);
342
343 memcpy(gebase + offset, mips32_GuestException,
344 mips32_GuestExceptionEnd - mips32_GuestException);
345
346 /* Invalidate the icache for these ranges */
347 mips32_SyncICache((unsigned long) gebase, ALIGN(size, PAGE_SIZE));
348
349 /* Allocate comm page for guest kernel, a TLB will be reserved for mapping GVA @ 0xFFFF8000 to this page */
350 vcpu->arch.kseg0_commpage = kzalloc(PAGE_SIZE << 1, GFP_KERNEL);
351
352 if (!vcpu->arch.kseg0_commpage) {
353 err = -ENOMEM;
354 goto out_free_gebase;
355 }
356
357 kvm_info("Allocated COMM page @ %p\n", vcpu->arch.kseg0_commpage);
358 kvm_mips_commpage_init(vcpu);
359
360 /* Init */
361 vcpu->arch.last_sched_cpu = -1;
362
363 /* Start off the timer */
364 kvm_mips_emulate_count(vcpu);
365
366 return vcpu;
367
368out_free_gebase:
369 kfree(gebase);
370
371out_free_cpu:
372 kfree(vcpu);
373
374out:
375 return ERR_PTR(err);
376}
377
378void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
379{
380 hrtimer_cancel(&vcpu->arch.comparecount_timer);
381
382 kvm_vcpu_uninit(vcpu);
383
384 kvm_mips_dump_stats(vcpu);
385
James Hoganf4a42c32014-05-29 10:16:44 +0100386 kfree(vcpu->arch.guest_ebase);
387 kfree(vcpu->arch.kseg0_commpage);
Deng-Cheng Zhu264f8742014-06-24 10:31:08 -0700388 kfree(vcpu);
Sanjay Lal669e8462012-11-21 18:34:02 -0800389}
390
391void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
392{
393 kvm_arch_vcpu_free(vcpu);
394}
395
396int
397kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
398 struct kvm_guest_debug *dbg)
399{
David Daneyed829852013-05-23 09:49:10 -0700400 return -ENOIOCTLCMD;
Sanjay Lal669e8462012-11-21 18:34:02 -0800401}
402
403int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)
404{
405 int r = 0;
406 sigset_t sigsaved;
407
408 if (vcpu->sigset_active)
409 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
410
411 if (vcpu->mmio_needed) {
412 if (!vcpu->mmio_is_write)
413 kvm_mips_complete_mmio_load(vcpu, run);
414 vcpu->mmio_needed = 0;
415 }
416
James Hoganef6bb312015-02-04 17:06:37 +0000417 lose_fpu(1);
418
James Hogan7528bb2e2014-05-29 10:16:32 +0100419 local_irq_disable();
Sanjay Lal669e8462012-11-21 18:34:02 -0800420 /* Check if we have any exceptions/interrupts pending */
421 kvm_mips_deliver_interrupts(vcpu,
422 kvm_read_c0_guest_cause(vcpu->arch.cop0));
423
Sanjay Lal669e8462012-11-21 18:34:02 -0800424 kvm_guest_enter();
425
426 r = __kvm_mips_vcpu_run(run, vcpu);
427
428 kvm_guest_exit();
429 local_irq_enable();
430
431 if (vcpu->sigset_active)
432 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
433
434 return r;
435}
436
437int
438kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu, struct kvm_mips_interrupt *irq)
439{
440 int intr = (int)irq->irq;
441 struct kvm_vcpu *dvcpu = NULL;
442
443 if (intr == 3 || intr == -3 || intr == 4 || intr == -4)
444 kvm_debug("%s: CPU: %d, INTR: %d\n", __func__, irq->cpu,
445 (int)intr);
446
447 if (irq->cpu == -1)
448 dvcpu = vcpu;
449 else
450 dvcpu = vcpu->kvm->vcpus[irq->cpu];
451
452 if (intr == 2 || intr == 3 || intr == 4) {
453 kvm_mips_callbacks->queue_io_int(dvcpu, irq);
454
455 } else if (intr == -2 || intr == -3 || intr == -4) {
456 kvm_mips_callbacks->dequeue_io_int(dvcpu, irq);
457 } else {
458 kvm_err("%s: invalid interrupt ioctl (%d:%d)\n", __func__,
459 irq->cpu, irq->irq);
460 return -EINVAL;
461 }
462
463 dvcpu->arch.wait = 0;
464
465 if (waitqueue_active(&dvcpu->wq)) {
466 wake_up_interruptible(&dvcpu->wq);
467 }
468
469 return 0;
470}
471
472int
473kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
474 struct kvm_mp_state *mp_state)
475{
David Daneyed829852013-05-23 09:49:10 -0700476 return -ENOIOCTLCMD;
Sanjay Lal669e8462012-11-21 18:34:02 -0800477}
478
479int
480kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
481 struct kvm_mp_state *mp_state)
482{
David Daneyed829852013-05-23 09:49:10 -0700483 return -ENOIOCTLCMD;
Sanjay Lal669e8462012-11-21 18:34:02 -0800484}
485
David Daney681865d2013-06-10 12:33:48 -0700486#define MIPS_CP0_32(_R, _S) \
487 (KVM_REG_MIPS | KVM_REG_SIZE_U32 | 0x10000 | (8 * (_R) + (_S)))
488
489#define MIPS_CP0_64(_R, _S) \
490 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 0x10000 | (8 * (_R) + (_S)))
491
492#define KVM_REG_MIPS_CP0_INDEX MIPS_CP0_32(0, 0)
493#define KVM_REG_MIPS_CP0_ENTRYLO0 MIPS_CP0_64(2, 0)
494#define KVM_REG_MIPS_CP0_ENTRYLO1 MIPS_CP0_64(3, 0)
495#define KVM_REG_MIPS_CP0_CONTEXT MIPS_CP0_64(4, 0)
496#define KVM_REG_MIPS_CP0_USERLOCAL MIPS_CP0_64(4, 2)
497#define KVM_REG_MIPS_CP0_PAGEMASK MIPS_CP0_32(5, 0)
498#define KVM_REG_MIPS_CP0_PAGEGRAIN MIPS_CP0_32(5, 1)
499#define KVM_REG_MIPS_CP0_WIRED MIPS_CP0_32(6, 0)
500#define KVM_REG_MIPS_CP0_HWRENA MIPS_CP0_32(7, 0)
501#define KVM_REG_MIPS_CP0_BADVADDR MIPS_CP0_64(8, 0)
502#define KVM_REG_MIPS_CP0_COUNT MIPS_CP0_32(9, 0)
503#define KVM_REG_MIPS_CP0_ENTRYHI MIPS_CP0_64(10, 0)
504#define KVM_REG_MIPS_CP0_COMPARE MIPS_CP0_32(11, 0)
505#define KVM_REG_MIPS_CP0_STATUS MIPS_CP0_32(12, 0)
506#define KVM_REG_MIPS_CP0_CAUSE MIPS_CP0_32(13, 0)
507#define KVM_REG_MIPS_CP0_EBASE MIPS_CP0_64(15, 1)
508#define KVM_REG_MIPS_CP0_CONFIG MIPS_CP0_32(16, 0)
509#define KVM_REG_MIPS_CP0_CONFIG1 MIPS_CP0_32(16, 1)
510#define KVM_REG_MIPS_CP0_CONFIG2 MIPS_CP0_32(16, 2)
511#define KVM_REG_MIPS_CP0_CONFIG3 MIPS_CP0_32(16, 3)
512#define KVM_REG_MIPS_CP0_CONFIG7 MIPS_CP0_32(16, 7)
513#define KVM_REG_MIPS_CP0_XCONTEXT MIPS_CP0_64(20, 0)
514#define KVM_REG_MIPS_CP0_ERROREPC MIPS_CP0_64(30, 0)
David Daney4c73fb22013-05-23 09:49:09 -0700515
516static u64 kvm_mips_get_one_regs[] = {
517 KVM_REG_MIPS_R0,
518 KVM_REG_MIPS_R1,
519 KVM_REG_MIPS_R2,
520 KVM_REG_MIPS_R3,
521 KVM_REG_MIPS_R4,
522 KVM_REG_MIPS_R5,
523 KVM_REG_MIPS_R6,
524 KVM_REG_MIPS_R7,
525 KVM_REG_MIPS_R8,
526 KVM_REG_MIPS_R9,
527 KVM_REG_MIPS_R10,
528 KVM_REG_MIPS_R11,
529 KVM_REG_MIPS_R12,
530 KVM_REG_MIPS_R13,
531 KVM_REG_MIPS_R14,
532 KVM_REG_MIPS_R15,
533 KVM_REG_MIPS_R16,
534 KVM_REG_MIPS_R17,
535 KVM_REG_MIPS_R18,
536 KVM_REG_MIPS_R19,
537 KVM_REG_MIPS_R20,
538 KVM_REG_MIPS_R21,
539 KVM_REG_MIPS_R22,
540 KVM_REG_MIPS_R23,
541 KVM_REG_MIPS_R24,
542 KVM_REG_MIPS_R25,
543 KVM_REG_MIPS_R26,
544 KVM_REG_MIPS_R27,
545 KVM_REG_MIPS_R28,
546 KVM_REG_MIPS_R29,
547 KVM_REG_MIPS_R30,
548 KVM_REG_MIPS_R31,
549
550 KVM_REG_MIPS_HI,
551 KVM_REG_MIPS_LO,
552 KVM_REG_MIPS_PC,
553
554 KVM_REG_MIPS_CP0_INDEX,
555 KVM_REG_MIPS_CP0_CONTEXT,
556 KVM_REG_MIPS_CP0_PAGEMASK,
557 KVM_REG_MIPS_CP0_WIRED,
558 KVM_REG_MIPS_CP0_BADVADDR,
559 KVM_REG_MIPS_CP0_ENTRYHI,
560 KVM_REG_MIPS_CP0_STATUS,
561 KVM_REG_MIPS_CP0_CAUSE,
562 /* EPC set via kvm_regs, et al. */
563 KVM_REG_MIPS_CP0_CONFIG,
564 KVM_REG_MIPS_CP0_CONFIG1,
565 KVM_REG_MIPS_CP0_CONFIG2,
566 KVM_REG_MIPS_CP0_CONFIG3,
567 KVM_REG_MIPS_CP0_CONFIG7,
568 KVM_REG_MIPS_CP0_ERROREPC
569};
570
571static int kvm_mips_get_reg(struct kvm_vcpu *vcpu,
572 const struct kvm_one_reg *reg)
573{
David Daney4c73fb22013-05-23 09:49:09 -0700574 struct mips_coproc *cop0 = vcpu->arch.cop0;
575 s64 v;
576
577 switch (reg->id) {
578 case KVM_REG_MIPS_R0 ... KVM_REG_MIPS_R31:
579 v = (long)vcpu->arch.gprs[reg->id - KVM_REG_MIPS_R0];
580 break;
581 case KVM_REG_MIPS_HI:
582 v = (long)vcpu->arch.hi;
583 break;
584 case KVM_REG_MIPS_LO:
585 v = (long)vcpu->arch.lo;
586 break;
587 case KVM_REG_MIPS_PC:
588 v = (long)vcpu->arch.pc;
589 break;
590
591 case KVM_REG_MIPS_CP0_INDEX:
592 v = (long)kvm_read_c0_guest_index(cop0);
593 break;
594 case KVM_REG_MIPS_CP0_CONTEXT:
595 v = (long)kvm_read_c0_guest_context(cop0);
596 break;
597 case KVM_REG_MIPS_CP0_PAGEMASK:
598 v = (long)kvm_read_c0_guest_pagemask(cop0);
599 break;
600 case KVM_REG_MIPS_CP0_WIRED:
601 v = (long)kvm_read_c0_guest_wired(cop0);
602 break;
603 case KVM_REG_MIPS_CP0_BADVADDR:
604 v = (long)kvm_read_c0_guest_badvaddr(cop0);
605 break;
606 case KVM_REG_MIPS_CP0_ENTRYHI:
607 v = (long)kvm_read_c0_guest_entryhi(cop0);
608 break;
609 case KVM_REG_MIPS_CP0_STATUS:
610 v = (long)kvm_read_c0_guest_status(cop0);
611 break;
612 case KVM_REG_MIPS_CP0_CAUSE:
613 v = (long)kvm_read_c0_guest_cause(cop0);
614 break;
615 case KVM_REG_MIPS_CP0_ERROREPC:
616 v = (long)kvm_read_c0_guest_errorepc(cop0);
617 break;
618 case KVM_REG_MIPS_CP0_CONFIG:
619 v = (long)kvm_read_c0_guest_config(cop0);
620 break;
621 case KVM_REG_MIPS_CP0_CONFIG1:
622 v = (long)kvm_read_c0_guest_config1(cop0);
623 break;
624 case KVM_REG_MIPS_CP0_CONFIG2:
625 v = (long)kvm_read_c0_guest_config2(cop0);
626 break;
627 case KVM_REG_MIPS_CP0_CONFIG3:
628 v = (long)kvm_read_c0_guest_config3(cop0);
629 break;
630 case KVM_REG_MIPS_CP0_CONFIG7:
631 v = (long)kvm_read_c0_guest_config7(cop0);
632 break;
633 default:
634 return -EINVAL;
635 }
David Daney681865d2013-06-10 12:33:48 -0700636 if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U64) {
637 u64 __user *uaddr64 = (u64 __user *)(long)reg->addr;
638 return put_user(v, uaddr64);
639 } else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U32) {
640 u32 __user *uaddr32 = (u32 __user *)(long)reg->addr;
641 u32 v32 = (u32)v;
642 return put_user(v32, uaddr32);
643 } else {
644 return -EINVAL;
645 }
David Daney4c73fb22013-05-23 09:49:09 -0700646}
647
648static int kvm_mips_set_reg(struct kvm_vcpu *vcpu,
649 const struct kvm_one_reg *reg)
650{
David Daney4c73fb22013-05-23 09:49:09 -0700651 struct mips_coproc *cop0 = vcpu->arch.cop0;
652 u64 v;
653
David Daney681865d2013-06-10 12:33:48 -0700654 if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U64) {
655 u64 __user *uaddr64 = (u64 __user *)(long)reg->addr;
656
657 if (get_user(v, uaddr64) != 0)
658 return -EFAULT;
659 } else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U32) {
660 u32 __user *uaddr32 = (u32 __user *)(long)reg->addr;
661 s32 v32;
662
663 if (get_user(v32, uaddr32) != 0)
664 return -EFAULT;
665 v = (s64)v32;
666 } else {
667 return -EINVAL;
668 }
David Daney4c73fb22013-05-23 09:49:09 -0700669
670 switch (reg->id) {
671 case KVM_REG_MIPS_R0:
672 /* Silently ignore requests to set $0 */
673 break;
674 case KVM_REG_MIPS_R1 ... KVM_REG_MIPS_R31:
675 vcpu->arch.gprs[reg->id - KVM_REG_MIPS_R0] = v;
676 break;
677 case KVM_REG_MIPS_HI:
678 vcpu->arch.hi = v;
679 break;
680 case KVM_REG_MIPS_LO:
681 vcpu->arch.lo = v;
682 break;
683 case KVM_REG_MIPS_PC:
684 vcpu->arch.pc = v;
685 break;
686
687 case KVM_REG_MIPS_CP0_INDEX:
688 kvm_write_c0_guest_index(cop0, v);
689 break;
690 case KVM_REG_MIPS_CP0_CONTEXT:
691 kvm_write_c0_guest_context(cop0, v);
692 break;
693 case KVM_REG_MIPS_CP0_PAGEMASK:
694 kvm_write_c0_guest_pagemask(cop0, v);
695 break;
696 case KVM_REG_MIPS_CP0_WIRED:
697 kvm_write_c0_guest_wired(cop0, v);
698 break;
699 case KVM_REG_MIPS_CP0_BADVADDR:
700 kvm_write_c0_guest_badvaddr(cop0, v);
701 break;
702 case KVM_REG_MIPS_CP0_ENTRYHI:
703 kvm_write_c0_guest_entryhi(cop0, v);
704 break;
705 case KVM_REG_MIPS_CP0_STATUS:
706 kvm_write_c0_guest_status(cop0, v);
707 break;
708 case KVM_REG_MIPS_CP0_CAUSE:
709 kvm_write_c0_guest_cause(cop0, v);
710 break;
711 case KVM_REG_MIPS_CP0_ERROREPC:
712 kvm_write_c0_guest_errorepc(cop0, v);
713 break;
714 default:
715 return -EINVAL;
716 }
717 return 0;
718}
719
Sanjay Lal669e8462012-11-21 18:34:02 -0800720long
721kvm_arch_vcpu_ioctl(struct file *filp, unsigned int ioctl, unsigned long arg)
722{
723 struct kvm_vcpu *vcpu = filp->private_data;
724 void __user *argp = (void __user *)arg;
725 long r;
Sanjay Lal669e8462012-11-21 18:34:02 -0800726
727 switch (ioctl) {
David Daney4c73fb22013-05-23 09:49:09 -0700728 case KVM_SET_ONE_REG:
729 case KVM_GET_ONE_REG: {
730 struct kvm_one_reg reg;
731 if (copy_from_user(&reg, argp, sizeof(reg)))
732 return -EFAULT;
733 if (ioctl == KVM_SET_ONE_REG)
734 return kvm_mips_set_reg(vcpu, &reg);
735 else
736 return kvm_mips_get_reg(vcpu, &reg);
737 }
738 case KVM_GET_REG_LIST: {
739 struct kvm_reg_list __user *user_list = argp;
740 u64 __user *reg_dest;
741 struct kvm_reg_list reg_list;
742 unsigned n;
743
744 if (copy_from_user(&reg_list, user_list, sizeof(reg_list)))
745 return -EFAULT;
746 n = reg_list.n;
747 reg_list.n = ARRAY_SIZE(kvm_mips_get_one_regs);
748 if (copy_to_user(user_list, &reg_list, sizeof(reg_list)))
749 return -EFAULT;
750 if (n < reg_list.n)
751 return -E2BIG;
752 reg_dest = user_list->reg;
753 if (copy_to_user(reg_dest, kvm_mips_get_one_regs,
754 sizeof(kvm_mips_get_one_regs)))
755 return -EFAULT;
756 return 0;
757 }
Sanjay Lal669e8462012-11-21 18:34:02 -0800758 case KVM_NMI:
759 /* Treat the NMI as a CPU reset */
760 r = kvm_mips_reset_vcpu(vcpu);
761 break;
762 case KVM_INTERRUPT:
763 {
764 struct kvm_mips_interrupt irq;
765 r = -EFAULT;
766 if (copy_from_user(&irq, argp, sizeof(irq)))
767 goto out;
768
Sanjay Lal669e8462012-11-21 18:34:02 -0800769 kvm_debug("[%d] %s: irq: %d\n", vcpu->vcpu_id, __func__,
770 irq.irq);
771
772 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
773 break;
774 }
775 default:
David Daney4c73fb22013-05-23 09:49:09 -0700776 r = -ENOIOCTLCMD;
Sanjay Lal669e8462012-11-21 18:34:02 -0800777 }
778
779out:
780 return r;
781}
782
783/*
784 * Get (and clear) the dirty memory log for a memory slot.
785 */
786int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
787{
788 struct kvm_memory_slot *memslot;
789 unsigned long ga, ga_end;
790 int is_dirty = 0;
791 int r;
792 unsigned long n;
793
794 mutex_lock(&kvm->slots_lock);
795
796 r = kvm_get_dirty_log(kvm, log, &is_dirty);
797 if (r)
798 goto out;
799
800 /* If nothing is dirty, don't bother messing with page tables. */
801 if (is_dirty) {
802 memslot = &kvm->memslots->memslots[log->slot];
803
804 ga = memslot->base_gfn << PAGE_SHIFT;
805 ga_end = ga + (memslot->npages << PAGE_SHIFT);
806
807 printk("%s: dirty, ga: %#lx, ga_end %#lx\n", __func__, ga,
808 ga_end);
809
810 n = kvm_dirty_bitmap_bytes(memslot);
811 memset(memslot->dirty_bitmap, 0, n);
812 }
813
814 r = 0;
815out:
816 mutex_unlock(&kvm->slots_lock);
817 return r;
818
819}
820
821long kvm_arch_vm_ioctl(struct file *filp, unsigned int ioctl, unsigned long arg)
822{
823 long r;
824
825 switch (ioctl) {
826 default:
David Daneyed829852013-05-23 09:49:10 -0700827 r = -ENOIOCTLCMD;
Sanjay Lal669e8462012-11-21 18:34:02 -0800828 }
829
830 return r;
831}
832
833int kvm_arch_init(void *opaque)
834{
835 int ret;
836
837 if (kvm_mips_callbacks) {
838 kvm_err("kvm: module already exists\n");
839 return -EEXIST;
840 }
841
842 ret = kvm_mips_emulation_init(&kvm_mips_callbacks);
843
844 return ret;
845}
846
847void kvm_arch_exit(void)
848{
849 kvm_mips_callbacks = NULL;
850}
851
852int
853kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
854{
David Daneyed829852013-05-23 09:49:10 -0700855 return -ENOIOCTLCMD;
Sanjay Lal669e8462012-11-21 18:34:02 -0800856}
857
858int
859kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
860{
David Daneyed829852013-05-23 09:49:10 -0700861 return -ENOIOCTLCMD;
Sanjay Lal669e8462012-11-21 18:34:02 -0800862}
863
864int kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
865{
866 return 0;
867}
868
869int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
870{
David Daneyed829852013-05-23 09:49:10 -0700871 return -ENOIOCTLCMD;
Sanjay Lal669e8462012-11-21 18:34:02 -0800872}
873
874int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
875{
David Daneyed829852013-05-23 09:49:10 -0700876 return -ENOIOCTLCMD;
Sanjay Lal669e8462012-11-21 18:34:02 -0800877}
878
879int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
880{
881 return VM_FAULT_SIGBUS;
882}
883
884int kvm_dev_ioctl_check_extension(long ext)
885{
886 int r;
887
888 switch (ext) {
David Daney4c73fb22013-05-23 09:49:09 -0700889 case KVM_CAP_ONE_REG:
890 r = 1;
891 break;
Sanjay Lal669e8462012-11-21 18:34:02 -0800892 case KVM_CAP_COALESCED_MMIO:
893 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
894 break;
895 default:
896 r = 0;
897 break;
898 }
899 return r;
Sanjay Lal669e8462012-11-21 18:34:02 -0800900}
901
902int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu)
903{
904 return kvm_mips_pending_timer(vcpu);
905}
906
907int kvm_arch_vcpu_dump_regs(struct kvm_vcpu *vcpu)
908{
909 int i;
910 struct mips_coproc *cop0;
911
912 if (!vcpu)
913 return -1;
914
915 printk("VCPU Register Dump:\n");
916 printk("\tpc = 0x%08lx\n", vcpu->arch.pc);;
917 printk("\texceptions: %08lx\n", vcpu->arch.pending_exceptions);
918
919 for (i = 0; i < 32; i += 4) {
920 printk("\tgpr%02d: %08lx %08lx %08lx %08lx\n", i,
921 vcpu->arch.gprs[i],
922 vcpu->arch.gprs[i + 1],
923 vcpu->arch.gprs[i + 2], vcpu->arch.gprs[i + 3]);
924 }
925 printk("\thi: 0x%08lx\n", vcpu->arch.hi);
926 printk("\tlo: 0x%08lx\n", vcpu->arch.lo);
927
928 cop0 = vcpu->arch.cop0;
929 printk("\tStatus: 0x%08lx, Cause: 0x%08lx\n",
930 kvm_read_c0_guest_status(cop0), kvm_read_c0_guest_cause(cop0));
931
932 printk("\tEPC: 0x%08lx\n", kvm_read_c0_guest_epc(cop0));
933
934 return 0;
935}
936
937int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
938{
939 int i;
940
David Daney8d17dd02013-05-23 09:49:08 -0700941 for (i = 1; i < ARRAY_SIZE(vcpu->arch.gprs); i++)
David Daneybf32ebf2013-05-23 09:49:07 -0700942 vcpu->arch.gprs[i] = regs->gpr[i];
David Daney8d17dd02013-05-23 09:49:08 -0700943 vcpu->arch.gprs[0] = 0; /* zero is special, and cannot be set. */
Sanjay Lal669e8462012-11-21 18:34:02 -0800944 vcpu->arch.hi = regs->hi;
945 vcpu->arch.lo = regs->lo;
946 vcpu->arch.pc = regs->pc;
947
David Daney4c73fb22013-05-23 09:49:09 -0700948 return 0;
Sanjay Lal669e8462012-11-21 18:34:02 -0800949}
950
951int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
952{
953 int i;
954
David Daney8d17dd02013-05-23 09:49:08 -0700955 for (i = 0; i < ARRAY_SIZE(vcpu->arch.gprs); i++)
David Daneybf32ebf2013-05-23 09:49:07 -0700956 regs->gpr[i] = vcpu->arch.gprs[i];
Sanjay Lal669e8462012-11-21 18:34:02 -0800957
958 regs->hi = vcpu->arch.hi;
959 regs->lo = vcpu->arch.lo;
960 regs->pc = vcpu->arch.pc;
961
David Daney4c73fb22013-05-23 09:49:09 -0700962 return 0;
Sanjay Lal669e8462012-11-21 18:34:02 -0800963}
964
965void kvm_mips_comparecount_func(unsigned long data)
966{
967 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
968
969 kvm_mips_callbacks->queue_timer_int(vcpu);
970
971 vcpu->arch.wait = 0;
972 if (waitqueue_active(&vcpu->wq)) {
973 wake_up_interruptible(&vcpu->wq);
974 }
975}
976
977/*
978 * low level hrtimer wake routine.
979 */
980enum hrtimer_restart kvm_mips_comparecount_wakeup(struct hrtimer *timer)
981{
982 struct kvm_vcpu *vcpu;
983
984 vcpu = container_of(timer, struct kvm_vcpu, arch.comparecount_timer);
985 kvm_mips_comparecount_func((unsigned long) vcpu);
986 hrtimer_forward_now(&vcpu->arch.comparecount_timer,
987 ktime_set(0, MS_TO_NS(10)));
988 return HRTIMER_RESTART;
989}
990
991int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
992{
993 kvm_mips_callbacks->vcpu_init(vcpu);
994 hrtimer_init(&vcpu->arch.comparecount_timer, CLOCK_MONOTONIC,
995 HRTIMER_MODE_REL);
996 vcpu->arch.comparecount_timer.function = kvm_mips_comparecount_wakeup;
997 kvm_mips_init_shadow_tlb(vcpu);
998 return 0;
999}
1000
1001void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
1002{
1003 return;
1004}
1005
1006int
1007kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu, struct kvm_translation *tr)
1008{
1009 return 0;
1010}
1011
1012/* Initial guest state */
1013int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
1014{
1015 return kvm_mips_callbacks->vcpu_setup(vcpu);
1016}
1017
1018static
1019void kvm_mips_set_c0_status(void)
1020{
1021 uint32_t status = read_c0_status();
1022
Sanjay Lal669e8462012-11-21 18:34:02 -08001023 if (cpu_has_dsp)
1024 status |= (ST0_MX);
1025
1026 write_c0_status(status);
1027 ehb();
1028}
1029
1030/*
1031 * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
1032 */
1033int kvm_mips_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu)
1034{
1035 uint32_t cause = vcpu->arch.host_cp0_cause;
1036 uint32_t exccode = (cause >> CAUSEB_EXCCODE) & 0x1f;
1037 uint32_t __user *opc = (uint32_t __user *) vcpu->arch.pc;
1038 unsigned long badvaddr = vcpu->arch.host_cp0_badvaddr;
1039 enum emulation_result er = EMULATE_DONE;
1040 int ret = RESUME_GUEST;
1041
1042 /* Set a default exit reason */
1043 run->exit_reason = KVM_EXIT_UNKNOWN;
1044 run->ready_for_interrupt_injection = 1;
1045
1046 /* Set the appropriate status bits based on host CPU features, before we hit the scheduler */
1047 kvm_mips_set_c0_status();
1048
1049 local_irq_enable();
1050
1051 kvm_debug("kvm_mips_handle_exit: cause: %#x, PC: %p, kvm_run: %p, kvm_vcpu: %p\n",
1052 cause, opc, run, vcpu);
1053
1054 /* Do a privilege check, if in UM most of these exit conditions end up
1055 * causing an exception to be delivered to the Guest Kernel
1056 */
1057 er = kvm_mips_check_privilege(cause, opc, run, vcpu);
1058 if (er == EMULATE_PRIV_FAIL) {
1059 goto skip_emul;
1060 } else if (er == EMULATE_FAIL) {
1061 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1062 ret = RESUME_HOST;
1063 goto skip_emul;
1064 }
1065
1066 switch (exccode) {
1067 case T_INT:
1068 kvm_debug("[%d]T_INT @ %p\n", vcpu->vcpu_id, opc);
1069
1070 ++vcpu->stat.int_exits;
1071 trace_kvm_exit(vcpu, INT_EXITS);
1072
1073 if (need_resched()) {
1074 cond_resched();
1075 }
1076
1077 ret = RESUME_GUEST;
1078 break;
1079
1080 case T_COP_UNUSABLE:
1081 kvm_debug("T_COP_UNUSABLE: @ PC: %p\n", opc);
1082
1083 ++vcpu->stat.cop_unusable_exits;
1084 trace_kvm_exit(vcpu, COP_UNUSABLE_EXITS);
1085 ret = kvm_mips_callbacks->handle_cop_unusable(vcpu);
1086 /* XXXKYMA: Might need to return to user space */
1087 if (run->exit_reason == KVM_EXIT_IRQ_WINDOW_OPEN) {
1088 ret = RESUME_HOST;
1089 }
1090 break;
1091
1092 case T_TLB_MOD:
1093 ++vcpu->stat.tlbmod_exits;
1094 trace_kvm_exit(vcpu, TLBMOD_EXITS);
1095 ret = kvm_mips_callbacks->handle_tlb_mod(vcpu);
1096 break;
1097
1098 case T_TLB_ST_MISS:
1099 kvm_debug
1100 ("TLB ST fault: cause %#x, status %#lx, PC: %p, BadVaddr: %#lx\n",
1101 cause, kvm_read_c0_guest_status(vcpu->arch.cop0), opc,
1102 badvaddr);
1103
1104 ++vcpu->stat.tlbmiss_st_exits;
1105 trace_kvm_exit(vcpu, TLBMISS_ST_EXITS);
1106 ret = kvm_mips_callbacks->handle_tlb_st_miss(vcpu);
1107 break;
1108
1109 case T_TLB_LD_MISS:
1110 kvm_debug("TLB LD fault: cause %#x, PC: %p, BadVaddr: %#lx\n",
1111 cause, opc, badvaddr);
1112
1113 ++vcpu->stat.tlbmiss_ld_exits;
1114 trace_kvm_exit(vcpu, TLBMISS_LD_EXITS);
1115 ret = kvm_mips_callbacks->handle_tlb_ld_miss(vcpu);
1116 break;
1117
1118 case T_ADDR_ERR_ST:
1119 ++vcpu->stat.addrerr_st_exits;
1120 trace_kvm_exit(vcpu, ADDRERR_ST_EXITS);
1121 ret = kvm_mips_callbacks->handle_addr_err_st(vcpu);
1122 break;
1123
1124 case T_ADDR_ERR_LD:
1125 ++vcpu->stat.addrerr_ld_exits;
1126 trace_kvm_exit(vcpu, ADDRERR_LD_EXITS);
1127 ret = kvm_mips_callbacks->handle_addr_err_ld(vcpu);
1128 break;
1129
1130 case T_SYSCALL:
1131 ++vcpu->stat.syscall_exits;
1132 trace_kvm_exit(vcpu, SYSCALL_EXITS);
1133 ret = kvm_mips_callbacks->handle_syscall(vcpu);
1134 break;
1135
1136 case T_RES_INST:
1137 ++vcpu->stat.resvd_inst_exits;
1138 trace_kvm_exit(vcpu, RESVD_INST_EXITS);
1139 ret = kvm_mips_callbacks->handle_res_inst(vcpu);
1140 break;
1141
1142 case T_BREAK:
1143 ++vcpu->stat.break_inst_exits;
1144 trace_kvm_exit(vcpu, BREAK_INST_EXITS);
1145 ret = kvm_mips_callbacks->handle_break(vcpu);
1146 break;
1147
1148 default:
1149 kvm_err
1150 ("Exception Code: %d, not yet handled, @ PC: %p, inst: 0x%08x BadVaddr: %#lx Status: %#lx\n",
1151 exccode, opc, kvm_get_inst(opc, vcpu), badvaddr,
1152 kvm_read_c0_guest_status(vcpu->arch.cop0));
1153 kvm_arch_vcpu_dump_regs(vcpu);
1154 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1155 ret = RESUME_HOST;
1156 break;
1157
1158 }
1159
1160skip_emul:
1161 local_irq_disable();
1162
1163 if (er == EMULATE_DONE && !(ret & RESUME_HOST))
1164 kvm_mips_deliver_interrupts(vcpu, cause);
1165
1166 if (!(ret & RESUME_HOST)) {
1167 /* Only check for signals if not already exiting to userspace */
1168 if (signal_pending(current)) {
1169 run->exit_reason = KVM_EXIT_INTR;
1170 ret = (-EINTR << 2) | RESUME_HOST;
1171 ++vcpu->stat.signal_exits;
1172 trace_kvm_exit(vcpu, SIGNAL_EXITS);
1173 }
1174 }
1175
1176 return ret;
1177}
1178
1179int __init kvm_mips_init(void)
1180{
1181 int ret;
1182
1183 ret = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE);
1184
1185 if (ret)
1186 return ret;
1187
1188 /* On MIPS, kernel modules are executed from "mapped space", which requires TLBs.
1189 * The TLB handling code is statically linked with the rest of the kernel (kvm_tlb.c)
1190 * to avoid the possibility of double faulting. The issue is that the TLB code
1191 * references routines that are part of the the KVM module,
1192 * which are only available once the module is loaded.
1193 */
1194 kvm_mips_gfn_to_pfn = gfn_to_pfn;
1195 kvm_mips_release_pfn_clean = kvm_release_pfn_clean;
1196 kvm_mips_is_error_pfn = is_error_pfn;
1197
1198 pr_info("KVM/MIPS Initialized\n");
1199 return 0;
1200}
1201
1202void __exit kvm_mips_exit(void)
1203{
1204 kvm_exit();
1205
1206 kvm_mips_gfn_to_pfn = NULL;
1207 kvm_mips_release_pfn_clean = NULL;
1208 kvm_mips_is_error_pfn = NULL;
1209
1210 pr_info("KVM/MIPS unloaded\n");
1211}
1212
1213module_init(kvm_mips_init);
1214module_exit(kvm_mips_exit);
1215
1216EXPORT_TRACEPOINT_SYMBOL(kvm_exit);