Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 1 | /* |
| 2 | * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC |
| 3 | * |
| 4 | * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
| 5 | * |
| 6 | * Licensed under GPLv2 only. |
| 7 | */ |
| 8 | |
| 9 | /include/ "skeleton.dtsi" |
| 10 | |
| 11 | / { |
| 12 | model = "Atmel AT91SAM9263 family SoC"; |
| 13 | compatible = "atmel,at91sam9263"; |
| 14 | interrupt-parent = <&aic>; |
| 15 | |
| 16 | aliases { |
| 17 | serial0 = &dbgu; |
| 18 | serial1 = &usart0; |
| 19 | serial2 = &usart1; |
| 20 | serial3 = &usart2; |
| 21 | gpio0 = &pioA; |
| 22 | gpio1 = &pioB; |
| 23 | gpio2 = &pioC; |
| 24 | gpio3 = &pioD; |
| 25 | gpio4 = &pioE; |
| 26 | tcb0 = &tcb0; |
Ludovic Desroches | 05dcd36 | 2012-09-12 08:42:16 +0200 | [diff] [blame] | 27 | i2c0 = &i2c0; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 28 | }; |
| 29 | cpus { |
| 30 | cpu@0 { |
| 31 | compatible = "arm,arm926ejs"; |
| 32 | }; |
| 33 | }; |
| 34 | |
| 35 | memory { |
| 36 | reg = <0x20000000 0x08000000>; |
| 37 | }; |
| 38 | |
| 39 | ahb { |
| 40 | compatible = "simple-bus"; |
| 41 | #address-cells = <1>; |
| 42 | #size-cells = <1>; |
| 43 | ranges; |
| 44 | |
| 45 | apb { |
| 46 | compatible = "simple-bus"; |
| 47 | #address-cells = <1>; |
| 48 | #size-cells = <1>; |
| 49 | ranges; |
| 50 | |
| 51 | aic: interrupt-controller@fffff000 { |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 52 | #interrupt-cells = <3>; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 53 | compatible = "atmel,at91rm9200-aic"; |
| 54 | interrupt-controller; |
| 55 | reg = <0xfffff000 0x200>; |
Jean-Christophe PLAGNIOL-VILLARD | c657394 | 2012-04-09 19:36:36 +0800 | [diff] [blame] | 56 | atmel,external-irqs = <30 31>; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 57 | }; |
| 58 | |
| 59 | pmc: pmc@fffffc00 { |
| 60 | compatible = "atmel,at91rm9200-pmc"; |
| 61 | reg = <0xfffffc00 0x100>; |
| 62 | }; |
| 63 | |
| 64 | ramc: ramc@ffffe200 { |
| 65 | compatible = "atmel,at91sam9260-sdramc"; |
| 66 | reg = <0xffffe200 0x200 |
| 67 | 0xffffe800 0x200>; |
| 68 | }; |
| 69 | |
| 70 | pit: timer@fffffd30 { |
| 71 | compatible = "atmel,at91sam9260-pit"; |
| 72 | reg = <0xfffffd30 0xf>; |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 73 | interrupts = <1 4 7>; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 74 | }; |
| 75 | |
| 76 | tcb0: timer@fff7c000 { |
| 77 | compatible = "atmel,at91rm9200-tcb"; |
| 78 | reg = <0xfff7c000 0x100>; |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 79 | interrupts = <19 4 0>; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 80 | }; |
| 81 | |
| 82 | rstc@fffffd00 { |
| 83 | compatible = "atmel,at91sam9260-rstc"; |
| 84 | reg = <0xfffffd00 0x10>; |
| 85 | }; |
| 86 | |
| 87 | shdwc@fffffd10 { |
| 88 | compatible = "atmel,at91sam9260-shdwc"; |
| 89 | reg = <0xfffffd10 0x10>; |
| 90 | }; |
| 91 | |
Jean-Christophe PLAGNIOL-VILLARD | e4541ff | 2012-07-04 17:20:46 +0800 | [diff] [blame] | 92 | pinctrl@fffff200 { |
| 93 | #address-cells = <1>; |
| 94 | #size-cells = <1>; |
| 95 | compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; |
| 96 | ranges = <0xfffff200 0xfffff200 0xa00>; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 97 | |
Jean-Christophe PLAGNIOL-VILLARD | 5314ec8 | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 98 | atmel,mux-mask = < |
| 99 | /* A B */ |
| 100 | 0xfffffffb 0xffffe07f /* pioA */ |
| 101 | 0x0007ffff 0x39072fff /* pioB */ |
| 102 | 0xffffffff 0x3ffffff8 /* pioC */ |
| 103 | 0xfffffbff 0xffffffff /* pioD */ |
| 104 | 0xffe00fff 0xfbfcff00 /* pioE */ |
| 105 | >; |
| 106 | |
| 107 | /* shared pinctrl settings */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 108 | dbgu { |
| 109 | pinctrl_dbgu: dbgu-0 { |
| 110 | atmel,pins = |
| 111 | <2 30 0x1 0x0 /* PC30 periph A */ |
| 112 | 2 31 0x1 0x1>; /* PC31 periph with pullup */ |
| 113 | }; |
| 114 | }; |
| 115 | |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 116 | usart0 { |
| 117 | pinctrl_usart0: usart0-0 { |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 118 | atmel,pins = |
| 119 | <0 26 0x1 0x1 /* PA26 periph A with pullup */ |
| 120 | 0 27 0x1 0x0>; /* PA27 periph A */ |
| 121 | }; |
| 122 | |
Jean-Christophe PLAGNIOL-VILLARD | c58c0c5 | 2012-11-19 07:30:01 +0800 | [diff] [blame] | 123 | pinctrl_usart0_rts: usart0_rts-0 { |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 124 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c58c0c5 | 2012-11-19 07:30:01 +0800 | [diff] [blame] | 125 | <0 28 0x1 0x0>; /* PA28 periph A */ |
| 126 | }; |
| 127 | |
| 128 | pinctrl_usart0_cts: usart0_cts-0 { |
| 129 | atmel,pins = |
| 130 | <0 29 0x1 0x0>; /* PA29 periph A */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 131 | }; |
| 132 | }; |
| 133 | |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 134 | usart1 { |
| 135 | pinctrl_usart1: usart1-0 { |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 136 | atmel,pins = |
| 137 | <3 0 0x1 0x1 /* PD0 periph A with pullup */ |
| 138 | 3 1 0x1 0x0>; /* PD1 periph A */ |
| 139 | }; |
| 140 | |
Jean-Christophe PLAGNIOL-VILLARD | c58c0c5 | 2012-11-19 07:30:01 +0800 | [diff] [blame] | 141 | pinctrl_usart1_rts: usart1_rts-0 { |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 142 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c58c0c5 | 2012-11-19 07:30:01 +0800 | [diff] [blame] | 143 | <3 7 0x2 0x0>; /* PD7 periph B */ |
| 144 | }; |
| 145 | |
| 146 | pinctrl_usart1_cts: usart1_cts-0 { |
| 147 | atmel,pins = |
| 148 | <3 8 0x2 0x0>; /* PD8 periph B */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 149 | }; |
| 150 | }; |
| 151 | |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 152 | usart2 { |
| 153 | pinctrl_usart2: usart2-0 { |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 154 | atmel,pins = |
| 155 | <3 2 0x1 0x1 /* PD2 periph A with pullup */ |
| 156 | 3 3 0x1 0x0>; /* PD3 periph A */ |
| 157 | }; |
| 158 | |
Jean-Christophe PLAGNIOL-VILLARD | c58c0c5 | 2012-11-19 07:30:01 +0800 | [diff] [blame] | 159 | pinctrl_usart2_rts: usart2_rts-0 { |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 160 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c58c0c5 | 2012-11-19 07:30:01 +0800 | [diff] [blame] | 161 | <3 5 0x2 0x0>; /* PD5 periph B */ |
| 162 | }; |
| 163 | |
| 164 | pinctrl_usart2_cts: usart2_cts-0 { |
| 165 | atmel,pins = |
| 166 | <4 6 0x2 0x0>; /* PD6 periph B */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 167 | }; |
| 168 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 5314ec8 | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 169 | |
Jean-Christophe PLAGNIOL-VILLARD | 7a38d45 | 2012-07-12 23:36:52 +0800 | [diff] [blame] | 170 | nand { |
| 171 | pinctrl_nand: nand-0 { |
| 172 | atmel,pins = |
| 173 | <0 22 0x0 0x1 /* PA22 gpio RDY pin pull_up*/ |
| 174 | 3 15 0x0 0x1>; /* PD15 gpio enable pin pull_up */ |
| 175 | }; |
| 176 | }; |
| 177 | |
Jean-Christophe PLAGNIOL-VILLARD | d9b4fe8 | 2012-10-23 10:19:11 +0800 | [diff] [blame] | 178 | macb { |
| 179 | pinctrl_macb_rmii: macb_rmii-0 { |
| 180 | atmel,pins = |
| 181 | <2 25 0x2 0x0 /* PC25 periph B */ |
| 182 | 4 21 0x1 0x0 /* PE21 periph A */ |
| 183 | 4 23 0x1 0x0 /* PE23 periph A */ |
| 184 | 4 24 0x1 0x0 /* PE24 periph A */ |
| 185 | 4 25 0x1 0x0 /* PE25 periph A */ |
| 186 | 4 26 0x1 0x0 /* PE26 periph A */ |
| 187 | 4 27 0x1 0x0 /* PE27 periph A */ |
| 188 | 4 28 0x1 0x0 /* PE28 periph A */ |
| 189 | 4 29 0x1 0x0 /* PE29 periph A */ |
| 190 | 4 30 0x1 0x0>; /* PE30 periph A */ |
| 191 | }; |
| 192 | |
| 193 | pinctrl_macb_rmii_mii: macb_rmii_mii-0 { |
| 194 | atmel,pins = |
| 195 | <2 20 0x2 0x0 /* PC20 periph B */ |
| 196 | 2 21 0x2 0x0 /* PC21 periph B */ |
| 197 | 2 22 0x2 0x0 /* PC22 periph B */ |
| 198 | 2 23 0x2 0x0 /* PC23 periph B */ |
| 199 | 2 24 0x2 0x0 /* PC24 periph B */ |
| 200 | 2 25 0x2 0x0 /* PC25 periph B */ |
| 201 | 2 27 0x2 0x0 /* PC27 periph B */ |
| 202 | 4 22 0x2 0x0>; /* PE22 periph B */ |
| 203 | }; |
| 204 | }; |
| 205 | |
Jean-Christophe PLAGNIOL-VILLARD | d4fe9ac | 2012-11-16 08:24:17 +0800 | [diff] [blame^] | 206 | mmc0 { |
| 207 | pinctrl_mmc0_clk: mmc0_clk-0 { |
| 208 | atmel,pins = |
| 209 | <0 12 0x1 0x0>; /* PA12 periph A */ |
| 210 | }; |
| 211 | |
| 212 | pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { |
| 213 | atmel,pins = |
| 214 | <0 1 0x1 0x1 /* PA1 periph A with pullup */ |
| 215 | 0 0 0x1 0x1>; /* PA0 periph A with pullup */ |
| 216 | }; |
| 217 | |
| 218 | pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { |
| 219 | atmel,pins = |
| 220 | <0 3 0x1 0x1 /* PA3 periph A with pullup */ |
| 221 | 0 4 0x1 0x1 /* PA4 periph A with pullup */ |
| 222 | 0 5 0x1 0x1>; /* PA5 periph A with pullup */ |
| 223 | }; |
| 224 | |
| 225 | pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 { |
| 226 | atmel,pins = |
| 227 | <0 16 0x1 0x1 /* PA16 periph A with pullup */ |
| 228 | 0 17 0x1 0x1>; /* PA17 periph A with pullup */ |
| 229 | }; |
| 230 | |
| 231 | pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 { |
| 232 | atmel,pins = |
| 233 | <0 18 0x1 0x1 /* PA18 periph A with pullup */ |
| 234 | 0 19 0x1 0x1 /* PA19 periph A with pullup */ |
| 235 | 0 20 0x1 0x1>; /* PA20 periph A with pullup */ |
| 236 | }; |
| 237 | }; |
| 238 | |
| 239 | mmc1 { |
| 240 | pinctrl_mmc1_clk: mmc1_clk-0 { |
| 241 | atmel,pins = |
| 242 | <0 6 0x1 0x0>; /* PA6 periph A */ |
| 243 | }; |
| 244 | |
| 245 | pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 { |
| 246 | atmel,pins = |
| 247 | <0 7 0x1 0x1 /* PA7 periph A with pullup */ |
| 248 | 0 8 0x1 0x1>; /* PA8 periph A with pullup */ |
| 249 | }; |
| 250 | |
| 251 | pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 { |
| 252 | atmel,pins = |
| 253 | <0 9 0x1 0x1 /* PA9 periph A with pullup */ |
| 254 | 0 10 0x1 0x1 /* PA10 periph A with pullup */ |
| 255 | 0 11 0x1 0x1>; /* PA11 periph A with pullup */ |
| 256 | }; |
| 257 | |
| 258 | pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 { |
| 259 | atmel,pins = |
| 260 | <0 21 0x1 0x1 /* PA21 periph A with pullup */ |
| 261 | 0 22 0x1 0x1>; /* PA22 periph A with pullup */ |
| 262 | }; |
| 263 | |
| 264 | pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 { |
| 265 | atmel,pins = |
| 266 | <0 23 0x1 0x1 /* PA23 periph A with pullup */ |
| 267 | 0 24 0x1 0x1 /* PA24 periph A with pullup */ |
| 268 | 0 25 0x1 0x1>; /* PA25 periph A with pullup */ |
| 269 | }; |
| 270 | }; |
| 271 | |
Jean-Christophe PLAGNIOL-VILLARD | e4541ff | 2012-07-04 17:20:46 +0800 | [diff] [blame] | 272 | pioA: gpio@fffff200 { |
| 273 | compatible = "atmel,at91rm9200-gpio"; |
| 274 | reg = <0xfffff200 0x200>; |
| 275 | interrupts = <2 4 1>; |
| 276 | #gpio-cells = <2>; |
| 277 | gpio-controller; |
| 278 | interrupt-controller; |
| 279 | #interrupt-cells = <2>; |
| 280 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 281 | |
Jean-Christophe PLAGNIOL-VILLARD | e4541ff | 2012-07-04 17:20:46 +0800 | [diff] [blame] | 282 | pioB: gpio@fffff400 { |
| 283 | compatible = "atmel,at91rm9200-gpio"; |
| 284 | reg = <0xfffff400 0x200>; |
| 285 | interrupts = <3 4 1>; |
| 286 | #gpio-cells = <2>; |
| 287 | gpio-controller; |
| 288 | interrupt-controller; |
| 289 | #interrupt-cells = <2>; |
| 290 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 291 | |
Jean-Christophe PLAGNIOL-VILLARD | e4541ff | 2012-07-04 17:20:46 +0800 | [diff] [blame] | 292 | pioC: gpio@fffff600 { |
| 293 | compatible = "atmel,at91rm9200-gpio"; |
| 294 | reg = <0xfffff600 0x200>; |
| 295 | interrupts = <4 4 1>; |
| 296 | #gpio-cells = <2>; |
| 297 | gpio-controller; |
| 298 | interrupt-controller; |
| 299 | #interrupt-cells = <2>; |
| 300 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 301 | |
Jean-Christophe PLAGNIOL-VILLARD | e4541ff | 2012-07-04 17:20:46 +0800 | [diff] [blame] | 302 | pioD: gpio@fffff800 { |
| 303 | compatible = "atmel,at91rm9200-gpio"; |
| 304 | reg = <0xfffff800 0x200>; |
| 305 | interrupts = <4 4 1>; |
| 306 | #gpio-cells = <2>; |
| 307 | gpio-controller; |
| 308 | interrupt-controller; |
| 309 | #interrupt-cells = <2>; |
| 310 | }; |
| 311 | |
| 312 | pioE: gpio@fffffa00 { |
| 313 | compatible = "atmel,at91rm9200-gpio"; |
| 314 | reg = <0xfffffa00 0x200>; |
| 315 | interrupts = <4 4 1>; |
| 316 | #gpio-cells = <2>; |
| 317 | gpio-controller; |
| 318 | interrupt-controller; |
| 319 | #interrupt-cells = <2>; |
Jean-Christophe PLAGNIOL-VILLARD | 5314ec8 | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 320 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 321 | }; |
| 322 | |
| 323 | dbgu: serial@ffffee00 { |
| 324 | compatible = "atmel,at91sam9260-usart"; |
| 325 | reg = <0xffffee00 0x200>; |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 326 | interrupts = <1 4 7>; |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 327 | pinctrl-names = "default"; |
| 328 | pinctrl-0 = <&pinctrl_dbgu>; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 329 | status = "disabled"; |
| 330 | }; |
| 331 | |
| 332 | usart0: serial@fff8c000 { |
| 333 | compatible = "atmel,at91sam9260-usart"; |
| 334 | reg = <0xfff8c000 0x200>; |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 335 | interrupts = <7 4 5>; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 336 | atmel,use-dma-rx; |
| 337 | atmel,use-dma-tx; |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 338 | pinctrl-names = "default"; |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 339 | pinctrl-0 = <&pinctrl_usart0>; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 340 | status = "disabled"; |
| 341 | }; |
| 342 | |
| 343 | usart1: serial@fff90000 { |
| 344 | compatible = "atmel,at91sam9260-usart"; |
| 345 | reg = <0xfff90000 0x200>; |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 346 | interrupts = <8 4 5>; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 347 | atmel,use-dma-rx; |
| 348 | atmel,use-dma-tx; |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 349 | pinctrl-names = "default"; |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 350 | pinctrl-0 = <&pinctrl_usart1>; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 351 | status = "disabled"; |
| 352 | }; |
| 353 | |
| 354 | usart2: serial@fff94000 { |
| 355 | compatible = "atmel,at91sam9260-usart"; |
| 356 | reg = <0xfff94000 0x200>; |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 357 | interrupts = <9 4 5>; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 358 | atmel,use-dma-rx; |
| 359 | atmel,use-dma-tx; |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 360 | pinctrl-names = "default"; |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 361 | pinctrl-0 = <&pinctrl_usart2>; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 362 | status = "disabled"; |
| 363 | }; |
| 364 | |
| 365 | macb0: ethernet@fffbc000 { |
| 366 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; |
| 367 | reg = <0xfffbc000 0x100>; |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 368 | interrupts = <21 4 3>; |
Jean-Christophe PLAGNIOL-VILLARD | d9b4fe8 | 2012-10-23 10:19:11 +0800 | [diff] [blame] | 369 | pinctrl-names = "default"; |
| 370 | pinctrl-0 = <&pinctrl_macb_rmii>; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 371 | status = "disabled"; |
| 372 | }; |
| 373 | |
| 374 | usb1: gadget@fff78000 { |
| 375 | compatible = "atmel,at91rm9200-udc"; |
| 376 | reg = <0xfff78000 0x4000>; |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 377 | interrupts = <24 4 2>; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 378 | status = "disabled"; |
| 379 | }; |
Ludovic Desroches | 05dcd36 | 2012-09-12 08:42:16 +0200 | [diff] [blame] | 380 | |
| 381 | i2c0: i2c@fff88000 { |
| 382 | compatible = "atmel,at91sam9263-i2c"; |
| 383 | reg = <0xfff88000 0x100>; |
| 384 | interrupts = <13 4 6>; |
| 385 | #address-cells = <1>; |
| 386 | #size-cells = <0>; |
| 387 | status = "disabled"; |
| 388 | }; |
Ludovic Desroches | 9873137 | 2012-11-19 12:23:36 +0100 | [diff] [blame] | 389 | |
| 390 | mmc0: mmc@fff80000 { |
| 391 | compatible = "atmel,hsmci"; |
| 392 | reg = <0xfff80000 0x600>; |
| 393 | interrupts = <10 4 0>; |
| 394 | #address-cells = <1>; |
| 395 | #size-cells = <0>; |
| 396 | status = "disabled"; |
| 397 | }; |
| 398 | |
| 399 | mmc1: mmc@fff84000 { |
| 400 | compatible = "atmel,hsmci"; |
| 401 | reg = <0xfff84000 0x600>; |
| 402 | interrupts = <11 4 0>; |
| 403 | #address-cells = <1>; |
| 404 | #size-cells = <0>; |
| 405 | status = "disabled"; |
| 406 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 407 | }; |
| 408 | |
| 409 | nand0: nand@40000000 { |
| 410 | compatible = "atmel,at91rm9200-nand"; |
| 411 | #address-cells = <1>; |
| 412 | #size-cells = <1>; |
| 413 | reg = <0x40000000 0x10000000 |
| 414 | 0xffffe000 0x200 |
| 415 | >; |
| 416 | atmel,nand-addr-offset = <21>; |
| 417 | atmel,nand-cmd-offset = <22>; |
Jean-Christophe PLAGNIOL-VILLARD | 7a38d45 | 2012-07-12 23:36:52 +0800 | [diff] [blame] | 418 | pinctrl-names = "default"; |
| 419 | pinctrl-0 = <&pinctrl_nand>; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 420 | gpios = <&pioA 22 0 |
| 421 | &pioD 15 0 |
| 422 | 0 |
| 423 | >; |
| 424 | status = "disabled"; |
| 425 | }; |
| 426 | |
| 427 | usb0: ohci@00a00000 { |
| 428 | compatible = "atmel,at91rm9200-ohci", "usb-ohci"; |
| 429 | reg = <0x00a00000 0x100000>; |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 430 | interrupts = <29 4 2>; |
Jean-Christophe PLAGNIOL-VILLARD | 4abb367 | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 431 | status = "disabled"; |
| 432 | }; |
| 433 | }; |
| 434 | |
| 435 | i2c@0 { |
| 436 | compatible = "i2c-gpio"; |
| 437 | gpios = <&pioB 4 0 /* sda */ |
| 438 | &pioB 5 0 /* scl */ |
| 439 | >; |
| 440 | i2c-gpio,sda-open-drain; |
| 441 | i2c-gpio,scl-open-drain; |
| 442 | i2c-gpio,delay-us = <2>; /* ~100 kHz */ |
| 443 | #address-cells = <1>; |
| 444 | #size-cells = <0>; |
| 445 | status = "disabled"; |
| 446 | }; |
| 447 | }; |