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Rafael J. Wysockif58b0822013-03-06 23:46:20 +01001/*
2 * ACPI support for Intel Lynxpoint LPSS.
3 *
4 * Copyright (C) 2013, Intel Corporation
5 * Authors: Mika Westerberg <mika.westerberg@linux.intel.com>
6 * Rafael J. Wysocki <rafael.j.wysocki@intel.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/acpi.h>
14#include <linux/clk.h>
15#include <linux/clkdev.h>
16#include <linux/clk-provider.h>
17#include <linux/err.h>
18#include <linux/io.h>
19#include <linux/platform_device.h>
20#include <linux/platform_data/clk-lpss.h>
Rafael J. Wysocki2e0f8822013-03-06 23:46:28 +010021#include <linux/pm_runtime.h>
Heikki Krogerusc78b0832014-05-23 16:15:09 +030022#include <linux/delay.h>
Rafael J. Wysockif58b0822013-03-06 23:46:20 +010023
24#include "internal.h"
25
26ACPI_MODULE_NAME("acpi_lpss");
27
Rafael J. Wysockif58b0822013-03-06 23:46:20 +010028#define LPSS_CLK_SIZE 0x04
Rafael J. Wysocki2e0f8822013-03-06 23:46:28 +010029#define LPSS_LTR_SIZE 0x18
30
31/* Offsets relative to LPSS_PRIVATE_OFFSET */
32#define LPSS_GENERAL 0x08
33#define LPSS_GENERAL_LTR_MODE_SW BIT(2)
Heikki Krogerus088f1fd2013-10-09 09:49:20 +030034#define LPSS_GENERAL_UART_RTS_OVRD BIT(3)
Rafael J. Wysocki2e0f8822013-03-06 23:46:28 +010035#define LPSS_SW_LTR 0x10
36#define LPSS_AUTO_LTR 0x14
Rafael J. Wysocki1a8f8352014-02-11 00:35:53 +010037#define LPSS_LTR_SNOOP_REQ BIT(15)
38#define LPSS_LTR_SNOOP_MASK 0x0000FFFF
39#define LPSS_LTR_SNOOP_LAT_1US 0x800
40#define LPSS_LTR_SNOOP_LAT_32US 0xC00
41#define LPSS_LTR_SNOOP_LAT_SHIFT 5
42#define LPSS_LTR_SNOOP_LAT_CUTOFF 3000
43#define LPSS_LTR_MAX_VAL 0x3FF
Heikki Krogerus06d86412013-06-17 13:25:46 +030044#define LPSS_TX_INT 0x20
45#define LPSS_TX_INT_MASK BIT(1)
Rafael J. Wysockif58b0822013-03-06 23:46:20 +010046
Heikki Krogerusc78b0832014-05-23 16:15:09 +030047#define LPSS_PRV_REG_COUNT 9
48
Mika Westerbergf6272172013-05-13 12:42:44 +000049struct lpss_shared_clock {
50 const char *name;
51 unsigned long rate;
52 struct clk *clk;
53};
54
Heikki Krogerus06d86412013-06-17 13:25:46 +030055struct lpss_private_data;
Rafael J. Wysockif58b0822013-03-06 23:46:20 +010056
57struct lpss_device_desc {
58 bool clk_required;
Rafael J. Wysockib59cc202013-05-08 11:55:49 +030059 const char *clkdev_name;
Rafael J. Wysocki2e0f8822013-03-06 23:46:28 +010060 bool ltr_required;
61 unsigned int prv_offset;
Mika Westerberg958c4eb2013-06-18 16:51:35 +030062 size_t prv_size_override;
Mika Westerbergf6272172013-05-13 12:42:44 +000063 bool clk_gate;
Heikki Krogerusc78b0832014-05-23 16:15:09 +030064 bool save_ctx;
Mika Westerbergf6272172013-05-13 12:42:44 +000065 struct lpss_shared_clock *shared_clock;
Heikki Krogerus06d86412013-06-17 13:25:46 +030066 void (*setup)(struct lpss_private_data *pdata);
Rafael J. Wysockif58b0822013-03-06 23:46:20 +010067};
68
Rafael J. Wysockib59cc202013-05-08 11:55:49 +030069static struct lpss_device_desc lpss_dma_desc = {
70 .clk_required = true,
71 .clkdev_name = "hclk",
72};
73
Rafael J. Wysockif58b0822013-03-06 23:46:20 +010074struct lpss_private_data {
75 void __iomem *mmio_base;
76 resource_size_t mmio_size;
77 struct clk *clk;
78 const struct lpss_device_desc *dev_desc;
Heikki Krogerusc78b0832014-05-23 16:15:09 +030079 u32 prv_reg_ctx[LPSS_PRV_REG_COUNT];
Rafael J. Wysockif58b0822013-03-06 23:46:20 +010080};
81
Heikki Krogerus06d86412013-06-17 13:25:46 +030082static void lpss_uart_setup(struct lpss_private_data *pdata)
83{
Heikki Krogerus088f1fd2013-10-09 09:49:20 +030084 unsigned int offset;
Heikki Krogerus06d86412013-06-17 13:25:46 +030085 u32 reg;
86
Heikki Krogerus088f1fd2013-10-09 09:49:20 +030087 offset = pdata->dev_desc->prv_offset + LPSS_TX_INT;
88 reg = readl(pdata->mmio_base + offset);
89 writel(reg | LPSS_TX_INT_MASK, pdata->mmio_base + offset);
90
91 offset = pdata->dev_desc->prv_offset + LPSS_GENERAL;
92 reg = readl(pdata->mmio_base + offset);
93 writel(reg | LPSS_GENERAL_UART_RTS_OVRD, pdata->mmio_base + offset);
Heikki Krogerus06d86412013-06-17 13:25:46 +030094}
95
Rafael J. Wysockif58b0822013-03-06 23:46:20 +010096static struct lpss_device_desc lpt_dev_desc = {
97 .clk_required = true,
Rafael J. Wysocki2e0f8822013-03-06 23:46:28 +010098 .prv_offset = 0x800,
99 .ltr_required = true,
Mika Westerbergf6272172013-05-13 12:42:44 +0000100 .clk_gate = true,
Rafael J. Wysocki2e0f8822013-03-06 23:46:28 +0100101};
102
Heikki Krogerus06d86412013-06-17 13:25:46 +0300103static struct lpss_device_desc lpt_uart_dev_desc = {
104 .clk_required = true,
105 .prv_offset = 0x800,
106 .ltr_required = true,
107 .clk_gate = true,
108 .setup = lpss_uart_setup,
Rafael J. Wysocki2e0f8822013-03-06 23:46:28 +0100109};
110
111static struct lpss_device_desc lpt_sdio_dev_desc = {
112 .prv_offset = 0x1000,
Mika Westerberg958c4eb2013-06-18 16:51:35 +0300113 .prv_size_override = 0x1018,
Rafael J. Wysocki2e0f8822013-03-06 23:46:28 +0100114 .ltr_required = true,
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100115};
116
Chew, Chiau Eee1c74812014-02-19 02:24:29 +0800117static struct lpss_shared_clock pwm_clock = {
118 .name = "pwm_clk",
119 .rate = 25000000,
120};
121
122static struct lpss_device_desc byt_pwm_dev_desc = {
123 .clk_required = true,
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300124 .save_ctx = true,
Chew, Chiau Eee1c74812014-02-19 02:24:29 +0800125 .shared_clock = &pwm_clock,
126};
127
Mika Westerbergf6272172013-05-13 12:42:44 +0000128static struct lpss_shared_clock uart_clock = {
129 .name = "uart_clk",
130 .rate = 44236800,
131};
132
133static struct lpss_device_desc byt_uart_dev_desc = {
134 .clk_required = true,
135 .prv_offset = 0x800,
136 .clk_gate = true,
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300137 .save_ctx = true,
Mika Westerbergf6272172013-05-13 12:42:44 +0000138 .shared_clock = &uart_clock,
Heikki Krogerus06d86412013-06-17 13:25:46 +0300139 .setup = lpss_uart_setup,
Mika Westerbergf6272172013-05-13 12:42:44 +0000140};
141
142static struct lpss_shared_clock spi_clock = {
143 .name = "spi_clk",
144 .rate = 50000000,
145};
146
147static struct lpss_device_desc byt_spi_dev_desc = {
148 .clk_required = true,
149 .prv_offset = 0x400,
150 .clk_gate = true,
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300151 .save_ctx = true,
Mika Westerbergf6272172013-05-13 12:42:44 +0000152 .shared_clock = &spi_clock,
153};
154
155static struct lpss_device_desc byt_sdio_dev_desc = {
156 .clk_required = true,
157};
158
159static struct lpss_shared_clock i2c_clock = {
160 .name = "i2c_clk",
161 .rate = 100000000,
162};
163
164static struct lpss_device_desc byt_i2c_dev_desc = {
165 .clk_required = true,
166 .prv_offset = 0x800,
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300167 .save_ctx = true,
Mika Westerbergf6272172013-05-13 12:42:44 +0000168 .shared_clock = &i2c_clock,
169};
170
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100171static const struct acpi_device_id acpi_lpss_device_ids[] = {
Rafael J. Wysockib59cc202013-05-08 11:55:49 +0300172 /* Generic LPSS devices */
173 { "INTL9C60", (unsigned long)&lpss_dma_desc },
174
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100175 /* Lynxpoint LPSS devices */
176 { "INT33C0", (unsigned long)&lpt_dev_desc },
177 { "INT33C1", (unsigned long)&lpt_dev_desc },
178 { "INT33C2", (unsigned long)&lpt_dev_desc },
179 { "INT33C3", (unsigned long)&lpt_dev_desc },
Heikki Krogerus06d86412013-06-17 13:25:46 +0300180 { "INT33C4", (unsigned long)&lpt_uart_dev_desc },
181 { "INT33C5", (unsigned long)&lpt_uart_dev_desc },
Rafael J. Wysocki2e0f8822013-03-06 23:46:28 +0100182 { "INT33C6", (unsigned long)&lpt_sdio_dev_desc },
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100183 { "INT33C7", },
184
Mika Westerbergf6272172013-05-13 12:42:44 +0000185 /* BayTrail LPSS devices */
Chew, Chiau Eee1c74812014-02-19 02:24:29 +0800186 { "80860F09", (unsigned long)&byt_pwm_dev_desc },
Mika Westerbergf6272172013-05-13 12:42:44 +0000187 { "80860F0A", (unsigned long)&byt_uart_dev_desc },
188 { "80860F0E", (unsigned long)&byt_spi_dev_desc },
189 { "80860F14", (unsigned long)&byt_sdio_dev_desc },
190 { "80860F41", (unsigned long)&byt_i2c_dev_desc },
191 { "INT33B2", },
192
Mika Westerberga4d97532013-11-12 11:48:19 +0200193 { "INT3430", (unsigned long)&lpt_dev_desc },
194 { "INT3431", (unsigned long)&lpt_dev_desc },
195 { "INT3432", (unsigned long)&lpt_dev_desc },
196 { "INT3433", (unsigned long)&lpt_dev_desc },
197 { "INT3434", (unsigned long)&lpt_uart_dev_desc },
198 { "INT3435", (unsigned long)&lpt_uart_dev_desc },
199 { "INT3436", (unsigned long)&lpt_sdio_dev_desc },
200 { "INT3437", },
201
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100202 { }
203};
204
205static int is_memory(struct acpi_resource *res, void *not_used)
206{
207 struct resource r;
208 return !acpi_dev_resource_memory(res, &r);
209}
210
211/* LPSS main clock device. */
212static struct platform_device *lpss_clk_dev;
213
214static inline void lpt_register_clock_device(void)
215{
216 lpss_clk_dev = platform_device_register_simple("clk-lpt", -1, NULL, 0);
217}
218
219static int register_device_clock(struct acpi_device *adev,
220 struct lpss_private_data *pdata)
221{
222 const struct lpss_device_desc *dev_desc = pdata->dev_desc;
Mika Westerbergf6272172013-05-13 12:42:44 +0000223 struct lpss_shared_clock *shared_clock = dev_desc->shared_clock;
224 struct clk *clk = ERR_PTR(-ENODEV);
Rafael J. Wysockib59cc202013-05-08 11:55:49 +0300225 struct lpss_clk_data *clk_data;
Mika Westerbergf6272172013-05-13 12:42:44 +0000226 const char *parent;
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100227
228 if (!lpss_clk_dev)
229 lpt_register_clock_device();
230
Rafael J. Wysockib59cc202013-05-08 11:55:49 +0300231 clk_data = platform_get_drvdata(lpss_clk_dev);
232 if (!clk_data)
233 return -ENODEV;
234
235 if (dev_desc->clkdev_name) {
236 clk_register_clkdev(clk_data->clk, dev_desc->clkdev_name,
237 dev_name(&adev->dev));
238 return 0;
239 }
240
241 if (!pdata->mmio_base
Rafael J. Wysocki2e0f8822013-03-06 23:46:28 +0100242 || pdata->mmio_size < dev_desc->prv_offset + LPSS_CLK_SIZE)
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100243 return -ENODATA;
244
Mika Westerbergf6272172013-05-13 12:42:44 +0000245 parent = clk_data->name;
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100246
Mika Westerbergf6272172013-05-13 12:42:44 +0000247 if (shared_clock) {
248 clk = shared_clock->clk;
249 if (!clk) {
250 clk = clk_register_fixed_rate(NULL, shared_clock->name,
251 "lpss_clk", 0,
252 shared_clock->rate);
253 shared_clock->clk = clk;
254 }
255 parent = shared_clock->name;
256 }
257
258 if (dev_desc->clk_gate) {
259 clk = clk_register_gate(NULL, dev_name(&adev->dev), parent, 0,
260 pdata->mmio_base + dev_desc->prv_offset,
261 0, 0, NULL);
262 pdata->clk = clk;
263 }
264
265 if (IS_ERR(clk))
266 return PTR_ERR(clk);
267
268 clk_register_clkdev(clk, NULL, dev_name(&adev->dev));
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100269 return 0;
270}
271
272static int acpi_lpss_create_device(struct acpi_device *adev,
273 const struct acpi_device_id *id)
274{
275 struct lpss_device_desc *dev_desc;
276 struct lpss_private_data *pdata;
277 struct resource_list_entry *rentry;
278 struct list_head resource_list;
279 int ret;
280
281 dev_desc = (struct lpss_device_desc *)id->driver_data;
282 if (!dev_desc)
283 return acpi_create_platform_device(adev, id);
284
285 pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
286 if (!pdata)
287 return -ENOMEM;
288
289 INIT_LIST_HEAD(&resource_list);
290 ret = acpi_dev_get_resources(adev, &resource_list, is_memory, NULL);
291 if (ret < 0)
292 goto err_out;
293
294 list_for_each_entry(rentry, &resource_list, node)
295 if (resource_type(&rentry->res) == IORESOURCE_MEM) {
Mika Westerberg958c4eb2013-06-18 16:51:35 +0300296 if (dev_desc->prv_size_override)
297 pdata->mmio_size = dev_desc->prv_size_override;
298 else
299 pdata->mmio_size = resource_size(&rentry->res);
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100300 pdata->mmio_base = ioremap(rentry->res.start,
301 pdata->mmio_size);
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100302 break;
303 }
304
305 acpi_dev_free_resource_list(&resource_list);
306
Mika Westerbergaf65cfe2013-09-02 13:30:25 +0300307 pdata->dev_desc = dev_desc;
308
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100309 if (dev_desc->clk_required) {
310 ret = register_device_clock(adev, pdata);
311 if (ret) {
Rafael J. Wysockib9e95fc2013-06-19 00:45:34 +0200312 /* Skip the device, but continue the namespace scan. */
313 ret = 0;
314 goto err_out;
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100315 }
316 }
317
Rafael J. Wysockib9e95fc2013-06-19 00:45:34 +0200318 /*
319 * This works around a known issue in ACPI tables where LPSS devices
320 * have _PS0 and _PS3 without _PSC (and no power resources), so
321 * acpi_bus_init_power() will assume that the BIOS has put them into D0.
322 */
323 ret = acpi_device_fix_up_power(adev);
324 if (ret) {
325 /* Skip the device, but continue the namespace scan. */
326 ret = 0;
327 goto err_out;
328 }
329
Heikki Krogerus06d86412013-06-17 13:25:46 +0300330 if (dev_desc->setup)
331 dev_desc->setup(pdata);
332
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100333 adev->driver_data = pdata;
334 ret = acpi_create_platform_device(adev, id);
335 if (ret > 0)
336 return ret;
337
338 adev->driver_data = NULL;
339
340 err_out:
341 kfree(pdata);
342 return ret;
343}
344
Rafael J. Wysocki1a8f8352014-02-11 00:35:53 +0100345static u32 __lpss_reg_read(struct lpss_private_data *pdata, unsigned int reg)
346{
347 return readl(pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
348}
349
350static void __lpss_reg_write(u32 val, struct lpss_private_data *pdata,
351 unsigned int reg)
352{
353 writel(val, pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
354}
355
Rafael J. Wysocki2e0f8822013-03-06 23:46:28 +0100356static int lpss_reg_read(struct device *dev, unsigned int reg, u32 *val)
357{
358 struct acpi_device *adev;
359 struct lpss_private_data *pdata;
360 unsigned long flags;
361 int ret;
362
363 ret = acpi_bus_get_device(ACPI_HANDLE(dev), &adev);
364 if (WARN_ON(ret))
365 return ret;
366
367 spin_lock_irqsave(&dev->power.lock, flags);
368 if (pm_runtime_suspended(dev)) {
369 ret = -EAGAIN;
370 goto out;
371 }
372 pdata = acpi_driver_data(adev);
373 if (WARN_ON(!pdata || !pdata->mmio_base)) {
374 ret = -ENODEV;
375 goto out;
376 }
Rafael J. Wysocki1a8f8352014-02-11 00:35:53 +0100377 *val = __lpss_reg_read(pdata, reg);
Rafael J. Wysocki2e0f8822013-03-06 23:46:28 +0100378
379 out:
380 spin_unlock_irqrestore(&dev->power.lock, flags);
381 return ret;
382}
383
384static ssize_t lpss_ltr_show(struct device *dev, struct device_attribute *attr,
385 char *buf)
386{
387 u32 ltr_value = 0;
388 unsigned int reg;
389 int ret;
390
391 reg = strcmp(attr->attr.name, "auto_ltr") ? LPSS_SW_LTR : LPSS_AUTO_LTR;
392 ret = lpss_reg_read(dev, reg, &ltr_value);
393 if (ret)
394 return ret;
395
396 return snprintf(buf, PAGE_SIZE, "%08x\n", ltr_value);
397}
398
399static ssize_t lpss_ltr_mode_show(struct device *dev,
400 struct device_attribute *attr, char *buf)
401{
402 u32 ltr_mode = 0;
403 char *outstr;
404 int ret;
405
406 ret = lpss_reg_read(dev, LPSS_GENERAL, &ltr_mode);
407 if (ret)
408 return ret;
409
410 outstr = (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) ? "sw" : "auto";
411 return sprintf(buf, "%s\n", outstr);
412}
413
414static DEVICE_ATTR(auto_ltr, S_IRUSR, lpss_ltr_show, NULL);
415static DEVICE_ATTR(sw_ltr, S_IRUSR, lpss_ltr_show, NULL);
416static DEVICE_ATTR(ltr_mode, S_IRUSR, lpss_ltr_mode_show, NULL);
417
418static struct attribute *lpss_attrs[] = {
419 &dev_attr_auto_ltr.attr,
420 &dev_attr_sw_ltr.attr,
421 &dev_attr_ltr_mode.attr,
422 NULL,
423};
424
425static struct attribute_group lpss_attr_group = {
426 .attrs = lpss_attrs,
427 .name = "lpss_ltr",
428};
429
Rafael J. Wysocki1a8f8352014-02-11 00:35:53 +0100430static void acpi_lpss_set_ltr(struct device *dev, s32 val)
431{
432 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
433 u32 ltr_mode, ltr_val;
434
435 ltr_mode = __lpss_reg_read(pdata, LPSS_GENERAL);
436 if (val < 0) {
437 if (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) {
438 ltr_mode &= ~LPSS_GENERAL_LTR_MODE_SW;
439 __lpss_reg_write(ltr_mode, pdata, LPSS_GENERAL);
440 }
441 return;
442 }
443 ltr_val = __lpss_reg_read(pdata, LPSS_SW_LTR) & ~LPSS_LTR_SNOOP_MASK;
444 if (val >= LPSS_LTR_SNOOP_LAT_CUTOFF) {
445 ltr_val |= LPSS_LTR_SNOOP_LAT_32US;
446 val = LPSS_LTR_MAX_VAL;
447 } else if (val > LPSS_LTR_MAX_VAL) {
448 ltr_val |= LPSS_LTR_SNOOP_LAT_32US | LPSS_LTR_SNOOP_REQ;
449 val >>= LPSS_LTR_SNOOP_LAT_SHIFT;
450 } else {
451 ltr_val |= LPSS_LTR_SNOOP_LAT_1US | LPSS_LTR_SNOOP_REQ;
452 }
453 ltr_val |= val;
454 __lpss_reg_write(ltr_val, pdata, LPSS_SW_LTR);
455 if (!(ltr_mode & LPSS_GENERAL_LTR_MODE_SW)) {
456 ltr_mode |= LPSS_GENERAL_LTR_MODE_SW;
457 __lpss_reg_write(ltr_mode, pdata, LPSS_GENERAL);
458 }
459}
460
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300461#ifdef CONFIG_PM
462/**
463 * acpi_lpss_save_ctx() - Save the private registers of LPSS device
464 * @dev: LPSS device
465 *
466 * Most LPSS devices have private registers which may loose their context when
467 * the device is powered down. acpi_lpss_save_ctx() saves those registers into
468 * prv_reg_ctx array.
469 */
470static void acpi_lpss_save_ctx(struct device *dev)
471{
472 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
473 unsigned int i;
474
475 for (i = 0; i < LPSS_PRV_REG_COUNT; i++) {
476 unsigned long offset = i * sizeof(u32);
477
478 pdata->prv_reg_ctx[i] = __lpss_reg_read(pdata, offset);
479 dev_dbg(dev, "saving 0x%08x from LPSS reg at offset 0x%02lx\n",
480 pdata->prv_reg_ctx[i], offset);
481 }
482}
483
484/**
485 * acpi_lpss_restore_ctx() - Restore the private registers of LPSS device
486 * @dev: LPSS device
487 *
488 * Restores the registers that were previously stored with acpi_lpss_save_ctx().
489 */
490static void acpi_lpss_restore_ctx(struct device *dev)
491{
492 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
493 unsigned int i;
494
495 /*
496 * The following delay is needed or the subsequent write operations may
497 * fail. The LPSS devices are actually PCI devices and the PCI spec
498 * expects 10ms delay before the device can be accessed after D3 to D0
499 * transition.
500 */
501 msleep(10);
502
503 for (i = 0; i < LPSS_PRV_REG_COUNT; i++) {
504 unsigned long offset = i * sizeof(u32);
505
506 __lpss_reg_write(pdata->prv_reg_ctx[i], pdata, offset);
507 dev_dbg(dev, "restoring 0x%08x to LPSS reg at offset 0x%02lx\n",
508 pdata->prv_reg_ctx[i], offset);
509 }
510}
511
512#ifdef CONFIG_PM_SLEEP
513static int acpi_lpss_suspend_late(struct device *dev)
514{
515 int ret = pm_generic_suspend_late(dev);
516
517 if (ret)
518 return ret;
519
520 acpi_lpss_save_ctx(dev);
521 return acpi_dev_suspend_late(dev);
522}
523
524static int acpi_lpss_restore_early(struct device *dev)
525{
526 int ret = acpi_dev_resume_early(dev);
527
528 if (ret)
529 return ret;
530
531 acpi_lpss_restore_ctx(dev);
532 return pm_generic_resume_early(dev);
533}
534#endif /* CONFIG_PM_SLEEP */
535
536#ifdef CONFIG_PM_RUNTIME
537static int acpi_lpss_runtime_suspend(struct device *dev)
538{
539 int ret = pm_generic_runtime_suspend(dev);
540
541 if (ret)
542 return ret;
543
544 acpi_lpss_save_ctx(dev);
545 return acpi_dev_runtime_suspend(dev);
546}
547
548static int acpi_lpss_runtime_resume(struct device *dev)
549{
550 int ret = acpi_dev_runtime_resume(dev);
551
552 if (ret)
553 return ret;
554
555 acpi_lpss_restore_ctx(dev);
556 return pm_generic_runtime_resume(dev);
557}
558#endif /* CONFIG_PM_RUNTIME */
559#endif /* CONFIG_PM */
560
561static struct dev_pm_domain acpi_lpss_pm_domain = {
562 .ops = {
563#ifdef CONFIG_PM_SLEEP
564 .suspend_late = acpi_lpss_suspend_late,
565 .restore_early = acpi_lpss_restore_early,
566 .prepare = acpi_subsys_prepare,
567 .complete = acpi_subsys_complete,
568 .suspend = acpi_subsys_suspend,
569 .resume_early = acpi_subsys_resume_early,
570 .freeze = acpi_subsys_freeze,
571 .poweroff = acpi_subsys_suspend,
572 .poweroff_late = acpi_subsys_suspend_late,
573#endif
574#ifdef CONFIG_PM_RUNTIME
575 .runtime_suspend = acpi_lpss_runtime_suspend,
576 .runtime_resume = acpi_lpss_runtime_resume,
577#endif
578 },
579};
580
Rafael J. Wysocki2e0f8822013-03-06 23:46:28 +0100581static int acpi_lpss_platform_notify(struct notifier_block *nb,
582 unsigned long action, void *data)
583{
584 struct platform_device *pdev = to_platform_device(data);
585 struct lpss_private_data *pdata;
586 struct acpi_device *adev;
587 const struct acpi_device_id *id;
Rafael J. Wysocki2e0f8822013-03-06 23:46:28 +0100588
589 id = acpi_match_device(acpi_lpss_device_ids, &pdev->dev);
590 if (!id || !id->driver_data)
591 return 0;
592
593 if (acpi_bus_get_device(ACPI_HANDLE(&pdev->dev), &adev))
594 return 0;
595
596 pdata = acpi_driver_data(adev);
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300597 if (!pdata || !pdata->mmio_base)
Rafael J. Wysocki2e0f8822013-03-06 23:46:28 +0100598 return 0;
599
600 if (pdata->mmio_size < pdata->dev_desc->prv_offset + LPSS_LTR_SIZE) {
601 dev_err(&pdev->dev, "MMIO size insufficient to access LTR\n");
602 return 0;
603 }
604
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300605 switch (action) {
606 case BUS_NOTIFY_BOUND_DRIVER:
607 if (pdata->dev_desc->save_ctx)
608 pdev->dev.pm_domain = &acpi_lpss_pm_domain;
609 break;
610 case BUS_NOTIFY_UNBOUND_DRIVER:
611 if (pdata->dev_desc->save_ctx)
612 pdev->dev.pm_domain = NULL;
613 break;
614 case BUS_NOTIFY_ADD_DEVICE:
615 if (pdata->dev_desc->ltr_required)
616 return sysfs_create_group(&pdev->dev.kobj,
617 &lpss_attr_group);
618 case BUS_NOTIFY_DEL_DEVICE:
619 if (pdata->dev_desc->ltr_required)
620 sysfs_remove_group(&pdev->dev.kobj, &lpss_attr_group);
621 default:
622 break;
623 }
Rafael J. Wysocki2e0f8822013-03-06 23:46:28 +0100624
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300625 return 0;
Rafael J. Wysocki2e0f8822013-03-06 23:46:28 +0100626}
627
628static struct notifier_block acpi_lpss_nb = {
629 .notifier_call = acpi_lpss_platform_notify,
630};
631
Rafael J. Wysocki1a8f8352014-02-11 00:35:53 +0100632static void acpi_lpss_bind(struct device *dev)
633{
634 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
635
636 if (!pdata || !pdata->mmio_base || !pdata->dev_desc->ltr_required)
637 return;
638
639 if (pdata->mmio_size >= pdata->dev_desc->prv_offset + LPSS_LTR_SIZE)
640 dev->power.set_latency_tolerance = acpi_lpss_set_ltr;
641 else
642 dev_err(dev, "MMIO size insufficient to access LTR\n");
643}
644
645static void acpi_lpss_unbind(struct device *dev)
646{
647 dev->power.set_latency_tolerance = NULL;
648}
649
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100650static struct acpi_scan_handler lpss_handler = {
651 .ids = acpi_lpss_device_ids,
652 .attach = acpi_lpss_create_device,
Rafael J. Wysocki1a8f8352014-02-11 00:35:53 +0100653 .bind = acpi_lpss_bind,
654 .unbind = acpi_lpss_unbind,
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100655};
656
657void __init acpi_lpss_init(void)
658{
Rafael J. Wysocki2e0f8822013-03-06 23:46:28 +0100659 if (!lpt_clk_init()) {
660 bus_register_notifier(&platform_bus_type, &acpi_lpss_nb);
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100661 acpi_scan_add_handler(&lpss_handler);
Rafael J. Wysocki2e0f8822013-03-06 23:46:28 +0100662 }
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100663}